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Searched refs:dSSC_Step (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/
H A DhalHDMITx.c2962 double dSSC_Step = 0; in MHal_HDMITx_EnableSSC() local
2980 dSSC_Step = ubSYNSet * dSSc_Deviation / dSSC_Span; //Step = SYN_SET * deviation / Span in MHal_HDMITx_EnableSSC()
2982 …ubSYNSet=%x, dSYNCLK=%f, dSSC_Span=%f, dSSC_Step=%f\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dSSC_Step); in MHal_HDMITx_EnableSSC()
2985 … MHal_HDMITx_Write(HDMITX_PHY_REG_BASE, HDMITX_SSC_STEP_REG, ( ((int)dSSC_Step) & 0xFFFF) );//Step in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/
H A DhalHDMITx.c2947 double dSSC_Step = 0; in MHal_HDMITx_EnableSSC()
2965 dSSC_Step = ubSYNSet * dSSc_Deviation / dSSC_Span; //Step = SYN_SET * deviation / Span in MHal_HDMITx_EnableSSC()
2967 …ubSYNSet=%x, dSYNCLK=%f, dSSC_Span=%f, dSSC_Step=%f\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dSSC_Step); in MHal_HDMITx_EnableSSC()
2970 … MHal_HDMITx_Write(HDMITX_PHY_REG_BASE, HDMITX_SSC_STEP_REG, ( ((int)dSSC_Step) & 0xFFFF) );//Step in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/
H A DhalHDMITx.c3050 MS_U32 dSSC_Step = 0; in MHal_HDMITx_EnableSSC()
3071 …dSSC_Step = (((ubSYNSet/ dSSC_Span)/HDMITX_SSC_DEVIATION_DIVIDER) * dSSc_Deviation) ; //Step = SYN… in MHal_HDMITx_EnableSSC()
3073 …ubSYNSet=%x, dSYNCLK=%d, dSSC_Span=%d, dSSC_Step=%d\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dSSC_Step); in MHal_HDMITx_EnableSSC()
3076 … MHal_HDMITx_Write(HDMITX_PHY_REG_BASE, HDMITX_SSC_STEP_REG, ( ((int)dSSC_Step) & 0xFFFF) );//Step in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/
H A DhalHDMITx.c3012 MS_U32 dSSC_Step = 0; in MHal_HDMITx_EnableSSC()
3033 …dSSC_Step = (((ubSYNSet/ dSSC_Span)/HDMITX_SSC_DEVIATION_DIVIDER) * dSSc_Deviation) ; //Step = SYN… in MHal_HDMITx_EnableSSC()
3035 …ubSYNSet=%x, dSYNCLK=%d, dSSC_Span=%d, dSSC_Step=%d\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dSSC_Step); in MHal_HDMITx_EnableSSC()
3038 … MHal_HDMITx_Write(HDMITX_PHY_REG_BASE, HDMITX_SSC_STEP_REG, ( ((int)dSSC_Step) & 0xFFFF) );//Step in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/
H A DhalHDMITx.c3335 double dSSC_Step = 0; in MHal_HDMITx_EnableSSC()
3353 dSSC_Step = ubSYNSet * dSSc_Deviation / dSSC_Span; //Step = SYN_SET * deviation / Span in MHal_HDMITx_EnableSSC()
3355 …ubSYNSet=%x, dSYNCLK=%f, dSSC_Span=%f, dSSC_Step=%f\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dSSC_Step); in MHal_HDMITx_EnableSSC()
3358 … MHal_HDMITx_Write(HDMITX_PHY_REG_BASE, HDMITX_SSC_STEP_REG, ( ((int)dSSC_Step) & 0xFFFF) );//Step in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/
H A DhalHDMITx.c3451 MS_U32 dSSC_Step = 0; in MHal_HDMITx_EnableSSC()
3472 …dSSC_Step = (((ubSYNSet/ dSSC_Span)/HDMITX_SSC_DEVIATION_DIVIDER) * dSSc_Deviation) ; //Step = SYN… in MHal_HDMITx_EnableSSC()
3474 …ubSYNSet=%x, dSYNCLK=%d, dSSC_Span=%d, dSSC_Step=%d\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dSSC_Step); in MHal_HDMITx_EnableSSC()
3477 … MHal_HDMITx_Write(HDMITX_PHY_REG_BASE, HDMITX_SSC_STEP_REG, ( ((int)dSSC_Step) & 0xFFFF) );//Step in MHal_HDMITx_EnableSSC()