| /utopia/UTPA2-700.0.x/modules/vif/hal/mustang/vif/ |
| H A D | halVIF.c | 1579 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1619 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1624 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1629 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1668 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1679 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1684 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1689 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1694 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1699 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/manhattan/vif/ |
| H A D | halVIF.c | 1484 RIU_WriteRegBit(0x12840L, 0, _BIT4); // Ref Enable in msVifAdcInitial()
1485 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1535 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1540 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1545 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1576 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1587 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1592 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1597 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1602 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/maxim/vif/ |
| H A D | halVIF.c | 1780 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1820 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1825 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1830 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1873 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1884 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1889 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1894 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1899 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1904 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
|
| /utopia/UTPA2-700.0.x/modules/vif/hal/M7621/vif/ |
| H A D | halVIF.c | 1771 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1811 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1816 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1821 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1864 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1875 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1880 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1885 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1890 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1895 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/mainz/vif/ |
| H A D | halVIF.c | 1482 RIU_WriteRegBit(0x12840L, 0, _BIT4); // Ref Enable in msVifAdcInitial()
1483 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1533 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1538 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1543 … msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1570 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1581 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1586 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1591 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1596 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/messi/vif/ |
| H A D | halVIF.c | 1482 RIU_WriteRegBit(0x12840L, 0, _BIT4); // Ref Enable in msVifAdcInitial()
1483 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1533 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1538 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1543 … msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1570 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1581 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1586 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1591 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1596 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/mooney/vif/ |
| H A D | halVIF.c | 1521 RIU_WriteRegBit(0x12000L, 1, _BIT4); in msVifAdcInitial()
1632 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1637 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1642 … msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1669 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1680 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1685 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1690 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1695 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1700 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/maserati/vif/ |
| H A D | halVIF.c | 1770 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1810 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1815 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1820 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1863 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1874 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1879 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1884 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1889 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1894 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/M7821/vif/ |
| H A D | halVIF.c | 1770 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1810 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1815 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1820 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1863 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1874 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1879 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1884 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1889 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1894 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/macan/vif/ |
| H A D | halVIF.c | 1766 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1806 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1811 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1816 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1855 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1866 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1871 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1876 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1881 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1886 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vif/hal/maldives/vif/ |
| H A D | halVIF.c | 1481 RIU_WriteRegBit(0x12840L, 0, _BIT4); in msVifAdcInitial()
1482 RIU_WriteRegBit(0x12834L, 1, _BIT4); // EN_VCO_DIG in msVifAdcInitial()
1522 RIU_WriteRegBit(IFAGC_ENABLE, 1, _BIT4); // IFAGC enable in msVifAdcInitial()
1527 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1532 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1559 … msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_rej_iir in msVifSetIfFreq()
1570 …msWriteBit(N_A1_IN_SEL, 1, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1575 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1580 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
1585 …msWriteBit(N_A1_IN_SEL, 0, _BIT4); // 0:from dvga, 1:from image_… in msVifSetIfFreq()
[all …]
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| /utopia/UTPA2-700.0.x/modules/vd/hal/messi/vbi/ |
| H A D | halVBI.c | 145 #define _BIT4 BIT(4) macro
416 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
421 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
432 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
433 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
691 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
745 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
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| /utopia/UTPA2-700.0.x/modules/vd/hal/mainz/vbi/ |
| H A D | halVBI.c | 145 #define _BIT4 BIT(4) macro
416 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
421 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
432 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
433 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
691 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
745 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
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| /utopia/UTPA2-700.0.x/modules/vd/hal/mooney/vbi/ |
| H A D | halVBI.c | 145 #define _BIT4 BIT(4) macro
416 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
421 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
432 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
433 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
691 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
745 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
|
| /utopia/UTPA2-700.0.x/modules/vd/hal/maldives/vbi/ |
| H A D | halVBI.c | 146 #define _BIT4 BIT(4) macro
455 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
460 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
471 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
472 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
730 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
784 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
|
| /utopia/UTPA2-700.0.x/modules/vd/hal/mustang/vbi/ |
| H A D | halVBI.c | 146 #define _BIT4 BIT(4) macro
455 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
460 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
471 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
472 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
730 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
784 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
|
| /utopia/UTPA2-700.0.x/modules/vd/hal/macan/vbi/ |
| H A D | halVBI.c | 145 #define _BIT4 BIT(4) macro
465 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
470 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
481 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
482 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
740 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
794 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
|
| /utopia/UTPA2-700.0.x/modules/mfc/hal/maserati/mfc/ |
| H A D | mdrv_mfc_scalerop.c | 194 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); in MDrv_MFC_SetVCO()
199 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in MDrv_MFC_SetVCO()
217 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
254 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
386 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
391 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in msLPLL_SetVCO()
409 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
448 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); //c in msLPLL_SetVCO()
859 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
887 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
[all …]
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| /utopia/UTPA2-700.0.x/modules/mfc/hal/macan/mfc/ |
| H A D | mdrv_mfc_scalerop.c | 194 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); in MDrv_MFC_SetVCO()
199 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in MDrv_MFC_SetVCO()
217 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
254 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
386 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
391 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in msLPLL_SetVCO()
409 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
448 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); //c in msLPLL_SetVCO()
859 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
887 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
[all …]
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| /utopia/UTPA2-700.0.x/modules/mfc/hal/M7821/mfc/ |
| H A D | mdrv_mfc_scalerop.c | 194 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); in MDrv_MFC_SetVCO()
199 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in MDrv_MFC_SetVCO()
217 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
254 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
386 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
391 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in msLPLL_SetVCO()
409 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
448 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); //c in msLPLL_SetVCO()
859 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
887 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
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| /utopia/UTPA2-700.0.x/modules/mfc/hal/maxim/mfc/ |
| H A D | mdrv_mfc_scalerop.c | 194 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); in MDrv_MFC_SetVCO()
199 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in MDrv_MFC_SetVCO()
217 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
254 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
386 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
391 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in msLPLL_SetVCO()
409 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
448 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); //c in msLPLL_SetVCO()
859 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
887 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
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| /utopia/UTPA2-700.0.x/modules/mfc/hal/manhattan/mfc/ |
| H A D | mdrv_mfc_scalerop.c | 194 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); in MDrv_MFC_SetVCO()
199 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in MDrv_MFC_SetVCO()
217 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
254 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
386 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
391 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in msLPLL_SetVCO()
409 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
448 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); //c in msLPLL_SetVCO()
859 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
887 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
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| /utopia/UTPA2-700.0.x/modules/mfc/hal/M7621/mfc/ |
| H A D | mdrv_mfc_scalerop.c | 194 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); in MDrv_MFC_SetVCO()
199 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in MDrv_MFC_SetVCO()
217 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
254 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in MDrv_MFC_SetVCO()
386 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
391 MDrv_MFC_WriteByte(0x2A2C, _BIT4 | _BIT3|_BIT2); in msLPLL_SetVCO()
409 MDrv_MFC_WriteByte(0x2A2C, _BIT4|_BIT2); in msLPLL_SetVCO()
448 MDrv_MFC_WriteByte(0x2A2C,_BIT4|_BIT2); //c in msLPLL_SetVCO()
859 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
887 MDrv_MFC_WriteByteMask(0x2A56, 0, _BIT5 | _BIT4); //sel_432m // v_by1_en in MDrv_MFC_LPLL_Initialize()
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| /utopia/UTPA2-700.0.x/modules/vd/hal/M7821/vbi/ |
| H A D | halVBI.c | 145 #define _BIT4 BIT(4) macro
466 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
471 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
482 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
483 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
741 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
795 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
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| /utopia/UTPA2-700.0.x/modules/vd/hal/M7621/vbi/ |
| H A D | halVBI.c | 145 #define _BIT4 BIT(4) macro
466 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
471 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_EnableInterrupt()
482 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
483 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0); in VBI_TTX_ClearIRQ()
741 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5); in VBI_SetCCFrameCnt()
795 u8Tmp &= ~(_BIT4 | _BIT5); in VBI_CC_SetCCLine()
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