1 //<MStar Software>
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77 //<MStar Software>
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define _HAL_VBI_C
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include "MsCommon.h"
102
103 // Internal Definition
104 #include "halVBI.h"
105 #include "regVBI.h"
106
107 //-------------------------------------------------------------------------------------------------
108 // Driver Compiler Options
109 //-------------------------------------------------------------------------------------------------
110 #define INTERFACE extern
111
112 //-------------------------------------------------------------------------------------------------
113 // Local Defines
114 //-------------------------------------------------------------------------------------------------
115 #define MAKEWORD(a,b) ((((MS_U16)((MS_U8) (a)))<<8) | ((MS_U16)((MS_U8) (b))))
116
117 #define R1BYTE(Addr, u8mask) \
118 (READ_BYTE (_ptrVBIRiuBaseAddr + ((Addr) << 1) - ((Addr) & 1)) & (u8mask))
119
120 #define W1BYTE(Addr, u8Val, u8mask) \
121 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Addr) << 1) - ((Addr) & 1), (R1BYTE(Addr, 0xFF) & ~(u8mask)) | ((u8Val) & (u8mask))))
122
123 ///////////////////////////////////////////////////////////////
124 #define MDrv_WriteByte( Reg, u8Val ) \
125 do { \
126 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1), u8Val)); \
127 }while(0)
128
129 #define MDrv_WriteWord( Reg, u16Val ) \
130 do { \
131 (WRITE_WORD(_ptrVBIRiuBaseAddr + ((Reg) << 1), u16Val)); \
132 }while(0)
133
134 #define MDrv_WriteByteMask( Reg, u8Val, u8Mask ) \
135 do { \
136 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1), (R1BYTE((Reg), 0xFF) & ~(u8Mask)) | ((u8Val) & (u8Mask)))); \
137 }while(0)
138
139 #define MDrv_ReadByte( Reg) (READ_BYTE (_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1)))
140
141 #define _BIT0 BIT(0)
142 #define _BIT1 BIT(1)
143 #define _BIT2 BIT(2)
144 #define _BIT3 BIT(3)
145 #define _BIT4 BIT(4)
146 #define _BIT5 BIT(5)
147 #define _BIT6 BIT(6)
148 #define _BIT7 BIT(7)
149 #define _BIT8 BIT(8)
150 #define _BIT9 BIT(9)
151 #define _BIT10 BIT(10)
152 #define _BIT11 BIT(11)
153 #define _BIT12 BIT(12)
154 #define _BIT13 BIT(13)
155 #define _BIT14 BIT(14)
156 #define _BIT15 BIT(15)
157
158 typedef enum
159 {
160 VBI_FIELD_EVEN,
161 VBI_FIELD_ODD
162 } EN_VBI_FIELD;
163
164 #define BK_VBI_E7_BUG 1
165 //-------------------------------------------------------------------------------------------------
166 // Local Structures
167 //-------------------------------------------------------------------------------------------------
168
169
170 //-------------------------------------------------------------------------------------------------
171 // Global Variables
172 //-------------------------------------------------------------------------------------------------
173
174
175 //-------------------------------------------------------------------------------------------------
176 // Local Variables
177 //-------------------------------------------------------------------------------------------------
178 static MS_VIRT _ptrVBIRiuBaseAddr;
179
180 //-------------------------------------------------------------------------------------------------
181 // Debug Functions
182 //-------------------------------------------------------------------------------------------------
183
184
185 //-------------------------------------------------------------------------------------------------
186 // Local Functions
187 //-------------------------------------------------------------------------------------------------
HAL_VBI_ReadByte(MS_U32 u32RegAddr)188 MS_U8 HAL_VBI_ReadByte(MS_U32 u32RegAddr)
189 {
190 return (MDrv_ReadByte(u32RegAddr));
191 }
192
HAL_VBI_Read2Byte(MS_U32 u32RegAddr)193 MS_U16 HAL_VBI_Read2Byte(MS_U32 u32RegAddr)
194 {
195 return ((MDrv_ReadByte(u32RegAddr)) + ((MDrv_ReadByte(u32RegAddr + 1))<<8));
196 }
197
HAL_VBI_WriteByte(MS_U32 u32RegAddr,MS_U8 val)198 void HAL_VBI_WriteByte(MS_U32 u32RegAddr, MS_U8 val)
199 {
200 MDrv_WriteByte(u32RegAddr, val);
201 }
202
HAL_VBI_Write2Byte(MS_U32 u32RegAddr,MS_U16 val)203 void HAL_VBI_Write2Byte(MS_U32 u32RegAddr, MS_U16 val)
204 {
205 MDrv_WriteByte(u32RegAddr, (val & 0xFF));
206 MDrv_WriteByte(u32RegAddr + 1, (val>>8));
207 }
208
HAL_VBI_WriteWord(MS_U32 u32RegAddr,MS_U16 val)209 void HAL_VBI_WriteWord(MS_U32 u32RegAddr, MS_U16 val)
210 {
211 if (u32RegAddr & 0x01)
212 printf("[VBI][%s] ERROR, not alignment address", __FUNCTION__);
213
214 MDrv_WriteWord(u32RegAddr, val);
215 }
216
HAL_VBI_WriteByteMask(MS_U32 u32RegAddr,MS_U8 val,MS_U8 mask)217 void HAL_VBI_WriteByteMask(MS_U32 u32RegAddr, MS_U8 val, MS_U8 mask)
218 {
219 MDrv_WriteByteMask(u32RegAddr, val, mask);
220 }
221
222 //-------------------------------------------------------------------------------------------------
223 // Global Functions
224 //-------------------------------------------------------------------------------------------------
VBI_TTXInit(MS_VIRT ptrAddr)225 void VBI_TTXInit(MS_VIRT ptrAddr)
226 {
227 _ptrVBIRiuBaseAddr = ptrAddr;
228
229 // close caption slicer threshold mode
230 HAL_VBI_WriteByte(BK_VBI_40, 0x01);
231
232 // close caption line start 1 (lower 3 bits) = 0
233 // close caption lin end 1 = 0
234 HAL_VBI_WriteByte(BK_VBI_41, 0x00);
235
236 // close caption line start 2 = 0
237 // close caption CRI zero crossing type : positive edge
238 // close caption clock run-in amplitude upper threshold (upper 2 bits) = 0b01
239 HAL_VBI_WriteByte(BK_VBI_50, 0x60);
240
241 // close caption line end 2 = 0
242 // close caption multi-line acquisition mode : 1
243 // close caption zero crossing mode : normal.
244 // close caption SYNC Found enable mode : 1
245 HAL_VBI_WriteByte(BK_VBI_51, 0xA0);
246
247 // teletext clock run-in amplitude accumulation start point. : 0b00010001
248 // For eye-height testing
249 HAL_VBI_WriteByte(BK_VBI_77, 0x11);
250
251 // teletext clock run-in amplitude accumulation start point. : 0b00011010
252 // For SuperVHS decode issue
253 //HAL_VBI_WriteByte(TT_CLK_RUN_IN_START_POINT, 0x1A);
254
255 // teletext VBI line start 1 (odd field) : 0b00100
256 // teletext VBI line end (lower 3 bits) 0b000
257 HAL_VBI_WriteByte(BK_VBI_7C, 0x04);
258
259 // teletext data line end 1 (odd field) : 0b10110
260 // teletext slicer read mode : 0b1
261 // teletext framing code error bond value : 0b0 fully match framing code.
262 // teletext framing code windows mode : 0b0
263 HAL_VBI_WriteByte(BK_VBI_7D, 0x36);
264
265 // teletext data line start 2 (even field) : 0b00100
266 // teletext slicer threshold fixing mode : 0b0 adjust automatically according to TtSidDetSel
267 // teletext slicer level mode : 0b0 original mode.
268 // teletext initial packet counter : 0b1 packet counter increases when teletext packet is detected without upper-bound.
269 HAL_VBI_WriteByte(BK_VBI_7E, 0x84);
270
271 // teletext data line end 2 (even field) : 0b10110
272 // teletext single line point mode : 0b11 Enable ttslptrmode, start from the line when previous line is no teletext.
273 // teletext base address source selecion : 0b1
274 HAL_VBI_WriteByte(BK_VBI_7F, 0xF6);
275
276 HAL_VBI_WriteByte(BK_VBI_81, 0x52);
277 HAL_VBI_WriteByte(BK_VBI_86, 0xD6);
278 HAL_VBI_WriteByte(BK_VBI_89, 0xC2);
279 HAL_VBI_WriteByte(BK_VBI_8A, 0x42);
280 HAL_VBI_WriteByte(BK_VBI_8B, 0x24);
281 HAL_VBI_WriteByte(BK_VBI_8D, 0xA5);
282 HAL_VBI_WriteByte(BK_VBI_90, 0x70);
283 HAL_VBI_WriteByte(BK_VBI_C4, 0x32);
284 HAL_VBI_WriteByte(BK_VBI_CB, 0xC4);
285 HAL_VBI_WriteByte(BK_VBI_CC, 0xBD);
286
287 // For VPS detect speed up
288 HAL_VBI_WriteByte(BK_VBI_B4, 0x42);
289 HAL_VBI_WriteByte(BK_VBI_B5, 0x61);
290 HAL_VBI_WriteByte(BK_VBI_BB, 0x06);
291
292 HAL_VBI_WriteByte(BK_VBI_70,0x80); // enable VPS/WSS
293 }
294
VBI_TTX_CheckCircuitReady(void)295 MS_BOOL VBI_TTX_CheckCircuitReady(void)
296 {
297 if( !(HAL_VBI_ReadByte( SLICERREADY ) & _BIT7) )
298 {
299 return FALSE;
300 }
301 else
302 {
303 return TRUE;
304 }
305 }
306
VBI_TTX_GetPacketCount(void)307 MS_U16 VBI_TTX_GetPacketCount(void)
308 {
309 return (MS_U16) HAL_VBI_Read2Byte(VBI_PKTCNT_L);
310 }
311
VBI_GetWSS_Count(void)312 MS_U16 VBI_GetWSS_Count(void)
313 {
314 return (MS_U16) (HAL_VBI_ReadByte(VBI_WSS_COUNT) & 0x07);
315 }
316
VBI_GetVPS_Count(void)317 MS_U16 VBI_GetVPS_Count(void)
318 {
319 return (MS_U16) (HAL_VBI_ReadByte(VBI_VPS_COUNT)>>4);
320 }
321
VBI_TTX_InitSlicer(MS_PHY addr,MS_U16 packetCount)322 void VBI_TTX_InitSlicer(MS_PHY addr, MS_U16 packetCount)
323 {
324 if((addr >> 3) >= (1 << TTX_BUF_BIT))
325 {
326 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
327 //MS_ASSERT(0);
328 }
329
330 addr = addr >> 3; /* 8 byte-aligned */
331
332 /* Initial VBI Buffer Start Address */
333 HAL_VBI_Write2Byte(VBI_BASEADDR_L, addr);
334 HAL_VBI_WriteByte(VBI_BASEADDR_H, addr >> 16);
335 if((addr>>24) & 0x0f)
336 HAL_VBI_WriteByte(VBI_BIT24_ADDR, (HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f))|((addr>>24) & 0x0f));
337 else
338 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f));
339
340 /* Initial VBI Buffer Field Number */
341 HAL_VBI_Write2Byte(VBI_BUF_LEN, packetCount); /* no need to minus 1, follow Venus design */
342
343 /* change dram access mode
344 * 0x371F, BIT7 must be always 1 (otherwise the DMA access related function could be error) */
345 HAL_VBI_WriteByte(TTDEC_COMMAND, _BIT1|_BIT7); /* put header packet into VBI without decoder */
346 }
347
VBI_TTX_EnableSlicer(MS_BOOL bEnable)348 void VBI_TTX_EnableSlicer(MS_BOOL bEnable)
349 {
350 if(bEnable)
351 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) | _BIT0); // enable TT VBI slicer
352 else
353 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) & ~(_BIT0)); // enable TT VBI slicer
354 }
355
VBI_TTX_GetHardware_Indication(void)356 MS_U8 VBI_TTX_GetHardware_Indication(void)
357 {
358 return HAL_VBI_ReadByte(BK_VBI_AF);
359 }
360
VBI_GetVPS_Data(MS_U8 * byte1,MS_U8 * byte2,MS_U8 * byte3,MS_U8 * byte4)361 void VBI_GetVPS_Data(MS_U8 *byte1, MS_U8 *byte2, MS_U8 *byte3, MS_U8 *byte4)
362 {
363 *byte1 = HAL_VBI_ReadByte(BK_VBI_AD);
364 *byte2 = HAL_VBI_ReadByte(BK_VBI_AE);
365 *byte3 = HAL_VBI_ReadByte(BK_VBI_A6);
366 *byte4 = HAL_VBI_ReadByte(BK_VBI_A7);
367 }
368
VBI_GetWSS_Data(void)369 MS_U16 VBI_GetWSS_Data(void)
370 {
371 MS_U8 wWssWordH;
372 MS_U8 wWssWordL;
373
374 wWssWordL = HAL_VBI_ReadByte(BK_VBI_CD);
375 wWssWordH = HAL_VBI_ReadByte(BK_VBI_CE);
376
377 return MAKEWORD(wWssWordH, wWssWordL);
378 }
379
VBI_Set_PalNC_VideoStandard(void)380 void VBI_Set_PalNC_VideoStandard(void)
381 {
382 HAL_VBI_WriteByte(BK_VBI_82, 0x10);
383 HAL_VBI_WriteByte(BK_VBI_83, 0xB9);
384 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
385 // for VPS
386 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
387 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
388 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
389 }
390
VBI_Set_Secam_VideoStandard(void)391 void VBI_Set_Secam_VideoStandard(void)
392 {
393 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|(_BIT6));
394 // for VPS
395 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT5);
396 HAL_VBI_WriteByte(BK_VBI_99, 0x6D);
397 HAL_VBI_WriteByte(BK_VBI_9A, 0x9A);
398 }
399
VBI_Set_Pal_VideoStandard(void)400 void VBI_Set_Pal_VideoStandard(void)
401 {
402 HAL_VBI_WriteByte(BK_VBI_82, 0x8E);
403 HAL_VBI_WriteByte(BK_VBI_83, 0x6B);
404 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
405 // for VPS
406 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
407 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
408 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
409 }
410
VBI_TTX_EnableInterrupt(MS_BOOL bEnable)411 void VBI_TTX_EnableInterrupt(MS_BOOL bEnable)
412 {
413 if(bEnable)
414 {
415 // TTX, VPS and WSS
416 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0);
417 }
418 else
419 {
420 // TTX, VPS and WSS
421 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
422 }
423 }
424
VBI_TTX_ReadIRQ(void)425 MS_U8 VBI_TTX_ReadIRQ(void)
426 {
427 return HAL_VBI_ReadByte(VBI_INTERRUPT_STATUS);
428 }
429
VBI_TTX_ClearIRQ(void)430 void VBI_TTX_ClearIRQ(void)
431 {
432 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
433 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0);
434 }
435
VBI_TTX_EnableLine(MS_U16 StartLine,MS_U16 EndLine)436 void VBI_TTX_EnableLine(MS_U16 StartLine, MS_U16 EndLine)
437 {
438 #define EVEN_FIELD_OFFSET 313
439
440 EN_VBI_FIELD eField = VBI_FIELD_ODD;
441
442 if(StartLine >= EVEN_FIELD_OFFSET)
443 eField = VBI_FIELD_EVEN;
444
445 switch(eField)
446 {
447 case VBI_FIELD_EVEN:
448 HAL_VBI_WriteByteMask(BK_VBI_7E, StartLine - EVEN_FIELD_OFFSET, 0x1F);
449 HAL_VBI_WriteByteMask(BK_VBI_7F, EndLine - EVEN_FIELD_OFFSET, 0x1F);
450 break;
451
452 case VBI_FIELD_ODD:
453 HAL_VBI_WriteByteMask(BK_VBI_7C, StartLine, 0x1F);
454 HAL_VBI_WriteByteMask(BK_VBI_7D, EndLine, 0x1F);
455 break;
456 }
457 }
458
459 MS_U8 TTX_DMA_CMD_MAPPING[]=
460 {
461 DMA_HEADER,
462 DMA_PACKET1_TO_25,
463 DMA_PACKET26_28_29,
464 DMA_PACKET27,
465 DMA_BTT,
466 DMA_AIT,
467 };
468
469 #if defined(__mips__)
_VBI_WaitDMAReady(void)470 static void _VBI_WaitDMAReady(void)
471 {
472 MS_U8 i;
473
474 for(i = 0; i<25; i++)
475 __asm__ __volatile__ ("nop");
476
477 while(1)
478 {
479 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
480 {
481 break;
482 }
483 }
484 }
485 #elif defined(__aeon__)
_VBI_WaitDMAReady(void)486 static void _VBI_WaitDMAReady(void)
487 {
488 MS_U8 i;
489
490 for(i = 0; i<10; i++)
491 __asm__ __volatile__ ("l.nop 0");
492
493 while(1)
494 {
495 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
496 {
497 break;
498 }
499 }
500 }
501 #elif defined(__arm__) || defined (__aarch64__)
_VBI_WaitDMAReady(void)502 static void _VBI_WaitDMAReady(void)
503 {
504 }
505 #else
506 #error "Not support CPU!!"
507 #endif
508
VBI_TTX_DMA_CopyPacket(MS_PHY src_addr,MS_PHY dest_addr,MS_U8 aPacketType)509 void VBI_TTX_DMA_CopyPacket(MS_PHY src_addr, MS_PHY dest_addr, MS_U8 aPacketType)
510 {
511 src_addr = src_addr>>3;
512
513
514 HAL_VBI_Write2Byte(DMASRC_ADR_L, (src_addr) & 0xFFFF);
515 HAL_VBI_WriteByte(DMASRC_ADR_H, (src_addr>>16) & 0xFF);
516
517 if((src_addr>>24) & 0x01)
518 {
519 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMASRC_ADDR24);
520 }
521 else
522 {
523 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMASRC_ADDR24));
524 }
525 dest_addr = dest_addr>>3;
526 HAL_VBI_Write2Byte(DMADES_ADR_L, (dest_addr) & 0xFFFF);
527 HAL_VBI_WriteByte(DMADES_ADR_H, (dest_addr>>16) & 0xFF);
528
529 if((dest_addr>>24) & 0x01)
530 {
531 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMADES_ADDR24);
532 }
533 else
534 {
535 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMADES_ADDR24));
536 }
537 HAL_VBI_WriteByte(DMA_FUNC, TTX_DMA_CMD_MAPPING[aPacketType]); // DMA Function 05 : AIT PAGE X/1~X/22
538
539 HAL_VBI_Write2Byte(DMAQW_CNT_L, 5); // DMA Counter (64Bit)
540 HAL_VBI_WriteByte (DMA_COMMAND, DMA_FIRE); // Fire
541 _VBI_WaitDMAReady();
542 }
543
544 /******************************************************************************/
545 // API for VBI Slicer Initialization::
546 // Initializing VBI Slicer HW
547 /******************************************************************************/
VBI_CC_Init(MS_VIRT ptrRiuAddr,MS_PHY phyAddr,MS_U16 u8Len)548 void VBI_CC_Init(MS_VIRT ptrRiuAddr, MS_PHY phyAddr, MS_U16 u8Len)
549 {
550 MS_U8 u8Tmp;
551
552 // VBI RIU base
553 _ptrVBIRiuBaseAddr = ptrRiuAddr;
554
555 // U8 u8Bank; <- remove the bank change code
556 if((phyAddr >> 3) >= (1 << CC_BUF_BIT))
557 {
558 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
559 //MS_ASSERT(0);
560 }
561 //reset and enable closed caption
562 // u8Bank = XBYTE[BK_SELECT_00]; <- remove the bank change code
563 // XBYTE[BK_SELECT_00] = REG_BANK_VBI; <- remove the bank change code
564 HAL_VBI_WriteByte(BK_VBI_46, 0x00); //disable VBI
565
566 /* --- setup CC Bytes buffer --- */
567 /* set cc base address */
568 //printf("\n init adr=0x%x, %d", u32Addr, u8Len);
569 u8Tmp = HAL_VBI_ReadByte(BK_VBI_1D);
570 u8Tmp &= ~(0xf0);
571 u8Tmp |= (((phyAddr >> 27)&0x0f) << 4);
572 HAL_VBI_WriteByte(BK_VBI_1D, u8Tmp); // CcBaseAddr_24, 25
573 HAL_VBI_WriteByte(BK_VBI_5D, (phyAddr >> 19) & 0xFF); // CcBaseAddr_23_16 (default value is 0xFF so it needs to specify to 0x00)
574 HAL_VBI_WriteByte(BK_VBI_5E, (phyAddr >> 11) & 0xFF); // CcBaseAddr_15_8 (high order)
575 HAL_VBI_WriteByte(BK_VBI_5F, (phyAddr >> 3) & 0xFF); // CCBaseAddr_7_0 (low order)
576
577 /* set cc buffer length */
578 HAL_VBI_WriteByte(BK_VBI_5C, u8Len);
579
580 // CJ
581 HAL_VBI_WriteByte(BK_AFEC_6B, HAL_VBI_ReadByte(BK_AFEC_6B) & 0xF7);
582
583 // Set a constraint for CC patterns in case of wrong encoder's behavior
584 HAL_VBI_WriteByte(BK_VBI_4A, (HAL_VBI_ReadByte(BK_VBI_4A)&0xf0)|0x03);
585
586 HAL_VBI_WriteByte(BK_VBI_46, 0x01); //enable VBI
587
588 // disable vbi software reset
589 u8Tmp = HAL_VBI_ReadByte(BK_VBI_70);
590 u8Tmp &= ~(0x08);
591 HAL_VBI_WriteByte(BK_VBI_70, u8Tmp);
592 }
593
594 /******************************************************************************/
595 /// API to turn on VBI from YPbPr Initialization::
596 /// Initializing VBI Slicer HW
597 /******************************************************************************/
VBI_CC_YPbPr_Init(MS_U8 cvbs_no)598 void VBI_CC_YPbPr_Init(MS_U8 cvbs_no)
599 {
600 // Enable VD parts
601 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x00), 0x09); // enable VD & YPbPr
602 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x02), 0xf0|cvbs_no); // (select VD_ymux for CVBS input from Y)
603 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x04), 0x00); // enable analog blocks, 04, 05
604 HAL_VBI_WriteByte(H_BK_ADC_ATOP(0x04), 0x00);
605 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x05), 0x00);
606 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x06), 0x00); // enable ADC clocks
607 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x12), 0x01); // VD pll =2X (16Fsc)
608
609 // enable VD clocks, setup VD AFEC, AFEC and VBI are just set as AV mode
610 HAL_VBI_WriteByte(H_BK_CHIPTOP(0x16), (HAL_VBI_ReadByte(H_BK_CHIPTOP(0x16)) & (0x0F)));
611 HAL_VBI_WriteByte(L_BK_CHIPTOP(0x17), 0x06);
612 }
613
614 /******************************************************************************/
615 /// API to Set CC data rate::
616 /// Set CC's data rate
617 /// @Param u8Mode \b IN video system mode
618 /// @return TRUE:: Successfully set
619 /// FALSE:: Fail
620 /******************************************************************************/
VBI_CC_DataRateSet(MS_U8 * ptable)621 MS_U8 VBI_CC_DataRateSet(MS_U8 *ptable)
622 {
623 MS_U8 j=1;
624
625 // Set the VBI registers
626 HAL_VBI_WriteByte(BK_VBI_41, ptable[j++]);
627
628 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)&0xC0);
629 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)|ptable[j++]);
630
631 HAL_VBI_WriteByte(BK_VBI_44, ptable[j++]);
632
633 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)&0xC0);
634 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)|ptable[j++]);
635
636 HAL_VBI_WriteByte(BK_VBI_4D, ptable[j++]);
637
638 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)&0xE0);
639 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)|ptable[j++]);
640
641 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)&0xE0);
642 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)|ptable[j++]);
643
644 return TRUE;
645 }
646
647 /******************************************************************************/
648 /// API to get packet count:
649 ///
650 /******************************************************************************/
VBI_CC_GetPacketCnt(void)651 MS_U8 VBI_CC_GetPacketCnt(void)
652 {
653 return (HAL_VBI_ReadByte(BK_VBI_5B)&0x1F);
654 }
655
656 /******************************************************************************/
657 /// API to get odd/even byte-found-identification:
658 /// 2 bits
659 /******************************************************************************/
VBI_CC_GetByteFoundIndication(void)660 MS_U8 VBI_CC_GetByteFoundIndication(void)
661 {
662 return ((HAL_VBI_ReadByte(BK_VBI_56)&0xC0) >> 6);
663 }
664
665 /******************************************************************************/
666 /// API to get packet data:
667 ///
668 /// @return (U32) (Odd_1st_Byte + Odd_2nd_Byte + Even_1st_Byte + Even_2nd_Byte)
669 /******************************************************************************/
VBI_CC_GetPacket(void)670 MS_U32 VBI_CC_GetPacket(void)
671 {
672 MS_U32 u32Tmp;
673
674 u32Tmp = ((MS_U32)HAL_VBI_ReadByte(BK_VBI_57)) << 24;
675 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_58)) << 16;
676 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_59)) << 8;
677 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_5A)) << 0;
678
679 return (u32Tmp);
680 }
681
682 /******************************************************************************/
683 /// API to set CC frame count:
684 ///
685 /******************************************************************************/
VBI_SetCCFrameCnt(MS_U8 cnt)686 void VBI_SetCCFrameCnt(MS_U8 cnt)
687 {
688 MS_U8 u8Tmp=0;
689
690 u8Tmp = HAL_VBI_ReadByte(BK_VBI_46);
691 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5);
692 u8Tmp |= ((cnt&0x1F) << 1);
693
694 HAL_VBI_WriteByte(BK_VBI_46, u8Tmp);
695 }
696
697 /******************************************************************************/
698 /// API to enable CC slicer:
699 ///
700 /******************************************************************************/
VBI_CC_EnableSlicer(MS_BOOL bEnable)701 void VBI_CC_EnableSlicer(MS_BOOL bEnable)
702 {
703 if(bEnable)
704 {
705 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) | _BIT0);
706 }
707 else
708 {
709 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) & 0xFE);
710 }
711 }
712
VBI_CC_SetCCLine(MS_U16 StartLine,MS_U16 EndLine,MS_U8 val)713 void VBI_CC_SetCCLine(MS_U16 StartLine, MS_U16 EndLine, MS_U8 val) // val -> 0:NTSC, 1:PAL
714 {
715 #define CC_EVEN_FIELD_OFFSET 263 // (525 / 2 + 1)
716 #define VBI_CC_NTSC_LINE_OFFSET 3
717 #define VBI_CC_NTSC_DEFAULT_LINE 21
718
719 EN_VBI_FIELD eField = VBI_FIELD_ODD;
720 MS_U8 u8Tmp;
721
722 if(StartLine >= CC_EVEN_FIELD_OFFSET)
723 eField = VBI_FIELD_EVEN;
724
725 if(val == 0)
726 {
727 val = VBI_CC_NTSC_LINE_OFFSET; // offset
728 }
729 else
730 {
731 val = 0; // offset
732 }
733
734 switch(eField)
735 {
736 case VBI_FIELD_EVEN:
737 HAL_VBI_WriteByteMask(BK_VBI_50, (StartLine - CC_EVEN_FIELD_OFFSET), 0x1F);
738 HAL_VBI_WriteByteMask(BK_VBI_51, (EndLine - CC_EVEN_FIELD_OFFSET), 0x1F);
739 break;
740
741 case VBI_FIELD_ODD:
742
743 // start line
744 u8Tmp = HAL_VBI_ReadByte(BK_VBI_40);
745 u8Tmp &= ~(_BIT4 | _BIT5);
746 u8Tmp |= ((StartLine & 0x18) << 1);
747 HAL_VBI_WriteByteMask(BK_VBI_40, u8Tmp, 0x30);
748
749 u8Tmp = HAL_VBI_ReadByte(BK_VBI_41);
750 u8Tmp &= ~(_BIT5 | _BIT6 | _BIT7);
751 u8Tmp |= ((StartLine & 0x07) << 5);
752 HAL_VBI_WriteByteMask(BK_VBI_41, u8Tmp, 0xE0);
753
754 // end line
755 HAL_VBI_WriteByteMask(BK_VBI_41, EndLine, 0x1F);
756 break;
757 }
758 }
759 /******************************************************************************/
760 /// API to set CC SC window length
761 ///
762 /******************************************************************************/
VBI_CC_SetSCWindowLen(MS_U8 u8Len)763 MS_BOOL VBI_CC_SetSCWindowLen(MS_U8 u8Len)
764 {
765 HAL_VBI_WriteByte(BK_VBI_53, u8Len);
766 return TRUE;
767 }
768 /******************************************************************************/
769 /// API to set WSS VPS byte number:
770 ///
771 /******************************************************************************/
VBI_SetWssVpsByteNum(MS_U8 cnt)772 void VBI_SetWssVpsByteNum(MS_U8 cnt)
773 {
774 MS_U8 u8Tmp=0;
775
776 u8Tmp = HAL_VBI_ReadByte(BK_VBI_B8);
777 u8Tmp &= ~(_BIT0 | _BIT1 | _BIT2 | _BIT3);
778 u8Tmp |= (cnt&0x0f);
779
780 HAL_VBI_WriteByte(BK_VBI_B8, u8Tmp);
781 }
782
783 /******************************************************************************/
784 /// API to enable memory protect (the memory range vbi can access)
785 ///
786 /******************************************************************************/
VBI_ProtectMemory(MS_BOOL bEnable,MS_PHY phyAddr,MS_U32 u32Size)787 MS_BOOL VBI_ProtectMemory(MS_BOOL bEnable, MS_PHY phyAddr, MS_U32 u32Size)
788 {
789 MS_U32 u32MiuAddr = (MS_U32)phyAddr >> 3;
790 MS_U32 u32MiuAddrMax = ( ( (MS_U32)phyAddr + u32Size ) >> 3 );
791
792 if(bEnable)
793 {
794 HAL_VBI_WriteByte(BK_VBI_DE, u32MiuAddr & 0xFF);
795 HAL_VBI_WriteByte(BK_VBI_DF, (u32MiuAddr >> 8) & 0xFF);
796 HAL_VBI_WriteByte(BK_VBI_E0, (u32MiuAddr >> 16) & 0xFF);
797
798 HAL_VBI_WriteByte(BK_VBI_E1, u32MiuAddrMax & 0xFF);
799 HAL_VBI_WriteByte(BK_VBI_E2, (u32MiuAddrMax >> 8) & 0xFF);
800 HAL_VBI_WriteByte(BK_VBI_E3, (u32MiuAddrMax >> 16) & 0xFF);
801
802 #if BK_VBI_E7_BUG
803 HAL_VBI_WriteWord(BK_VBI_E6, ( (u32MiuAddr >> 24) & 0x0F ) |
804 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
805 #else
806 HAL_VBI_WriteByte(BK_VBI_E7, ( (u32MiuAddr >> 24) & 0x0F ) |
807 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
808 #endif
809 HAL_VBI_WriteByteMask(BK_VBI_E4, _BIT1, _BIT1);
810 }
811 else
812 {
813 HAL_VBI_WriteByteMask(BK_VBI_E4, 0, _BIT1);
814 }
815
816 return TRUE;
817 }
818 #undef _HAL_VBI_C
819