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Searched refs:REG_CLKGEN2_DC0_SYTNTH (Results 1 – 8 of 8) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c2286 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_STC_Init()
2287 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_STC_Init()
2319 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_STC_Init()
2320 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_STC_Init()
2321 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_STC_Init()
2322 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_STC_Init()
2323 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_STC_Init()
2324 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_STC_Init()
2436 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
2443 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_SetSTCSynth()
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H A DregTSP.h227 #define REG_CLKGEN2_DC0_SYTNTH 0x4A macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c3950 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_STC_Init()
3951 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC3_CW_SEL; in HAL_TSP_STC_Init()
3971 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_STC_Init()
3972 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC2_CW_EN; in HAL_TSP_STC_Init()
3973 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_STC_Init()
3974 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_STC_Init()
3975 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) |= REG_CLKGEN2_STC3_CW_EN; in HAL_TSP_STC_Init()
3976 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC3_CW_EN); in HAL_TSP_STC_Init()
4056 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~REG_CLKGEN2_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()
4063 TSP_CLKGEN2_REG(REG_CLKGEN2_DC0_SYTNTH) &= ~(REG_CLKGEN2_STC2_CW_EN); in HAL_TSP_SetSTCSynth()
[all …]
H A DregTSP.h166 #define REG_CLKGEN2_DC0_SYTNTH 0x4A macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h166 #define REG_CLKGEN2_DC0_SYTNTH 0x4A macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h167 #define REG_CLKGEN2_DC0_SYTNTH 0x4A macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h167 #define REG_CLKGEN2_DC0_SYTNTH 0x4A macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h167 #define REG_CLKGEN2_DC0_SYTNTH 0x4A macro