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Searched refs:INT_PM_AEON (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mbx/hal/k6/mbx/
H A DhalMBXINT.c322 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
324 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h149 #define INT_PM_AEON BIT(0) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/curry/mbx/
H A DhalMBXINT.c322 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
324 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h149 #define INT_PM_AEON BIT(0) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/k6lite/mbx/
H A DhalMBXINT.c322 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
324 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h149 #define INT_PM_AEON BIT(0) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/kano/mbx/
H A DhalMBXINT.c322 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
324 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h149 #define INT_PM_AEON BIT(0) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/mooney/mbx/
H A DhalMBXINT.c319 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
321 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h138 #define INT_PM_AEON BIT(2) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/maldives/mbx/
H A DhalMBXINT.c318 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
319 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h139 #define INT_PM_AEON BIT(1) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/macan/mbx/
H A DhalMBXINT.c321 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
323 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
/utopia/UTPA2-700.0.x/modules/mbx/hal/messi/mbx/
H A DhalMBXINT.c321 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
323 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h138 #define INT_PM_AEON BIT(2) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/mustang/mbx/
H A DhalMBXINT.c318 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
319 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h139 #define INT_PM_AEON BIT(1) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/mainz/mbx/
H A DhalMBXINT.c321 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
323 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h138 #define INT_PM_AEON BIT(2) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/M7821/mbx/
H A DhalMBXINT.c374 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
376 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
/utopia/UTPA2-700.0.x/modules/mbx/hal/manhattan/mbx/
H A DhalMBXINT.c374 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
376 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
H A DregMBXINT.h163 #define INT_PM_AEON BIT(2) macro
/utopia/UTPA2-700.0.x/modules/mbx/hal/maxim/mbx/
H A DhalMBXINT.c374 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
376 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
/utopia/UTPA2-700.0.x/modules/mbx/hal/maserati/mbx/
H A DhalMBXINT.c374 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
376 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()
/utopia/UTPA2-700.0.x/modules/mbx/hal/M7621/mbx/
H A DhalMBXINT.c374 CPU_INT_REG(REG_INT_PMFIRE) |= INT_PM_AEON; in MHAL_MBXINT_Fire()
376 CPU_INT_REG(REG_INT_PMFIRE) &= ~(INT_PM_AEON); in MHAL_MBXINT_Fire()

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