Searched refs:HW4_CFG38_PKT192_SPS_EN1 (Results 1 – 12 of 12) sorted by relevance
5438 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()5453 u16value |= HW4_CFG38_PKT192_SPS_EN1; in HAL_TSP_CAPVR_SPSEnable()5476 case 0: REG16_SET(&_RegCtrl3->CFG3_38,HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_PVR_SPSConfig()
1847 #define HW4_CFG38_PKT192_SPS_EN1 0x0010 macro
1885 #define HW4_CFG38_PKT192_SPS_EN1 0x0010 macro
6855 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()6876 u16value |= HW4_CFG38_PKT192_SPS_EN1; in HAL_TSP_CAPVR_SPSEnable()6905 case 0: REG16_SET(&_RegCtrl3->CFG3_38,HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_PVR_SPSConfig()
1887 #define HW4_CFG38_PKT192_SPS_EN1 0x0010 macro
1967 #define HW4_CFG38_PKT192_SPS_EN1 0x0010 macro
1939 #define HW4_CFG38_PKT192_SPS_EN1 0x0010 macro
2016 #define HW4_CFG38_PKT192_SPS_EN1 0x0010 macro
7402 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()7423 u16value |= HW4_CFG38_PKT192_SPS_EN1; in HAL_TSP_CAPVR_SPSEnable()7452 case 0: REG16_SET(&_RegCtrl3->CFG3_38,HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_PVR_SPSConfig()
7053 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()7074 u16value |= HW4_CFG38_PKT192_SPS_EN1; in HAL_TSP_CAPVR_SPSEnable()7103 case 0: REG16_SET(&_RegCtrl3->CFG3_38,HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_PVR_SPSConfig()