Searched refs:HW4_CFG37_MASK_SCR_PVR4_EN (Results 1 – 11 of 11) sorted by relevance
1839 #define HW4_CFG37_MASK_SCR_PVR4_EN 0x1000 macro
1877 #define HW4_CFG37_MASK_SCR_PVR4_EN 0x1000 macro
5646 REG16_SET(&_RegCtrl3->CFG3_37, HW4_CFG37_MASK_SCR_PVR4_EN); in HAL_PVR_Skip_Scrmb()5666 REG16_CLR(&_RegCtrl3->CFG3_37, HW4_CFG37_MASK_SCR_PVR4_EN); in HAL_PVR_Skip_Scrmb()
1879 #define HW4_CFG37_MASK_SCR_PVR4_EN 0x1000 macro
1959 #define HW4_CFG37_MASK_SCR_PVR4_EN 0x1000 macro
1931 #define HW4_CFG37_MASK_SCR_PVR4_EN 0x1000 macro
2008 #define HW4_CFG37_MASK_SCR_PVR4_EN 0x1000 macro
6161 REG16_SET(&_RegCtrl3->CFG3_37, HW4_CFG37_MASK_SCR_PVR4_EN); in HAL_PVR_Skip_Scrmb()6181 REG16_CLR(&_RegCtrl3->CFG3_37, HW4_CFG37_MASK_SCR_PVR4_EN); in HAL_PVR_Skip_Scrmb()
5790 REG16_SET(&_RegCtrl3->CFG3_37, HW4_CFG37_MASK_SCR_PVR4_EN); in HAL_PVR_Skip_Scrmb()5810 REG16_CLR(&_RegCtrl3->CFG3_37, HW4_CFG37_MASK_SCR_PVR4_EN); in HAL_PVR_Skip_Scrmb()