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Searched refs:HDMITX_PACKET_ISRC_FCNT (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/
H A DhalHDMITx.c156 #define HDMITX_PACKET_ISRC_FCNT 15U ///< 0 ~ 31 macro
2887 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((HDMITX_PACKET_ISRC_FCNT << 3) | 0x0005)); in MHal_HDMITx_SendPacket()
2918 …te(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((u8ISRCCntVal << 8) | (HDMITX_PACKET_ISRC_FCNT << 3) | 0… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/
H A DhalHDMITx.c156 #define HDMITX_PACKET_ISRC_FCNT 15U ///< 0 ~ 31 macro
2870 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((HDMITX_PACKET_ISRC_FCNT << 3) | 0x0005)); in MHal_HDMITx_SendPacket()
2901 …te(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((u8ISRCCntVal << 8) | (HDMITX_PACKET_ISRC_FCNT << 3) | 0… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/
H A DhalHDMITx.c156 #define HDMITX_PACKET_ISRC_FCNT 15U ///< 0 ~ 31 macro
2972 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((HDMITX_PACKET_ISRC_FCNT << 3) | 0x0005)); in MHal_HDMITx_SendPacket()
3003 …te(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((u8ISRCCntVal << 8) | (HDMITX_PACKET_ISRC_FCNT << 3) | 0… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/
H A DhalHDMITx.c156 #define HDMITX_PACKET_ISRC_FCNT 15U ///< 0 ~ 31 macro
2934 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((HDMITX_PACKET_ISRC_FCNT << 3) | 0x0005)); in MHal_HDMITx_SendPacket()
2965 …te(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((u8ISRCCntVal << 8) | (HDMITX_PACKET_ISRC_FCNT << 3) | 0… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/
H A DhalHDMITx.c156 #define HDMITX_PACKET_ISRC_FCNT 15U ///< 0 ~ 31 macro
3258 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((HDMITX_PACKET_ISRC_FCNT << 3) | 0x0005)); in MHal_HDMITx_SendPacket()
3289 …te(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((u8ISRCCntVal << 8) | (HDMITX_PACKET_ISRC_FCNT << 3) | 0… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/
H A DhalHDMITx.c156 #define HDMITX_PACKET_ISRC_FCNT 15U ///< 0 ~ 31 macro
3373 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((HDMITX_PACKET_ISRC_FCNT << 3) | 0x0005)); in MHal_HDMITx_SendPacket()
3404 …te(HDMITX_REG_BASE, REG_PKT_ISRC_CFG_51, ((u8ISRCCntVal << 8) | (HDMITX_PACKET_ISRC_FCNT << 3) | 0… in MHal_HDMITx_SendPacket()