Home
last modified time | relevance | path

Searched refs:CFG_21_22_PVR3_STR2MI_TAIL2 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h1448 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h1487 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
H A DhalTSP.c4957 … REG32_W(&(_RegCtrl2->CFG_21_22), (u32EndAddr1 >> MIU_BUS) & CFG_21_22_PVR3_STR2MI_TAIL2); in HAL_PVR_SetBuf()
5104 REG32_W(&(_RegCtrl2->CFG_21_22), (u32EndAddr1>>MIU_BUS) & CFG_21_22_PVR3_STR2MI_TAIL2); in HAL_PVR_SetStr2Miu_EndAddr()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h1489 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h1545 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h1507 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h1507 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h1567 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
H A DhalTSP.c5467 … REG32_W(&(_RegCtrl2->CFG_21_22), (u32EndAddr1 >> MIU_BUS) & CFG_21_22_PVR3_STR2MI_TAIL2); in HAL_PVR_SetBuf()
5615 REG32_W(&(_RegCtrl2->CFG_21_22), (u32EndAddr1>>MIU_BUS) & CFG_21_22_PVR3_STR2MI_TAIL2); in HAL_PVR_SetStr2Miu_EndAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h1507 …#define CFG_21_22_PVR3_STR2MI_TAIL2 0xffffffff //[31:27] : … macro
H A DhalTSP.c5130 … REG32_W(&(_RegCtrl2->CFG_21_22), (u32EndAddr1 >> MIU_BUS) & CFG_21_22_PVR3_STR2MI_TAIL2); in HAL_PVR_SetBuf()
5257 REG32_W(&(_RegCtrl2->CFG_21_22), (u32EndAddr1>>MIU_BUS) & CFG_21_22_PVR3_STR2MI_TAIL2); in HAL_PVR_SetStr2Miu_EndAddr()