| /rockchip-linux_mpp/mpp/hal/rkenc/h264e/ |
| H A D | hal_h264e_vepu510_tune.c | 140 Vepu510Status *st = ®s->reg_st; in vepu510_h264e_tune_stat_update() local 146 RK_U32 madi_th_cnt0 = st->st_madi_lt_num0.madi_th_lt_cnt0 + in vepu510_h264e_tune_stat_update() 147 st->st_madi_rt_num0.madi_th_rt_cnt0 + in vepu510_h264e_tune_stat_update() 148 st->st_madi_lb_num0.madi_th_lb_cnt0 + in vepu510_h264e_tune_stat_update() 149 st->st_madi_rb_num0.madi_th_rb_cnt0; in vepu510_h264e_tune_stat_update() 150 RK_U32 madi_th_cnt1 = st->st_madi_lt_num0.madi_th_lt_cnt1 + in vepu510_h264e_tune_stat_update() 151 st->st_madi_rt_num0.madi_th_rt_cnt1 + in vepu510_h264e_tune_stat_update() 152 st->st_madi_lb_num0.madi_th_lb_cnt1 + in vepu510_h264e_tune_stat_update() 153 st->st_madi_rb_num0.madi_th_rb_cnt1; in vepu510_h264e_tune_stat_update() 154 RK_U32 madi_th_cnt2 = st->st_madi_lt_num1.madi_th_lt_cnt2 + in vepu510_h264e_tune_stat_update() [all …]
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| /rockchip-linux_mpp/mpp/hal/rkenc/h265e/ |
| H A D | hal_h265e_vepu510_tune.c | 251 RK_U32 madi_th_cnt0 = elem->st.st_madi_lt_num0.madi_th_lt_cnt0 + in vepu510_h265e_tune_stat_update() 252 elem->st.st_madi_rt_num0.madi_th_rt_cnt0 + in vepu510_h265e_tune_stat_update() 253 elem->st.st_madi_lb_num0.madi_th_lb_cnt0 + in vepu510_h265e_tune_stat_update() 254 elem->st.st_madi_rb_num0.madi_th_rb_cnt0; in vepu510_h265e_tune_stat_update() 255 RK_U32 madi_th_cnt1 = elem->st.st_madi_lt_num0.madi_th_lt_cnt1 + in vepu510_h265e_tune_stat_update() 256 elem->st.st_madi_rt_num0.madi_th_rt_cnt1 + in vepu510_h265e_tune_stat_update() 257 elem->st.st_madi_lb_num0.madi_th_lb_cnt1 + in vepu510_h265e_tune_stat_update() 258 elem->st.st_madi_rb_num0.madi_th_rb_cnt1; in vepu510_h265e_tune_stat_update() 259 RK_U32 madi_th_cnt2 = elem->st.st_madi_lt_num1.madi_th_lt_cnt2 + in vepu510_h265e_tune_stat_update() 260 elem->st.st_madi_rt_num1.madi_th_rt_cnt2 + in vepu510_h265e_tune_stat_update() [all …]
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| H A D | hal_h265e_vepu511.c | 2395 cfg1.reg = ®_out->st; in hal_h265e_vepu511_start() 2426 fb->qp_sum += elem->st.qp_sum; in vepu511_h265_set_feedback() 2427 fb->out_strm_size += elem->st.bs_lgth_l32; in vepu511_h265_set_feedback() 2428 fb->sse_sum += (RK_S64)(elem->st.sse_h32 << 16) + in vepu511_h265_set_feedback() 2429 (elem->st.st_sse_bsl.sse_l16 & 0xffff); in vepu511_h265_set_feedback() 2460 fb->st_mb_num += elem->st.st_bnum_b16.num_b16; in vepu511_h265_set_feedback() 2462 fb->st_lvl64_inter_num += elem->st.st_pnum_p64.pnum_p64; in vepu511_h265_set_feedback() 2463 fb->st_lvl32_inter_num += elem->st.st_pnum_p32.pnum_p32; in vepu511_h265_set_feedback() 2464 fb->st_lvl32_intra_num += elem->st.st_pnum_i32.pnum_i32; in vepu511_h265_set_feedback() 2465 fb->st_lvl16_inter_num += elem->st.st_pnum_p16.pnum_p16; in vepu511_h265_set_feedback() [all …]
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| H A D | hal_h265e_vepu580_tune.c | 510 fb->st_md_sad_b16num0 += elem->st.md_sad_b16num0; in vepu580_h265e_tune_stat_update() 511 fb->st_md_sad_b16num1 += elem->st.md_sad_b16num1; in vepu580_h265e_tune_stat_update() 512 fb->st_md_sad_b16num2 += elem->st.md_sad_b16num2; in vepu580_h265e_tune_stat_update() 513 fb->st_md_sad_b16num3 += elem->st.md_sad_b16num3; in vepu580_h265e_tune_stat_update() 514 fb->st_madi_b16num0 += elem->st.madi_b16num0; in vepu580_h265e_tune_stat_update() 515 fb->st_madi_b16num1 += elem->st.madi_b16num1; in vepu580_h265e_tune_stat_update() 516 fb->st_madi_b16num2 += elem->st.madi_b16num2; in vepu580_h265e_tune_stat_update() 517 fb->st_madi_b16num3 += elem->st.madi_b16num3; in vepu580_h265e_tune_stat_update()
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| H A D | hal_h265e_vepu540c.c | 1434 cfg1.reg = ®_out->st; in hal_h265e_v540c_start() 1465 fb->qp_sum += elem->st.qp_sum; in vepu540c_h265_set_feedback() 1467 fb->out_strm_size += elem->st.bs_lgth_l32; in vepu540c_h265_set_feedback() 1469 fb->sse_sum += (RK_S64)(elem->st.sse_h32 << 16) + in vepu540c_h265_set_feedback() 1470 (elem->st.st_sse_bsl.sse_l16 & 0xffff) ; in vepu540c_h265_set_feedback() 1503 fb->st_mb_num += elem->st.st_bnum_b16.num_b16; in vepu540c_h265_set_feedback() 1506 fb->st_lvl64_inter_num += elem->st.st_pnum_p64.pnum_p64; in vepu540c_h265_set_feedback() 1507 fb->st_lvl32_inter_num += elem->st.st_pnum_p32.pnum_p32; in vepu540c_h265_set_feedback() 1508 fb->st_lvl32_intra_num += elem->st.st_pnum_i32.pnum_i32; in vepu540c_h265_set_feedback() 1509 fb->st_lvl16_inter_num += elem->st.st_pnum_p16.pnum_p16; in vepu540c_h265_set_feedback() [all …]
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| H A D | hal_h265e_vepu510.c | 2203 cfg1.reg = ®_out->st; in hal_h265e_v510_start() 2234 fb->qp_sum += elem->st.qp_sum; in vepu510_h265_set_feedback() 2235 fb->out_strm_size += elem->st.bs_lgth_l32; in vepu510_h265_set_feedback() 2236 fb->sse_sum += (RK_S64)(elem->st.sse_h32 << 16) + in vepu510_h265_set_feedback() 2237 (elem->st.st_sse_bsl.sse_l16 & 0xffff); in vepu510_h265_set_feedback() 2268 fb->st_mb_num += elem->st.st_bnum_b16.num_b16; in vepu510_h265_set_feedback() 2270 fb->st_lvl64_inter_num += elem->st.st_pnum_p64.pnum_p64; in vepu510_h265_set_feedback() 2271 fb->st_lvl32_inter_num += elem->st.st_pnum_p32.pnum_p32; in vepu510_h265_set_feedback() 2272 fb->st_lvl32_intra_num += elem->st.st_pnum_i32.pnum_i32; in vepu510_h265_set_feedback() 2273 fb->st_lvl16_inter_num += elem->st.st_pnum_p16.pnum_p16; in vepu510_h265_set_feedback() [all …]
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| H A D | hal_h265e_vepu580.c | 2274 cfg1.reg = ®_out->st; in hal_h265e_v580_send_regs() 2965 stream_len += reg_out->st.bs_lgth_l32; in hal_h265e_v580_start() 2966 fb->qp_sum += reg_out->st.qp_sum; in hal_h265e_v580_start() 2967 fb->out_strm_size += reg_out->st.bs_lgth_l32; in hal_h265e_v580_start() 2968 fb->sse_sum += (RK_S64)(reg_out->st.sse_h32 << 16) + in hal_h265e_v580_start() 2969 (reg_out->st.st_sse_bsl.sse_l16 & 0xffff); in hal_h265e_v580_start() 2970 fb->st_madi += reg_out->st.madi; in hal_h265e_v580_start() 2971 fb->st_madp += reg_out->st.madp; in hal_h265e_v580_start() 2972 fb->st_mb_num += reg_out->st.st_bnum_b16.num_b16; in hal_h265e_v580_start() 2973 fb->st_ctu_num += reg_out->st.st_bnum_cme.num_ctu; in hal_h265e_v580_start() [all …]
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| H A D | hal_h265e_vepu510_reg.h | 819 Vepu510Status st; member
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| H A D | hal_h265e_vepu540c_reg.h | 1082 vepu540c_status st; member
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| H A D | hal_h265e_vepu511_reg.h | 1572 Vepu511Status st; member
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| H A D | hal_h265e_vepu580_reg.h | 3265 vepu580Status st; member
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| /rockchip-linux_mpp/mpp/base/inc/ |
| H A D | mpp_cfg_io.h | 90 rk_s32 mpp_cfg_to_struct(MppCfgObj obj, MppCfgObj type, void *st); 96 rk_s32 mpp_cfg_from_struct(MppCfgObj *obj, MppCfgObj type, void *st);
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| /rockchip-linux_mpp/mpp/base/ |
| H A D | mpp_enc_cfg.c | 88 …STRCT(prefix, st, void *, hier_qp_delta, FLAG_PREV, rc, hi… 89 …STRCT(prefix, st, void *, hier_frame_num, FLAG_PREV, rc, hi… 202 …ENTRY(prefix, st, rk_s32, q_mode, FLAG_BASE(0), jpeg, … 207 …ENTRY(prefix, st, void *, qtable_y, FLAG_INCR, jpeg, … 208 …ENTRY(prefix, st, void *, qtable_u, FLAG_PREV, jpeg, … 209 …ENTRY(prefix, st, void *, qtable_v, FLAG_PREV, jpeg, … 221 …STRCT(prefix, st, void *, aq_thrd_i, FLAG_INCR, hw, aq… 222 …STRCT(prefix, st, void *, aq_thrd_p, FLAG_INCR, hw, aq… 223 …STRCT(prefix, st, void *, aq_step_i, FLAG_INCR, hw, aq… 224 …STRCT(prefix, st, void *, aq_step_p, FLAG_INCR, hw, aq… [all …]
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| H A D | mpp_cfg_io.c | 3057 static void write_struct(MppCfgIoImpl *obj, MppTrie trie, MppCfgStrBuf *str, void *st) in write_struct() argument 3082 mpp_cfg_set_s32(tbl, st, obj->val.s32); in write_struct() 3085 mpp_cfg_set_u32(tbl, st, obj->val.u32); in write_struct() 3088 mpp_cfg_set_s64(tbl, st, obj->val.s64); in write_struct() 3091 mpp_cfg_set_u64(tbl, st, obj->val.u64); in write_struct() 3102 write_struct(pos, trie, str, st); in write_struct() 3107 rk_s32 mpp_cfg_to_struct(MppCfgObj obj, MppCfgObj type, void *st) in mpp_cfg_to_struct() argument 3115 if (!obj || !st) { in mpp_cfg_to_struct() 3116 mpp_loge_f("invalid param obj %p st %p\n", obj, st); in mpp_cfg_to_struct() 3129 write_struct(impl, trie, &str, st + orig->info.data_offset); in mpp_cfg_to_struct() [all …]
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| H A D | mpp_dec_cfg.c | 114 DEC_CFG_SET_ACCESS(mpp_dec_cfg_set_st, void *, st); 131 DEC_CFG_GET_ACCESS(mpp_dec_cfg_get_st, void , st);
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| H A D | mpp_sys_cfg.c | 664 MPP_CFG_SET_ACCESS(mpp_sys_cfg_set_st, void *, st); 696 MPP_CFG_GET_ACCESS(mpp_sys_cfg_get_st, void , st);
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| /rockchip-linux_mpp/kmpp/base/inc/ |
| H A D | kmpp_frame.h | 33 STRCT(prefix, st, MppFrameRational, sar, FLAG_NONE, sar)
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| /rockchip-linux_mpp/kmpp/base/ |
| H A D | kmpp_vdec_cfg.c | 161 MPP_VDEC_KCFG_ACCESS(void *, void *, st);
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| H A D | kmpp_venc_cfg.c | 162 MPP_VENC_KCFG_ACCESS(void *, void *, st);
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| H A D | kmpp_obj.c | 292 MPP_OBJ_STRUCT_ACCESS_IMPL(st, void, % p) 1539 MPP_OBJ_STRUCT_ACCESS(st, void) in MPP_OBJ_STRUCT_ACCESS() argument 1598 MPP_OBJ_STRUCT_TBL_ACCESS(st, void)
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| /rockchip-linux_mpp/mpp/hal/rkenc/jpege/ |
| H A D | hal_jpege_vepu540c.c | 292 cfg1.reg = ®_out->st; in hal_jpege_v540c_start() 357 task->hw_length += elem->st.jpeg_head_bits_l32; in hal_jpege_v540c_wait()
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| H A D | hal_jpege_vepu511_reg.h | 381 Vepu511Status st; member
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| H A D | hal_jpege_vepu511.c | 531 cfg1.reg = ®_out->st; in hal_jpege_vepu511_start() 603 task->hw_length += elem->st.jpeg_head_bits_l32; in hal_jpege_vepu511_wait()
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| H A D | hal_jpege_vepu540c_reg.h | 855 vepu540c_status st; member
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| /rockchip-linux_mpp/ |
| H A D | CHANGELOG.md | 413 - [265e]:Fix the st refernce frame err in tsvc
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