1434     cfg1.reg = &reg_out->st;  in hal_h265e_v540c_start()
1465     fb->qp_sum += elem->st.qp_sum;  in vepu540c_h265_set_feedback()
1467     fb->out_strm_size += elem->st.bs_lgth_l32;  in vepu540c_h265_set_feedback()
1469     fb->sse_sum += (RK_S64)(elem->st.sse_h32 << 16) +  in vepu540c_h265_set_feedback()
1470                    (elem->st.st_sse_bsl.sse_l16 & 0xffff) ;  in vepu540c_h265_set_feedback()
1503     fb->st_mb_num += elem->st.st_bnum_b16.num_b16;  in vepu540c_h265_set_feedback()
1506     fb->st_lvl64_inter_num += elem->st.st_pnum_p64.pnum_p64;  in vepu540c_h265_set_feedback()
1507     fb->st_lvl32_inter_num += elem->st.st_pnum_p32.pnum_p32;  in vepu540c_h265_set_feedback()
1508     fb->st_lvl32_intra_num += elem->st.st_pnum_i32.pnum_i32;  in vepu540c_h265_set_feedback()
1509     fb->st_lvl16_inter_num += elem->st.st_pnum_p16.pnum_p16;  in vepu540c_h265_set_feedback()
1510     fb->st_lvl16_intra_num += elem->st.st_pnum_i16.pnum_i16;  in vepu540c_h265_set_feedback()
1511     fb->st_lvl8_inter_num  += elem->st.st_pnum_p8.pnum_p8;  in vepu540c_h265_set_feedback()
1512     fb->st_lvl8_intra_num  += elem->st.st_pnum_i8.pnum_i8;  in vepu540c_h265_set_feedback()
1513     fb->st_lvl4_intra_num  += elem->st.st_pnum_i4.pnum_i4;  in vepu540c_h265_set_feedback()
1514     memcpy(&fb->st_cu_num_qp[0], &elem->st.st_b8_qp, 52 * sizeof(RK_U32));  in vepu540c_h265_set_feedback()