| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_rkv_reg.c | 582 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align); in rkv_h264d_init()
583 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align); in rkv_h264d_init()
584 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align); in rkv_h264d_init()
863 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in rkv_h264d_control()
866 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align_256_odds); in rkv_h264d_control()
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| H A D | hal_h264d_vdpu34x.c | 746 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align); in vdpu34x_h264d_init()
747 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align); in vdpu34x_h264d_init()
748 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align); in vdpu34x_h264d_init()
1198 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in vdpu34x_h264d_control()
1203 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align_256_odds); in vdpu34x_h264d_control()
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| H A D | hal_h264d_vdpu384a.c | 621 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in vdpu384a_h264d_init()
622 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align); in vdpu384a_h264d_init()
623 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align); in vdpu384a_h264d_init()
1036 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in vdpu384a_h264d_control()
1041 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in vdpu384a_h264d_control()
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| H A D | hal_h264d_vdpu383.c | 670 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in vdpu383_h264d_init()
671 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align); in vdpu383_h264d_init()
672 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align); in vdpu383_h264d_init()
1090 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in vdpu383_h264d_control()
1095 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in vdpu383_h264d_control()
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| H A D | hal_h264d_vdpu382.c | 767 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align); in vdpu382_h264d_init()
768 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, rkv_ver_align); in vdpu382_h264d_init()
769 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align); in vdpu382_h264d_init()
1314 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in vdpu382_h264d_control()
1319 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, rkv_hor_align_256_odds); in vdpu382_h264d_control()
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| /rockchip-linux_mpp/mpp/hal/rkdec/ |
| H A D | vdpu34x_com.c | 218 mpp_slots_set_prop(slots, SLOTS_HOR_ALIGN, mpp_align_64); in vdpu34x_afbc_align_calc()
219 mpp_slots_set_prop(slots, SLOTS_VER_ALIGN, mpp_align_16); in vdpu34x_afbc_align_calc()
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| H A D | vdpu382_com.c | 213 mpp_slots_set_prop(slots, SLOTS_HOR_ALIGN, mpp_align_64); in vdpu382_afbc_align_calc()
214 mpp_slots_set_prop(slots, SLOTS_VER_ALIGN, mpp_align_16); in vdpu382_afbc_align_calc()
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| H A D | vdpu383_com.c | 137 mpp_slots_set_prop(slots, SLOTS_HOR_ALIGN, mpp_align_64); in vdpu383_afbc_align_calc()
138 mpp_slots_set_prop(slots, SLOTS_VER_ALIGN, mpp_align_16); in vdpu383_afbc_align_calc()
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| H A D | vdpu384a_com.c | 149 mpp_slots_set_prop(slots, SLOTS_HOR_ALIGN, mpp_align_64); in vdpu384a_afbc_align_calc()
150 mpp_slots_set_prop(slots, SLOTS_VER_ALIGN, mpp_align_16); in vdpu384a_afbc_align_calc()
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| /rockchip-linux_mpp/mpp/base/inc/ |
| H A D | mpp_buf_slot.h | 260 MPP_RET mpp_slots_set_prop(MppBufSlots slots, SlotsPropType type, void *val);
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| /rockchip-linux_mpp/mpp/codec/ |
| H A D | mpp_dec.c | 110 mpp_slots_set_prop(dec->frame_slots, SLOTS_FRAME_INFO, frame); in mpp_dec_proc_cfg()
583 mpp_slots_set_prop(frame_slots, SLOTS_HAL_FBC_ADJ, &hal_fbc_adj_cfg); in mpp_dec_init()
604 mpp_slots_set_prop(packet_slots, SLOTS_CODING_TYPE, &coding); in mpp_dec_init()
605 mpp_slots_set_prop(frame_slots, SLOTS_CODING_TYPE, &coding); in mpp_dec_init()
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| /rockchip-linux_mpp/mpp/hal/rkdec/avsd/ |
| H A D | hal_avsd_vdpu1.c | 492 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avsd_hor_align); in hal_avsd_vdpu1_init()
493 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avsd_ver_align); in hal_avsd_vdpu1_init()
494 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avsd_len_align); in hal_avsd_vdpu1_init()
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| H A D | hal_avsd_vdpu2.c | 488 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avsd_hor_align); in hal_avsd_vdpu2_init()
489 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avsd_ver_align); in hal_avsd_vdpu2_init()
490 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avsd_len_align); in hal_avsd_vdpu2_init()
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| H A D | hal_avsd_plus.c | 602 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avsd_hor_align); in hal_avsd_plus_init()
603 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avsd_ver_align); in hal_avsd_plus_init()
604 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avsd_len_align); in hal_avsd_plus_init()
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| /rockchip-linux_mpp/mpp/hal/rkdec/avs2d/ |
| H A D | hal_avs2d_vdpu382.c | 613 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avs2d_hor_align_64); in hal_avs2d_vdpu382_init()
615 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avs2d_hor_align); in hal_avs2d_vdpu382_init()
617 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avs2d_hor_align); in hal_avs2d_vdpu382_init()
618 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avs2d_ver_align); in hal_avs2d_vdpu382_init()
619 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avs2d_len_align); in hal_avs2d_vdpu382_init()
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| H A D | hal_avs2d_rkv.c | 547 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avs2d_hor_align_64); in hal_avs2d_rkv_init()
549 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, avs2d_hor_align); in hal_avs2d_rkv_init()
551 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avs2d_ver_align); in hal_avs2d_rkv_init()
552 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avs2d_len_align); in hal_avs2d_rkv_init()
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| H A D | hal_avs2d_vdpu383.c | 570 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in hal_avs2d_vdpu383_init()
571 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_VER_ALIGN, avs2d_ver_align); in hal_avs2d_vdpu383_init()
572 mpp_slots_set_prop(p_hal->frame_slots, SLOTS_LEN_ALIGN, avs2d_len_align); in hal_avs2d_vdpu383_init()
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| /rockchip-linux_mpp/mpp/hal/rkdec/h265d/ |
| H A D | hal_h265d_vdpu384a.c | 93 mpp_slots_set_prop(reg_ctx->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in hal_h265d_vdpu384a_init()
94 mpp_slots_set_prop(reg_ctx->slots, SLOTS_VER_ALIGN, hevc_ver_align); in hal_h265d_vdpu384a_init()
1392 mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in hal_h265d_vdpu384a_control()
1394 mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_444); in hal_h265d_vdpu384a_control()
1399 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in hal_h265d_vdpu384a_control()
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| H A D | hal_h265d_vdpu383.c | 114 mpp_slots_set_prop(reg_ctx->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in hal_h265d_vdpu383_init()
115 mpp_slots_set_prop(reg_ctx->slots, SLOTS_VER_ALIGN, hevc_ver_align); in hal_h265d_vdpu383_init()
1454 mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in hal_h265d_vdpu383_control()
1456 mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_444); in hal_h265d_vdpu383_control()
1461 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in hal_h265d_vdpu383_control()
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| /rockchip-linux_mpp/mpp/codec/dec/avs2/ |
| H A D | avs2d_api.c | 103 mpp_slots_set_prop(p_dec->frame_slots, SLOTS_WIDTH_ALIGN, rkv_ctu_64_align); in avs2d_init()
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| /rockchip-linux_mpp/mpp/hal/rkdec/vp9d/ |
| H A D | hal_vp9d_rkv.c | 204 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_rkv_init()
205 mpp_slots_set_prop(p_hal->slots, SLOTS_VER_ALIGN, vp9_ver_align); in hal_vp9d_rkv_init()
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| H A D | hal_vp9d_vdpu34x.c | 243 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_vdpu34x_init()
244 mpp_slots_set_prop(p_hal->slots, SLOTS_VER_ALIGN, vp9_ver_align); in hal_vp9d_vdpu34x_init()
1073 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_vdpu34x_control()
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| H A D | hal_vp9d_vdpu382.c | 244 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_vdpu382_init()
245 mpp_slots_set_prop(p_hal->slots, SLOTS_VER_ALIGN, vp9_ver_align); in hal_vp9d_vdpu382_init()
1105 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, vp9_hor_align); in hal_vp9d_vdpu382_control()
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| /rockchip-linux_mpp/mpp/hal/rkdec/av1d/ |
| H A D | hal_av1d_vdpu383.c | 1389 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in vdpu383_av1d_init()
1390 mpp_slots_set_prop(p_hal->slots, SLOTS_VER_ALIGN, rkv_ver_align); in vdpu383_av1d_init()
1391 mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align); in vdpu383_av1d_init()
2681 mpp_slots_set_prop(p_hal->slots, SLOTS_LEN_ALIGN, rkv_len_align_422); in vdpu383_av1d_control()
2686 mpp_slots_set_prop(p_hal->slots, SLOTS_HOR_ALIGN, mpp_align_128_odd_plus_64); in vdpu383_av1d_control()
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| /rockchip-linux_mpp/mpp/codec/dec/av1/ |
| H A D | av1d_parser.c | 789 mpp_slots_set_prop(s->slots, SLOTS_HOR_ALIGN, hor_align_16); in get_current_frame()
823 mpp_slots_set_prop(s->slots, SLOTS_NUMERATOR, &value); in get_current_frame()
825 mpp_slots_set_prop(s->slots, SLOTS_DENOMINATOR, &value); in get_current_frame()
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