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/rk3399_rockchip-uboot/arch/arm/mach-at91/arm920t/
H A Dlowlevel_init.S26 .word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
28 .word CONFIG_SYS_TEXT_BASE
93 .word AT91_ASM_MC_EBI_CFG
94 .word CONFIG_SYS_EBI_CFGR_VAL
95 .word AT91_ASM_MC_SMC_CSR0
96 .word CONFIG_SYS_SMC_CSR0_VAL
97 .word AT91_ASM_PMC_PLLAR
98 .word CONFIG_SYS_PLLAR_VAL
99 .word AT91_ASM_PMC_PLLBR
100 .word CONFIG_SYS_PLLBR_VAL
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-at91/arm926ejs/
H A Dlowlevel_init.S161 .word AT91_ASM_WDT_MR
162 .word CONFIG_SYS_WDTC_WDMR_VAL
165 .word AT91_ASM_PIOD_PDR
166 .word CONFIG_SYS_PIOD_PDR_VAL1
167 .word AT91_ASM_PIOD_PUDR
168 .word CONFIG_SYS_PIOD_PPUDR_VAL
169 .word AT91_ASM_PIOD_ASR
170 .word CONFIG_SYS_PIOD_PPUDR_VAL
173 .word AT91_ASM_PIOC_PDR
174 .word CONFIG_SYS_PIOC_PDR_VAL1
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap3/
H A Dlowlevel_init.S35 .word 0xe1600071 @ SMC #1 to call PPA service - hand assembled
133 _go_to_speed: .word go_to_speed
138 .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG1)
140 .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG3)
142 .word STNOR_GPMC_CONFIG3
144 .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG4)
146 .word STNOR_GPMC_CONFIG4
148 .word STNOR_GPMC_CONFIG5
150 .word (GPMC_CONFIG_CS0_BASE + GPMC_CONFIG5)
152 .word CM_CLKEN_PLL
[all …]
/rk3399_rockchip-uboot/arch/arc/cpu/arcv2/
H A Divt.S10 .word _start /* 0x00 - Reset */
11 .word memory_error /* 0x01 - Memory Error */
12 .word instruction_error /* 0x02 - Instruction Error */
15 .word EV_MachineCheck /* 0x03 - Fatal Machine check */
16 .word EV_TLBMissI /* 0x04 - Intruction TLB miss */
17 .word EV_TLBMissD /* 0x05 - Data TLB miss */
18 .word EV_TLBProtV /* 0x06 - Protection Violation or Misaligned Access */
19 .word EV_PrivilegeV /* 0x07 - Privilege Violation */
20 .word EV_SWI /* 0x08 - Software Interrupt */
21 .word EV_Trap /* 0x09 - Trap */
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/
H A Dboot0.h19 .word 0xe59f1024 // ldr r1, [pc, #36] ; 0x170000a0
20 .word 0xe59f0024 // ldr r0, [pc, #36] ; CONFIG_*_TEXT_BASE
21 .word 0xe5810000 // str r0, [r1]
22 .word 0xf57ff04f // dsb sy
23 .word 0xf57ff06f // isb sy
24 .word 0xee1c0f50 // mrc 15, 0, r0, cr12, cr0, {2} ; RMR
25 .word 0xe3800003 // orr r0, r0, #3
26 .word 0xee0c0f50 // mcr 15, 0, r0, cr12, cr0, {2} ; RMR
27 .word 0xf57ff06f // isb sy
28 .word 0xe320f003 // wfi
[all …]
/rk3399_rockchip-uboot/include/asm-generic/bitops/
H A D__ffs.h12 static __always_inline unsigned long __ffs(unsigned long word) in __ffs() argument
17 if ((word & 0xffffffff) == 0) { in __ffs()
19 word >>= 32; in __ffs()
22 if ((word & 0xffff) == 0) { in __ffs()
24 word >>= 16; in __ffs()
26 if ((word & 0xff) == 0) { in __ffs()
28 word >>= 8; in __ffs()
30 if ((word & 0xf) == 0) { in __ffs()
32 word >>= 4; in __ffs()
34 if ((word & 0x3) == 0) { in __ffs()
[all …]
H A D__fls.h12 static __always_inline unsigned long __fls(unsigned long word) in __fls() argument
17 if (!(word & (~0ul << 32))) { in __fls()
19 word <<= 32; in __fls()
22 if (!(word & (~0ul << (BITS_PER_LONG-16)))) { in __fls()
24 word <<= 16; in __fls()
26 if (!(word & (~0ul << (BITS_PER_LONG-8)))) { in __fls()
28 word <<= 8; in __fls()
30 if (!(word & (~0ul << (BITS_PER_LONG-4)))) { in __fls()
32 word <<= 4; in __fls()
34 if (!(word & (~0ul << (BITS_PER_LONG-2)))) { in __fls()
[all …]
/rk3399_rockchip-uboot/board/renesas/rsk7203/
H A Dlowlevel_init.S111 PCCRL4_D0: .word 0x0000
114 PECRL4_D0: .word 0x0000
117 PECRL3_D: .word 0x0000
120 PEIORL_D0: .word 0x1C00
121 PEIORL_D1: .word 0x1C02
123 PCIORL_D: .word 0x4000
126 PFCRH2_D: .word 0x0000
129 PFCRH3_D: .word 0x0000
132 PFCRH1_D: .word 0x0000
135 PFIORH_D: .word 0x0729
[all …]
/rk3399_rockchip-uboot/board/renesas/rsk7264/
H A Dlowlevel_init.S117 FRQCR_D: .word 0x1003
122 STBCR4_D: .word 0x0000
133 PJCR1_D1: .word 0x0000
134 PJCR1_D2: .word 0x0022
136 PJCR2_D: .word 0x0000
139 PJIOR0_D1: .word 0x0FC0
140 PJIOR0_D2: .word 0x0FE0
142 PJDR0_D: .word 0x0FBF
147 PGCR2_D: .word 0x0000
150 PGIOR0_D: .word 0x03F0
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-davinci/
H A Dlowlevel_init.S541 .word 0x01c40000 /* Device Configuration Registers */
543 .word 0x01c40004 /* Device Configuration Registers */
546 .word 0x00000c1f
549 .word 0x01e00004
551 .word 0
553 .word 0x01e00014
555 .word 0x3ffffffd
557 .word 0x01e00018
559 .word 0x3ffffffd
561 .word 0x01e0001c
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dsec_boot.S77 .word 0x0 @ REG0: RESUME_ADDR
78 .word 0x0 @ REG1: RESUME_FLAG
79 .word 0x0 @ REG2
80 .word 0x0 @ REG3
82 .word 0x0 @ REG4: SWITCH_ADDR
84 .word 0x0 @ REG5: CPU1_BOOT_REG
85 .word 0x0 @ REG6
87 .word 0x0 @ REG7: REG_C2_ADDR
89 .word 0x1 @ CPU0_STATE : RESET
90 .word 0x2 @ CPU1_STATE : SECONDARY RESET
[all …]
/rk3399_rockchip-uboot/drivers/misc/
H A Dfsl_iim.c93 u32 word[0x100]; member
101 static int prepare_access(struct fsl_iim **regs, u32 bank, u32 word, int assert, in prepare_access() argument
107 word >= ARRAY_SIZE((*regs)->bank[0].word) || in prepare_access()
129 static int prepare_read(struct fsl_iim **regs, u32 bank, u32 word, u32 *val, in prepare_read() argument
134 ret = prepare_access(regs, bank, word, val != NULL, caller); in prepare_read()
143 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read() argument
149 ret = prepare_read(&regs, bank, word, val, __func__); in fuse_read()
153 *val = iim_read32(&regs->bank[bank].word[word]); in fuse_read()
164 static void direct_access(struct fsl_iim *regs, u32 bank, u32 word, u32 bit, in direct_access() argument
167 iim_write32(&regs->ua, bank << 3 | word >> 5); in direct_access()
[all …]
H A Dmxc_ocotp.c164 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, in prepare_access() argument
170 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || in prepare_access()
178 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { in prepare_access()
211 static int prepare_read(struct ocotp_regs **regs, u32 bank, u32 word, u32 *val, in prepare_read() argument
214 return prepare_access(regs, bank, word, val != NULL, caller); in prepare_read()
217 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read() argument
224 ret = prepare_read(&regs, bank, word, val, __func__); in fuse_read()
229 phy_word = fuse_word_physical(bank, word); in fuse_read()
291 static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word, in setup_direct_access() argument
302 word += 4; in setup_direct_access()
[all …]
/rk3399_rockchip-uboot/arch/x86/cpu/
H A Dstart16.S61 .word 0x10 /* segment */
64 .word 0 /* limit */
73 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
90 .word 0x0000 /* limit_low */
91 .word 0x0000 /* base_low */
98 .word 0x0000 /* limit_low */
99 .word 0x0000 /* base_low */
112 .word 0xffff /* limit_low */
113 .word 0x0000 /* base_low */
126 .word 0xffff /* limit_low */
[all …]
/rk3399_rockchip-uboot/cmd/
H A Dfuse.c48 u32 bank, word, cnt, val; in do_fuse() local
55 strtou32(argv[1], 0, &word)) in do_fuse()
65 for (i = 0; i < cnt; i++, word++) { in do_fuse()
67 printf("\nWord 0x%.8x:", word); in do_fuse()
69 ret = fuse_read(bank, word, &val); in do_fuse()
83 for (i = 0; i < cnt; i++, word++) { in do_fuse()
85 printf("\nWord 0x%.8x:", word); in do_fuse()
87 ret = fuse_sense(bank, word, &val); in do_fuse()
98 for (i = 2; i < argc; i++, word++) { in do_fuse()
103 bank, word, val); in do_fuse()
[all …]
/rk3399_rockchip-uboot/board/espt/
H A Dlowlevel_init.S195 PACR_D: .word 0x1400
198 PBCR_D: .word 0x555A
201 PCCR_D: .word 0x5555
204 PDCR_D: .word 0x0155
205 PECR_D: .word 0x0000
206 PFCR_D: .word 0x0000
207 PGCR_D: .word 0x0000
208 PHCR_D: .word 0x0000
209 PICR_D: .word 0x0800
211 PJCR_D: .word 0x5A57
[all …]
/rk3399_rockchip-uboot/board/renesas/rsk7269/
H A Dlowlevel_init.S116 WTCSR_D: .word 0xA518
117 WTCNT_D: .word 0x5A00
120 IBNR_D: .word 0x0000
123 FRQCR_D: .word 0x0015
127 PJCR3_D: .word 0x5000
130 PECR1_D: .word 0x2011
136 PFCR3_D: .word 0x0010
137 PFCR2_D: .word 0x0101
138 PBCR5_D: .word 0x0111
148 PCCR2_D: .word 0x0001
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/spear/
H A Dspr_lowlevel_init.S137 .word 0xfca00000
139 .word 0xfca8000C
141 .word 0xfca80008
143 .word 0xfca80018
145 .word 0xfca80014
147 .word 0xff000000
149 .word 0x1C0A
151 .word 0x1C0E
153 .word 0x1C06
156 .word 0x9999
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/
H A Dpsci.S107 .word ARM_PSCI_FN_CPU_SUSPEND
108 .word psci_cpu_suspend
109 .word ARM_PSCI_FN_CPU_OFF
110 .word psci_cpu_off
111 .word ARM_PSCI_FN_CPU_ON
112 .word psci_cpu_on
113 .word ARM_PSCI_FN_MIGRATE
114 .word psci_migrate
115 .word ARM_PSCI_0_2_FN_PSCI_VERSION
116 .word psci_version
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/
H A Dsha256_ce_core.S58 .word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5
59 .word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
60 .word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3
61 .word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
62 .word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc
63 .word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
64 .word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7
65 .word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
66 .word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13
67 .word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
[all …]
/rk3399_rockchip-uboot/arch/sandbox/include/asm/
H A Dbitops.h122 static inline unsigned long ffz(unsigned long word) in ffz() argument
126 word = ~word; in ffz()
128 if (word & 0x0000ffff) { in ffz()
129 k -= 16; word <<= 16; in ffz()
131 if (word & 0x00ff0000) { in ffz()
132 k -= 8; word <<= 8; in ffz()
134 if (word & 0x0f000000) { in ffz()
135 k -= 4; word <<= 4; in ffz()
137 if (word & 0x30000000) { in ffz()
138 k -= 2; word <<= 2; in ffz()
[all …]
/rk3399_rockchip-uboot/drivers/net/
H A Dsmc91111.h46 typedef unsigned short word; typedef
73 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
82 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
93 #define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d)
96 #define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
99 #define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
100 word __w = SMC_inw((a),(r)&~1); \
115 word *__b2; \
116 __b2 = (word *) b; \
132 word *__b2; \
[all …]
/rk3399_rockchip-uboot/board/ms7720se/
H A Dlowlevel_init.S104 FRQCR_D: .word 0x1103 /* I:B:P=8:4:2 */
105 WTCNT_D: .word 0x5A00
106 WTCSR_D: .word 0xA506
107 UCLKCR_D: .word 0xA5C0
154 SDMR3_D: .word 0x0000
169 PCCR_D: .word 0x0000
170 PDCR_D: .word 0x0000
171 PECR_D: .word 0x0000
172 PGCR_D: .word 0x0000
173 PHCR_D: .word 0x0000
[all …]
/rk3399_rockchip-uboot/arch/nds32/include/asm/
H A Dbitops.h131 static inline unsigned long ffz(unsigned long word) in ffz() argument
135 word = ~word; in ffz()
137 if (word & 0x0000ffff) { in ffz()
138 k -= 16; word <<= 16; in ffz()
140 if (word & 0x00ff0000) { in ffz()
141 k -= 8; word <<= 8; in ffz()
143 if (word & 0x0f000000) { in ffz()
144 k -= 4; word <<= 4; in ffz()
146 if (word & 0x30000000) { in ffz()
147 k -= 2; word <<= 2; in ffz()
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/
H A Dbitops.h115 static inline unsigned long ffz(unsigned long word) in ffz() argument
119 word = ~word; in ffz()
121 if (word & 0x0000ffff) { k -= 16; word <<= 16; } in ffz()
122 if (word & 0x00ff0000) { k -= 8; word <<= 8; } in ffz()
123 if (word & 0x0f000000) { k -= 4; word <<= 4; } in ffz()
124 if (word & 0x30000000) { k -= 2; word <<= 2; } in ffz()
125 if (word & 0x40000000) { k -= 1; } in ffz()

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