| /rk3399_ARM-atf/lib/el3_runtime/aarch32/ |
| H A D | context_mgmt.c | 61 uint32_t scr, sctlr; in cm_setup_context() local
77 scr = read_scr(); in cm_setup_context()
78 scr &= ~(SCR_NS_BIT | SCR_HCE_BIT); in cm_setup_context()
81 scr |= SCR_NS_BIT; in cm_setup_context()
114 scr |= SCR_HCE_BIT; in cm_setup_context()
121 write_ctx_reg(reg_ctx, CTX_SCR, scr); in cm_setup_context()
180 uint32_t hsctlr, scr; in cm_prepare_el3_exit() local
187 scr = read_ctx_reg(get_regs_ctx(ctx), CTX_SCR); in cm_prepare_el3_exit()
188 if ((scr & SCR_HCE_BIT) != 0U) { in cm_prepare_el3_exit()
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| /rk3399_ARM-atf/plat/arm/board/arm_fpga/ |
| H A D | fpga_pm.c | 81 u_register_t scr = read_scr_el3(); in fpga_cpu_standby() local
82 write_scr_el3(scr|SCR_IRQ_BIT); in fpga_cpu_standby()
85 write_scr_el3(scr); in fpga_cpu_standby()
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_psci.c | 170 u_register_t scr; in sq_cpu_standby() local
174 scr = read_scr_el3(); in sq_cpu_standby()
176 write_scr_el3(scr | SCR_IRQ_BIT); in sq_cpu_standby()
185 write_scr_el3(scr); in sq_cpu_standby()
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| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | execution_state_switch.c | 43 u_register_t spsr, pc, scr, sctlr; in arm_execution_state_switch() local
95 scr = read_ctx_reg(el3_ctx, CTX_SCR_EL3); in arm_execution_state_switch()
103 if ((scr & SCR_HCE_BIT) != 0U) in arm_execution_state_switch()
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| /rk3399_ARM-atf/plat/arm/css/common/ |
| H A D | css_pm.c | 225 unsigned int scr; in css_cpu_standby() local
229 scr = read_scr_el3(); in css_cpu_standby()
237 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in css_cpu_standby()
246 write_scr_el3(scr); in css_cpu_standby()
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| /rk3399_ARM-atf/bl31/ |
| H A D | bl31_traps.c | 61 static bool is_secure_trap_without_sel2(u_register_t scr) in is_secure_trap_without_sel2() argument
63 return ((scr & (SCR_NS_BIT | SCR_EEL2_BIT)) == 0); in is_secure_trap_without_sel2()
66 static unsigned int target_el(unsigned int from_el, u_register_t scr) in target_el() argument
70 } else if (is_tge_enabled() && !is_secure_trap_without_sel2(scr)) { in target_el()
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| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | brcm_pm_ops.c | 195 unsigned int scr; in brcm_cpu_standby() local
199 scr = read_scr_el3(); in brcm_cpu_standby()
207 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in brcm_cpu_standby()
216 write_scr_el3(scr); in brcm_cpu_standby()
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| /rk3399_ARM-atf/plat/nuvoton/npcm845x/ |
| H A D | npcm845x_psci.c | 103 uint64_t scr; in npcm845x_cpu_standby() local
105 scr = read_scr_el3(); in npcm845x_cpu_standby()
106 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in npcm845x_cpu_standby()
117 write_scr_el3(scr); in npcm845x_cpu_standby()
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_pm.c | 42 unsigned long scr; in hikey960_pwr_domain_standby() local
44 scr = read_scr_el3(); in hikey960_pwr_domain_standby()
47 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in hikey960_pwr_domain_standby()
59 write_scr_el3(scr); in hikey960_pwr_domain_standby()
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| /rk3399_ARM-atf/plat/ti/k3/common/ |
| H A D | k3_psci.c | 28 u_register_t scr; in k3_cpu_standby() local
30 scr = read_scr_el3(); in k3_cpu_standby()
32 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in k3_cpu_standby()
39 write_scr_el3(scr); in k3_cpu_standby()
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_scpi_pm.c | 52 u_register_t scr = read_scr_el3(); in sunxi_cpu_standby() local
56 write_scr_el3(scr | SCR_IRQ_BIT); in sunxi_cpu_standby()
58 write_scr_el3(scr); in sunxi_cpu_standby()
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| /rk3399_ARM-atf/plat/rockchip/common/ |
| H A D | plat_pm.c | 183 u_register_t scr; in rockchip_cpu_standby() local
187 scr = read_scr_el3(); in rockchip_cpu_standby()
189 write_scr_el3(scr | SCR_IRQ_BIT); in rockchip_cpu_standby()
198 write_scr_el3(scr); in rockchip_cpu_standby()
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| /rk3399_ARM-atf/plat/mediatek/mt8195/ |
| H A D | plat_pm.c | 181 uint64_t scr; in plat_cpu_standby() local
183 scr = read_scr_el3(); in plat_cpu_standby()
184 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
190 write_scr_el3(scr); in plat_cpu_standby()
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| /rk3399_ARM-atf/plat/mediatek/mt8192/ |
| H A D | plat_pm.c | 183 uint64_t scr; in plat_cpu_standby() local
185 scr = read_scr_el3(); in plat_cpu_standby()
186 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
192 write_scr_el3(scr); in plat_cpu_standby()
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_pm.c | 118 u_register_t scr = read_scr_el3(); in fvp_cpu_standby() local
129 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in fvp_cpu_standby()
143 write_scr_el3(scr); in fvp_cpu_standby()
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| /rk3399_ARM-atf/plat/mediatek/mt8186/ |
| H A D | plat_pm.c | 176 uint64_t scr; in plat_cpu_standby() local
178 scr = read_scr_el3(); in plat_cpu_standby()
179 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
185 write_scr_el3(scr); in plat_cpu_standby()
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| /rk3399_ARM-atf/plat/mediatek/mt8173/ |
| H A D | plat_pm.c | 240 u_register_t scr; in plat_cpu_standby() local
242 scr = read_scr_el3(); in plat_cpu_standby()
243 write_scr_el3(scr | SCR_IRQ_BIT); in plat_cpu_standby()
247 write_scr_el3(scr); in plat_cpu_standby()
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| /rk3399_ARM-atf/drivers/mmc/ |
| H A D | mmc.c | 34 static unsigned int scr[2]__aligned(16) = { 0 }; variable
172 ret = ops->prepare(0, (uintptr_t)&scr, sizeof(scr)); in mmc_sd_switch()
196 ret = ops->read(0, (uintptr_t)&scr, sizeof(scr)); in mmc_sd_switch()
201 if (((scr[0] & SD_SCR_BUS_WIDTH_4) != 0U) && in mmc_sd_switch()
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| /rk3399_ARM-atf/plat/mediatek/mt8183/ |
| H A D | plat_pm.c | 200 u_register_t scr; in plat_cpu_standby() local
202 scr = read_scr_el3(); in plat_cpu_standby()
203 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT); in plat_cpu_standby()
209 write_scr_el3(scr); in plat_cpu_standby()
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| /rk3399_ARM-atf/plat/mediatek/drivers/uart/ |
| H A D | uart.c | 54 mmio_write_32(UART_SCR(base), uart->registers.scr); in mt_uart_restore()
96 uart->registers.scr = mmio_read_32(UART_SCR(base)); in mt_uart_save()
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| H A D | uart.h | 77 uint32_t scr; member
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| /rk3399_ARM-atf/lib/psci/ |
| H A D | psci_common.c | 931 u_register_t scr = read_scr(); in psci_get_ns_ep_info() local
935 write_scr(scr | SCR_NS_BIT); in psci_get_ns_ep_info()
939 sctlr = scr & SCR_HCE_BIT ? read_hsctlr() : ns_sctlr; in psci_get_ns_ep_info()
942 write_scr(scr); in psci_get_ns_ep_info()
957 mode = scr & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc; in psci_get_ns_ep_info()
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| /rk3399_ARM-atf/bl1/aarch32/ |
| H A D | bl1_context_mgmt.c | 80 next_smc_ctx->scr = read_ctx_reg(cpu_reg_ctx, CTX_SCR); in copy_cpu_ctx_to_smc_ctx()
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| /rk3399_ARM-atf/bl32/sp_min/ |
| H A D | sp_min_main.c | 119 next_smc_ctx->scr = read_ctx_reg(cpu_reg_ctx, CTX_SCR); in copy_cpu_ctx_to_smc_stx()
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| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | smccc_helpers.h | 78 u_register_t scr; member
|