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/rk3399_ARM-atf/licenses/
H A DLICENSE-APACHE-2.0.txt13 "Licensor" shall mean the copyright owner or entity authorized by
17 other entities that control, are controlled by, or are under common
19 "control" means (i) the power, direct or indirect, to cause the
20 direction or management of such entity, whether by contract or
21 otherwise, or (ii) ownership of fifty percent (50%) or more of the
22 outstanding shares, or (iii) beneficial ownership of such entity.
24 "You" (or "Your") shall mean an individual or Legal Entity
32 transformation or translation of a Source form, including but
36 "Work" shall mean the work of authorship, whether in Source or
38 copyright notice that is included in or attached to the work
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/rk3399_ARM-atf/make_helpers/toolchains/
H A Drk3399-m0.mk10 rk3399-m0-cc-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
13 rk3399-m0-cpp-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
16 rk3399-m0-as-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
19 rk3399-m0-ld-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
22 rk3399-m0-oc-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)objcopy
25 rk3399-m0-od-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)objdump
28 rk3399-m0-ar-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc-ar
H A Daarch32.mk11 aarch32-cc-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
15 aarch32-cpp-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
19 aarch32-as-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
23 aarch32-ld-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
27 aarch32-oc-default := $(or $(CROSS_COMPILE),arm-none-eabi-)objcopy
31 aarch32-od-default := $(or $(CROSS_COMPILE),arm-none-eabi-)objdump
35 aarch32-ar-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc-ar
H A Daarch64.mk11 aarch64-cc-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
16 aarch64-cpp-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
21 aarch64-as-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
26 aarch64-ld-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
31 aarch64-oc-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)objcopy
36 aarch64-od-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)objdump
41 aarch64-ar-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc-ar
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/
H A Dsoc.def17 # set to GIC400 or GIC500
20 # set to CCI400 or CCN504 or CCN508
23 # indicate layerscape chassis level - set to 3=LSCH3 or 2=LSCH2
26 # TZC IP Details TZC used is TZC380 or TZC400
29 # CONSOLE Details available is NS16550 or PL011
37 # ddr controller - set to MMDC or NXP
40 # ddr phy - set to NXP or SNPS
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/
H A Dsoc.def17 # set to GIC400 or GIC500
20 # set to CCI400 or CCN504 or CCN508
23 # indicate layerscape chassis level - set to 3=LSCH3 or 2=LSCH2
26 # TZC IP Details TZC used is TZC380 or TZC400
29 # CONSOLE Details available is NS16550 or PL011
37 # ddr controller - set to MMDC or NXP
40 # ddr phy - set to NXP or SNPS
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/
H A Dsoc.def17 # Set to GIC400 or GIC500
20 # Set to CCI400 or CCN504 or CCN508
28 # Indicate layerscape chassis level - set to 3=LSCH3 or 2=LSCH2
31 # TZC IP Details TZC used is TZC380 or TZC400
34 # CONSOLE Details available is NS16550 or PL011
/rk3399_ARM-atf/
H A Ddco.txt17 (a) The contribution was created in whole or in part by me and I
19 indicated in the file; or
24 work with modifications, whether created in whole or in part
27 in the file; or
30 person who certified (a), (b) or (c) and I have not modified
37 this project or the open source license(s) involved.
/rk3399_ARM-atf/plat/nxp/soc-ls1028a/
H A Dsoc.def17 # Set to GIC400 or GIC500
20 # Set to CCI400 or CCN504 or CCN508
23 # Layerscape chassis level - set to 3=LSCH3 or 2=LSCH2
26 # TZC used is TZC380 or TZC400
29 # CONSOLE is NS16550 or PL011
/rk3399_ARM-atf/fdts/
H A Dstm32mp157c-dhcom-pdk2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
8 * DHCOM PCB number: 587-200 or newer
9 * PDK2 PCB number: 516-400 or newer
H A Dstm32mp157a-dhcor-avenger96.dts10 * DHCOR PCB number: 586-100 or newer
11 * Avenger96 PCB number: 588-200 or newer
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/
H A Dsoc.def18 # set to GIC400 or GIC500
21 # set to CCI400 or CCN504 or CCN508
24 # indicate layerscape chassis level - set to 3=LSCH3 or 2=LSCH2
27 # TZC IP Details TZC used is TZC380 or TZC400
30 # CONSOLE Details available is NS16550 or PL011
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-internals.rst5 :ref:`build-options <build options>` but enabled or disabled indirectly and
6 depends on certain options to be enabled or disabled.
12 interest when Armv8.4-SecEL2 or RME extension is implemented.
14 and ``SPMD_SPM_AT_SEL2`` is set or when ``ENABLE_RME`` is set to 1 (enabled).
/rk3399_ARM-atf/docs/threat_model/firmware_threat_model/
H A Dthreat_model_el3_spm.rst26 - Not covering advanced or invasive physical attacks such as decapsulation,
48 | DF1 | SP to SPMC communication. FF-A function invocation or |
60 | | LSP can send direct response SP1 or NWd through SPMC. |
111 NS-EL2 (Hypervisor) or NS-EL1 (VM or OS kernel).
114 such as bus probing or DRAM stress.
131 analysis is evaluated based on the environment being ``Server`` or ``Mobile``.
225 | | driver, or Hypervisor although it remains untrusted|
262 | | PARTITION_INFO_GET or memory sharing primitives. |
277 | Threat | **An endpoint may tamper with its own state or the |
282 | | - its own or another SP state by using an unusual |
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H A Dthreat_model_fw_update_and_recovery.rst1 Threat Model for TF-A with PSA FWU or TBBR FWU support
8 the feature PSA firmware update or TBBR firmware update or both enabled.
20 A-class Processors (TF-A) when PSA FWU support is enabled or TBBR FWU mode
59 outside of TF-A security boundary or for a physical attacker to modify it
67 in trial run or accepted run. The attacker tries to manipulate this field,
H A Dthreat_model_firmware_handoff.rst32 - Handoff between stages is atomic; that is, there aren't incremental updates or
53 | | process must be stored in or referenced by the |
67 potentially security-critical values exchanged between boot stages or execution
73 - Sensitive data is not corrupted, tampered with, or misrouted during processing.
75 or domains.
81 or data leakage.
111 | | copy-related bugs (e.g., errors in ``memcpy`` or |
127 | | scrubbed during remove operations; or, when one |
H A Dthreat_model_arm_cca.rst13 TF-A with or without Arm CCA support.
38 probe or tamper with off-chip memory.
45 *than GPT, is either held in on-chip memory, or in external memory but with*
53 read-only memory or write-protected memory. This could be on-chip ROM, on-chip
54 OTP, locked on-chip flash, or write-protected on-chip RAM for example.
61 *[R0050] If all or part of initial boot code is instantiated in on-chip*
62 *memory then other trusted subsystems or application PE cannot modify that*
113 | | TF-A through SMC call interface and/or shared |
125 malicious or faulty code running in the realm world, including R-EL2, R-EL1
155 | | | code or access otherwise restricted HW interface. |
/rk3399_ARM-atf/lib/compiler-rt/
H A DLICENSE.TXT32 use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
41 documentation and/or other materials provided with the distribution.
45 endorse or promote products derived from this Software without specific
63 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
68 all copies or substantial portions of the Software.
88 other licenses gives permission to use the names of the LLVM Team or the
89 University of Illinois to endorse or promote products derived from this
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-11.rst32 (PPI) or a shared peripheral interrupt (SPI).
37 or a EL3 panic depending on the GIC version used in the system.
51 register. Which may cause a data abort or an access to a random EL3 memory region.
66 SDEI client is a valid PPI or SPI, otherwise return an error code indicating
77 /* Interrupt must be either PPI or SPI */
/rk3399_ARM-atf/docs/process/
H A Dplatform-ports-policy.rst11 documented in the :ref:`Porting Guide`), driver APIs (like the GICv3 drivers) or
23 to upstream their platform code or copy the latest version of the code being
38 If a platform, driver or library interface is no longer maintained, it is best
40 can be a 1-stage or 2-stage process (up to the maintainers).
50 platform ports (or soon to be) to this day.
/rk3399_ARM-atf/docs/components/
H A Del3-spmc.rst46 - BL32 option is re-purposed to specify the S-EL1 TEE or SP image.
48 - BL33 option can specify the TFTF binary or a normal world loader
49 such as U-Boot or the UEFI framework payload.
90 for managing access control, programming TZ Controller or MPUs.
234 boot (that is prior to NWd is booted) or run-time.
239 The request made by an Hypervisor or OS kernel is forwarded to the SPMC and
253 When invoked from the Hypervisor or OS kernel, the buffers are mapped into the
258 caller, either it being the Hypervisor or OS kernel, as well as a secure
267 - from Hypervisor or OS kernel to SPMC. The request is relayed by the SPMD.
269 The format (v1.0 or v1.1) of the populated data structure returned is based upon the
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H A Dsecure-partition-manager.rst39 the secure world, managing multiple S-EL1 or S-EL0 partitions `[5]`_.
54 S-EL1 or S-EL2:
57 (Hypervisor or OS kernel) to the SPMC.
73 SPMC located at S-EL1, S-EL2 or EL3:
82 at EL3. If neither ``SPMD_SPM_AT_SEL2`` or ``SPMC_AT_EL3`` are enabled the
105 Other combinations of such build options either break the build or are not
118 the Hafnium binary path (built for the secure world) or the path to a TEE
120 - BL33 option can specify the TFTF binary or a normal world loader
121 such as U-Boot or the UEFI framework payload.
220 When SPMC resides at a lower EL i.e., S-EL1 or S-EL2, it is loaded by BL2 as the
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H A Ddebugfs-design.rst12 TFTF test payload or a Linux kernel module.
28 - / is used as root for virtual "files" (e.g. /fip, or /dev/uart)
43 relative or an absolute offset.
68 options. The interface multiplexes drivers or emulated "files":
75 non-secure layers, or for which no support exists in the NS side).
82 shared buffer is used to pass path string parameters, or e.g. to exchange
114 - a test payload, bootloader or hypervisor running at NS-EL2
/rk3399_ARM-atf/docs/plat/
H A Drpi5.rst40 runtime messages or not. ``-1`` (default) disables the option, any other value
47 (SD, USB) and append ``armstub=bl31.bin`` to config.txt, or just rename the
50 No other config options or files are required by the firmware alone, this will
56 The VPU will preload a BL33 AArch64 image named either ``kernel_2712.img`` or
62 with ``PRELOADED_BL33_BASE`` or ``RPI3_PRELOADED_DTB_BASE``, setting those config
/rk3399_ARM-atf/docs/design_documents/
H A Ddtpm_drivers.rst12 being accessed or tampered with by malicious software or unauthorized users.
23 Platforms opt to use a specific messaging interface, such as |CRB| or |FIFO|,
24 and a specific hardware bus interface, such as |I2C| or |SPI|.
37 via a specific TPM interface like FIFO or CRB. It also includes functions
40 - **Link Layer**: Discrete TPMs may appear as a SPI, I2C, or memory mapped
99 ``tpm_startup()`` only needs to be called once after startup, or if the system

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