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Searched refs:cpuid (Results 1 – 25 of 33) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/common/lpm/
H A Dmt_lp_rm.c39 int mt_lp_rm_reset_constraint(unsigned int idx, unsigned int cpuid, int stateid) in mt_lp_rm_reset_constraint() argument
53 return rc->reset(cpuid, stateid); in mt_lp_rm_reset_constraint()
79 int mt_lp_rm_do_constraint(unsigned int constraint_id, unsigned int cpuid, int stateid) in mt_lp_rm_do_constraint() argument
91 res = rc->run(cpuid, stateid); in mt_lp_rm_do_constraint()
97 int mt_lp_rm_find_constraint(unsigned int idx, unsigned int cpuid, in mt_lp_rm_find_constraint() argument
120 ((*rc)->is_valid(cpuid, stateid))) { in mt_lp_rm_find_constraint()
129 int mt_lp_rm_find_and_run_constraint(unsigned int idx, unsigned int cpuid, in mt_lp_rm_find_and_run_constraint() argument
134 res = mt_lp_rm_find_constraint(idx, cpuid, stateid, priv); in mt_lp_rm_find_and_run_constraint()
136 mt_lp_rm_do_constraint(res, cpuid, stateid); in mt_lp_rm_find_and_run_constraint()
/rk3399_ARM-atf/plat/mediatek/common/lpm_v2/
H A Dmt_lp_rm.c39 int mt_lp_rm_reset_constraint(unsigned int idx, unsigned int cpuid, int stateid) in mt_lp_rm_reset_constraint() argument
51 return rc->reset(cpuid, stateid); in mt_lp_rm_reset_constraint()
75 int mt_lp_rm_do_constraint(unsigned int constraint_id, unsigned int cpuid, int stateid) in mt_lp_rm_do_constraint() argument
86 res = rc->run(cpuid, stateid); in mt_lp_rm_do_constraint()
91 int mt_lp_rm_find_constraint(unsigned int idx, unsigned int cpuid, in mt_lp_rm_find_constraint() argument
112 ((*rc)->is_valid(cpuid, stateid))) { in mt_lp_rm_find_constraint()
121 int mt_lp_rm_find_and_run_constraint(unsigned int idx, unsigned int cpuid, in mt_lp_rm_find_and_run_constraint() argument
126 res = mt_lp_rm_find_constraint(idx, cpuid, stateid, priv); in mt_lp_rm_find_and_run_constraint()
128 mt_lp_rm_do_constraint(res, cpuid, stateid); in mt_lp_rm_find_and_run_constraint()
/rk3399_ARM-atf/plat/xilinx/versal_net/pm_service/
H A Dpm_client.c142 const struct pm_proc *pm_get_proc(uint32_t cpuid) in pm_get_proc() argument
144 if (cpuid < ARRAY_SIZE(pm_procs_all)) { in pm_get_proc()
145 return &pm_procs_all[cpuid]; in pm_get_proc()
148 NOTICE("ERROR: cpuid: %d proc NULL\n", cpuid); in pm_get_proc()
349 uint32_t cpuid = pm_get_cpuid(proc->node_id); in pm_client_wakeup() local
352 if (cpuid == UNDEFINED_CPUID) { in pm_client_wakeup()
366 mmio_write_32(APU_PCIL_CORE_X_IDS_POWER_REG(cpuid), in pm_client_wakeup()
369 mmio_write_32(APU_PCIL_CORE_X_IDS_WAKE_REG(cpuid), in pm_client_wakeup()
/rk3399_ARM-atf/plat/amd/versal2/pm_service/
H A Dpm_client.c99 const struct pm_proc *pm_get_proc(uint32_t cpuid) in pm_get_proc() argument
103 if (cpuid < ARRAY_SIZE(pm_procs_all)) { in pm_get_proc()
104 proc = &pm_procs_all[cpuid]; in pm_get_proc()
106 ERROR("cpuid: %d proc NULL\n", cpuid); in pm_get_proc()
341 uint32_t cpuid = pm_get_cpuid(proc->node_id); in pm_client_wakeup() local
344 if (cpuid != (uint32_t) UNDEFINED_CPUID) { in pm_client_wakeup()
360 uint32_t core_index = cpuid + ((cpuid / 2U) * 2U); in pm_client_wakeup()
/rk3399_ARM-atf/plat/mediatek/include/lpm/
H A Dmt_lp_rm.h58 extern int mt_lp_rm_do_constraint(unsigned int constraint_id, unsigned int cpuid, int stateid);
59 extern int mt_lp_rm_find_constraint(unsigned int idx, unsigned int cpuid,
61 extern int mt_lp_rm_find_and_run_constraint(unsigned int idx, unsigned int cpuid,
63 extern int mt_lp_rm_reset_constraint(unsigned int idx, unsigned int cpuid, int stateid);
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv8_2/
H A Dpwr_ctrl.c236 .cpuid = plat_my_core_pos(), in armv8_2_power_domain_on_finish()
247 nb.cpuid = pm_state.info.cpuid; in armv8_2_power_domain_on_finish()
251 INFO("CPU %u power domain on finished\n", pm_state.info.cpuid); in armv8_2_power_domain_on_finish()
261 .cpuid = plat_my_core_pos(), in armv8_2_power_domain_off()
271 nb.cpuid = pm_state.info.cpuid; in armv8_2_power_domain_off()
275 INFO("CPU %u power domain off\n", pm_state.info.cpuid); in armv8_2_power_domain_off()
285 .cpuid = plat_my_core_pos(), in armv8_2_power_domain_suspend()
290 pm_state.pwr.state_id = armv8_2_get_pwr_stateid(pm_state.info.cpuid); in armv8_2_power_domain_suspend()
295 armv8_2_power_state[pm_state.info.cpuid], &pm_state); in armv8_2_power_domain_suspend()
307 nb.cpuid = pm_state.info.cpuid; in armv8_2_power_domain_suspend()
[all …]
/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dpm.c37 int cpuid; in brcm_pwr_domain_on() local
39 cpuid = plat_brcm_calc_core_pos(mpidr); in brcm_pwr_domain_on()
40 INFO("mpidr :%lu, cpuid:%d\n", mpidr, cpuid); in brcm_pwr_domain_on()
43 if (cpuid > 1) in brcm_pwr_domain_on()
/rk3399_ARM-atf/plat/mediatek/lib/pm/armv9_0/
H A Dpwr_ctrl.c219 .cpuid = plat_my_core_pos(), in power_domain_on_finish()
232 nb.cpuid = pm_state.info.cpuid; in power_domain_on_finish()
235 INFO("CPU %u power domain on finished\n", pm_state.info.cpuid); in power_domain_on_finish()
245 .cpuid = plat_my_core_pos(), in power_domain_off()
258 nb.cpuid = pm_state.info.cpuid; in power_domain_off()
262 INFO("CPU %u power domain off\n", pm_state.info.cpuid); in power_domain_off()
271 .cpuid = plat_my_core_pos(), in power_domain_suspend()
276 pm_state.pwr.state_id = get_pwr_stateid(pm_state.info.cpuid); in power_domain_suspend()
281 cpu_power_state[pm_state.info.cpuid], &pm_state); in power_domain_suspend()
291 nb.cpuid = pm_state.info.cpuid; in power_domain_suspend()
[all …]
/rk3399_ARM-atf/plat/mediatek/include/lpm_v2/
H A Dmt_lp_rm.h65 unsigned int cpuid, int stateid);
66 extern int mt_lp_rm_find_constraint(unsigned int idx, unsigned int cpuid,
69 unsigned int cpuid,
72 unsigned int cpuid, int stateid);
/rk3399_ARM-atf/plat/xilinx/versal/pm_service/
H A Dpm_client.c238 uint32_t cpuid = pm_get_cpuid(proc->node_id); in pm_client_wakeup() local
240 if (cpuid == UNDEFINED_CPUID) { in pm_client_wakeup()
261 const struct pm_proc *pm_get_proc(uint32_t cpuid) in pm_get_proc() argument
263 if (cpuid < ARRAY_SIZE(pm_procs_all)) { in pm_get_proc()
264 return &pm_procs_all[cpuid]; in pm_get_proc()
/rk3399_ARM-atf/lib/pmf/
H A Dpmf_main.c194 unsigned int cpuid) in calc_ts_addr() argument
196 assert(cpuid < PLATFORM_CORE_COUNT); in calc_ts_addr()
202 base_addr += ((cpuid * PMF_PERCPU_TIMESTAMP_SIZE) + in calc_ts_addr()
245 unsigned int cpuid, in __pmf_get_timestamp() argument
248 assert(cpuid < PLATFORM_CORE_COUNT); in __pmf_get_timestamp()
250 tid, cpuid); in __pmf_get_timestamp()
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_cpu_pm.c103 if (cpu_pm_unlikely(cpu_stage[__st->info.cpuid].cpu_status \
225 mtk_cpc_core_on_hint_clr(state->info.cpuid); in cpupm_cpu_resume_common()
226 cpupm_cpu_ildo_state_valid(state->info.cpuid); in cpupm_cpu_resume_common()
271 cpu_stage[state->info.cpuid].cpu_status &= ~PER_CPU_STATUS_HOTPLUG; in cpupm_cpu_resume_smp()
285 PER_CPU_PWR_CTRL(pwr_ctrl, state->info.cpuid); in cpupm_cpu_suspend_smp()
286 mt_smp_power_core_off(state->info.cpuid, &pwr_ctrl); in cpupm_cpu_suspend_smp()
289 cpu_stage[state->info.cpuid].cpu_status |= PER_CPU_STATUS_HOTPLUG; in cpupm_cpu_suspend_smp()
302 .cpuid = cpu, in cpupm_smp_init()
379 mt_lp_rm_find_constraint(0, state->info.cpuid, stateid, NULL); in mcusys_prepare_suspend()
387 mtk_set_cpu_pm_preffered_cpu(state->info.cpuid); in mcusys_prepare_suspend()
[all …]
H A Dmt_cpu_pm_mbox.c51 void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid) in mtk_set_cpu_pm_preffered_cpu() argument
53 return _mcupm_mbox_write(MCUPM_MBOX_WAKEUP_CPU, cpuid); in mtk_set_cpu_pm_preffered_cpu()
H A Dmt_cpu_pm_mbox.h57 void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid);
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_cpu_pm.c65 mtk_cpc_core_on_hint_clr(state->info.cpuid); in cpupm_cpu_resume_common()
87 GIC_WAKEUP_IGNORE(state->info.cpuid)); in cpupm_cpu_resume_smp()
98 PER_CPU_PWR_CTRL(pwr_ctrl, state->info.cpuid); in cpupm_cpu_suspend_smp()
101 GIC_WAKEUP_IGNORE(state->info.cpuid)); in cpupm_cpu_suspend_smp()
109 .cpuid = cpu, in cpupm_smp_init()
171 plat_mt_lp_cpu_rc = mt_lp_rm_find_and_run_constraint(0, state->info.cpuid, stateid, NULL); in mcusys_prepare_suspend()
178 mtk_set_cpu_pm_preffered_cpu(state->info.cpuid); in mcusys_prepare_suspend()
196 mt_lp_rm_reset_constraint(plat_mt_lp_cpu_rc, state->info.cpuid, plat_prev_stateid); in mcusys_prepare_resume()
H A Dmt_cpu_pm_mbox.c50 void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid) in mtk_set_cpu_pm_preffered_cpu() argument
52 return MCUPM_MBOX_WRITE(MCUPM_MBOX_WAKEUP_CPU, cpuid); in mtk_set_cpu_pm_preffered_cpu()
H A Dmt_smp.c19 static inline int is_core_power_status_on(unsigned int cpuid) in is_core_power_status_on() argument
21 return !!(mmio_read_32(CPU_PWR_STATUS) & BIT(cpuid)); in is_core_power_status_on()
H A Dmt_cpu_pm_mbox.h68 void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid);
/rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/
H A Dpm_client.c241 const struct pm_proc *pm_get_proc(uint32_t cpuid) in pm_get_proc() argument
245 if (cpuid < ARRAY_SIZE(pm_procs_all)) { in pm_get_proc()
246 ret = &pm_procs_all[cpuid]; in pm_get_proc()
311 uint32_t cpuid = pm_get_cpuid(proc->node_id); in pm_client_wakeup() local
314 if (cpuid != UNDEFINED_CPUID) { in pm_client_wakeup()
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/drivers/mce/
H A Dmce.c117 uint64_t cpuid = mpidr & MPIDR_CPU_MASK; in mce_get_curr_cpu_ari_base() local
128 cpuid |= 0x4U; in mce_get_curr_cpu_ari_base()
131 return mce_cfg_table[cpuid].ari_base; in mce_get_curr_cpu_ari_base()
137 uint64_t cpuid = mpidr & MPIDR_CPU_MASK; in mce_get_curr_cpu_ops() local
149 cpuid |= 0x4U; in mce_get_curr_cpu_ops()
152 return mce_cfg_table[cpuid].ops; in mce_get_curr_cpu_ops()
/rk3399_ARM-atf/include/lib/pmf/
H A Dpmf_helpers.h92 unsigned int cpuid, \
206 unsigned int tid, unsigned int cpuid, unsigned int flags)\
210 return __pmf_get_timestamp(base_addr, tid, cpuid, flags);\
254 unsigned int cpuid,
/rk3399_ARM-atf/plat/mediatek/mt8173/
H A Dplat_pm.c100 uint32_t cpuid) in cluster_core() argument
102 return &cluster->core[cpuid]; in cluster_core()
117 uint32_t cpuid; in get_core_data() local
120 cpuid = mpidr & MPIDR_CPU_MASK; in get_core_data()
122 return cluster_core(cluster, cpuid); in get_core_data()
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/topology/group_4_3_1/
H A Dpwr.c74 if (state->info.cpuid >= PLATFORM_CORE_COUNT) in pwr_domain_coordination()
77 GET_GROUPMASK(state->info.cpuid, tp.cur_group_bit); in pwr_domain_coordination()
/rk3399_ARM-atf/plat/mediatek/drivers/ptp3/
H A Dptp3_common.c100 ptp3_core_init(data->cpuid); in ptp3_handle_pwr_on_event()
114 ptp3_core_deinit(data->cpuid); in ptp3_handle_pwr_off_event()
/rk3399_ARM-atf/plat/xilinx/common/include/
H A Dpm_common.h63 const struct pm_proc *pm_get_proc(uint32_t cpuid);

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