| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 37 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_on() 39 curr_cluster = MPIDR_AFFLVL1_VAL(read_mpidr()); in hikey_pwr_domain_on() 56 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_on_finish() 65 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in hikey_pwr_domain_on_finish() 82 cluster = MPIDR_AFFLVL1_VAL(mpidr); in hikey_pwr_domain_off() 90 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in hikey_pwr_domain_off() 121 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in hikey_pwr_domain_suspend() 149 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in hikey_pwr_domain_suspend_finish()
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| /rk3399_ARM-atf/drivers/nxp/interconnect/ |
| H A D | ls_cci.c | 19 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_ls_interconnect_enter_coherency() 31 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_ls_interconnect_exit_coherency()
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| H A D | ls_ccn.c | 18 ccn_enter_snoop_dvm_domain(1ULL << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_ls_interconnect_enter_coherency() 30 ccn_exit_snoop_dvm_domain(1ULL << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_ls_interconnect_exit_coherency()
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_cci.c | 32 cci_enable_snoop_dvm_reqs((unsigned int)MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_arm_interconnect_enter_coherency() 40 cci_disable_snoop_dvm_reqs((unsigned int)MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_arm_interconnect_exit_coherency()
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| H A D | arm_ccn.c | 39 ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_arm_interconnect_enter_coherency() 47 ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_arm_interconnect_exit_coherency()
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_ccn.c | 36 ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_sq_interconnect_enter_coherency() 44 ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_sq_interconnect_exit_coherency()
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| /rk3399_ARM-atf/plat/brcm/common/ |
| H A D | brcm_ccn.c | 30 ccn_enter_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_brcm_interconnect_enter_coherency() 35 ccn_exit_snoop_dvm_domain(1 << MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_brcm_interconnect_exit_coherency()
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| /rk3399_ARM-atf/plat/marvell/armada/common/ |
| H A D | marvell_cci.c | 42 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_marvell_interconnect_enter_coherency() 51 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in plat_marvell_interconnect_exit_coherency()
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| /rk3399_ARM-atf/plat/imx/imx8qm/ |
| H A D | imx8qm_psci.c | 77 unsigned int cluster_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_on() 108 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in imx_pwr_domain_on_finish() 117 unsigned int cluster_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_off() 136 unsigned int cluster_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_domain_suspend() 154 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in imx_domain_suspend() 167 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in imx_domain_suspend() 212 unsigned int cluster_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_domain_suspend_finish() 251 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in imx_domain_suspend_finish() 263 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr)); in imx_domain_suspend_finish()
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| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | imx93_psci.c | 72 core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_on() 99 unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_on_finish() 128 unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_off() 150 unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_suspend() 175 unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_suspend_finish()
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| H A D | plat_topology.c | 36 cpu_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/imx/imx9/common/ |
| H A D | imx9_psci_common.c | 80 uint32_t core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_on() 111 uint32_t core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_on_finish() 122 uint32_t core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_off() 151 unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_suspend() 218 unsigned int core_id = MPIDR_AFFLVL1_VAL(mpidr); in imx_pwr_domain_suspend_finish()
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| H A D | plat_topology.c | 36 cpu_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_cci.c | 27 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in __uniphier_cci_enable() 32 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in __uniphier_cci_disable()
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| /rk3399_ARM-atf/plat/rockchip/common/aarch64/ |
| H A D | platform_common.c | 91 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_enable() 98 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_disable()
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| /rk3399_ARM-atf/plat/qti/msm8916/ |
| H A D | msm8916_pm.c | 30 #define MPIDR_APCS_CLUSTER(mpidr) !MPIDR_AFFLVL1_VAL(mpidr) 64 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); in msm8916_pwr_domain_on_finish()
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| H A D | msm8916_topology.c | 24 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/mediatek/mt8173/aarch64/ |
| H A D | platform_common.c | 83 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_enable() 88 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_disable()
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_topology.c | 94 cpu_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr() 99 clus_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | brcm_pm_ops.c | 77 unsigned long cluster_id = MPIDR_AFFLVL1_VAL(read_mpidr()); in brcm_pwr_domain_on_finish() 105 switch (MPIDR_AFFLVL1_VAL(mpidr)) { in brcm_power_down_common() 123 ERROR("Invalid cluster #%" PRIx64 "\n", MPIDR_AFFLVL1_VAL(mpidr)); in brcm_power_down_common() 172 unsigned long cluster_id = MPIDR_AFFLVL1_VAL(read_mpidr_el1()); in brcm_pwr_domain_off()
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| /rk3399_ARM-atf/plat/renesas/common/ |
| H A D | bl31_plat_setup.c | 61 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_enable() 66 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_disable()
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_topology.c | 23 unsigned int cluster = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/nuvoton/common/ |
| H A D | nuvoton_topology.c | 42 cluster_id = (unsigned int)MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx8_topology.c | 32 cluster_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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| /rk3399_ARM-atf/plat/rpi/common/ |
| H A D | rpi3_topology.c | 61 cluster_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
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