Searched refs:rcc_base (Results 1 – 5 of 5) sorted by relevance
43 vaddr_t rcc_base = stm32_rcc_base(); in reset_assert() local54 io_clrbits32(rcc_base + RCC_MP_GCR, RCC_MP_GCR_BOOT_MCU); in reset_assert()69 io_write32(rcc_base + offset, bit_mask); in reset_assert()74 if (IO_READ32_POLL_TIMEOUT(rcc_base + offset, value, in reset_assert()88 vaddr_t rcc_base = stm32_rcc_base(); in reset_deassert() local99 io_setbits32(rcc_base + RCC_MP_GCR, RCC_MP_GCR_BOOT_MCU); in reset_deassert()113 io_write32(rcc_base + offset, bit_mask); in reset_deassert()118 if (IO_READ32_POLL_TIMEOUT(rcc_base + offset, value, in reset_deassert()
632 vaddr_t rcc_base = stm32_rcc_base(); in stm32mp1_clk_get_parent() local653 p_sel = (io_read32(rcc_base + sel->offset) >> sel->src) & sel->msk; in stm32mp1_clk_get_parent()738 vaddr_t rcc_base = stm32_rcc_base(); in get_clock_rate() local743 reg = io_read32(rcc_base + RCC_MPCKSELR); in get_clock_rate()755 reg = io_read32(rcc_base + RCC_MPCKDIVR); in get_clock_rate()773 reg = io_read32(rcc_base + RCC_ASSCKSELR); in get_clock_rate()789 reg = io_read32(rcc_base + RCC_AXIDIVR); in get_clock_rate()794 reg = io_read32(rcc_base + RCC_APB4DIVR); in get_clock_rate()798 reg = io_read32(rcc_base + RCC_APB5DIVR); in get_clock_rate()810 reg = io_read32(rcc_base + RCC_MSSCKSELR); in get_clock_rate()[all …]
184 uintptr_t rcc_base; member731 uintptr_t rcc_base = priv->base; in stm32_rcc_has_access_by_id() local734 cid_reg_value = io_read32(rcc_base + RCC_R0CIDCFGR + 0x8 * id); in stm32_rcc_has_access_by_id()1254 pdata->rcc_base = stm32_rcc_base(); in stm32_clk_parse_fdt()1630 uintptr_t rcc_base = stm32_rcc_base(); in wait_predivsr() local1636 previvsr = rcc_base + RCC_PREDIVSR1; in wait_predivsr()1639 previvsr = rcc_base + RCC_PREDIVSR2; in wait_predivsr()1654 uintptr_t rcc_base = stm32_rcc_base(); in wait_findivsr() local1660 finvivsr = rcc_base + RCC_FINDIVSR1; in wait_findivsr()1663 finvivsr = rcc_base + RCC_FINDIVSR2; in wait_findivsr()[all …]
129 uintptr_t rcc_base; member1272 pdata->rcc_base = stm32_rcc_base(); in stm32_clk_parse_fdt()1634 uintptr_t rcc_base = stm32_rcc_base(); in wait_predivsr() local1640 previvsr = rcc_base + RCC_PREDIVSR1; in wait_predivsr()1643 previvsr = rcc_base + RCC_PREDIVSR2; in wait_predivsr()1658 uintptr_t rcc_base = stm32_rcc_base(); in wait_findivsr() local1664 finvivsr = rcc_base + RCC_FINDIVSR1; in wait_findivsr()1667 finvivsr = rcc_base + RCC_FINDIVSR2; in wait_findivsr()1682 uintptr_t rcc_base = stm32_rcc_base(); in wait_xbar_sts() local1683 uintptr_t xbar_cfgr = rcc_base + RCC_XBAR0CFGR + (0x4 * channel); in wait_xbar_sts()[all …]
88 uintptr_t rcc_base; member1925 uintptr_t rcc_base = priv->base; in ck_timer_get_rate_ops() local1927 prescaler = io_read32(rcc_base + cfg->apbdiv) & APB_DIV_MASK; in ck_timer_get_rate_ops()1929 timpre = io_read32(rcc_base + cfg->timpre) & TIM_PRE_MASK; in ck_timer_get_rate_ops()