Lines Matching refs:rcc_base

184 	uintptr_t rcc_base;  member
731 uintptr_t rcc_base = priv->base; in stm32_rcc_has_access_by_id() local
734 cid_reg_value = io_read32(rcc_base + RCC_R0CIDCFGR + 0x8 * id); in stm32_rcc_has_access_by_id()
1254 pdata->rcc_base = stm32_rcc_base(); in stm32_clk_parse_fdt()
1630 uintptr_t rcc_base = stm32_rcc_base(); in wait_predivsr() local
1636 previvsr = rcc_base + RCC_PREDIVSR1; in wait_predivsr()
1639 previvsr = rcc_base + RCC_PREDIVSR2; in wait_predivsr()
1654 uintptr_t rcc_base = stm32_rcc_base(); in wait_findivsr() local
1660 finvivsr = rcc_base + RCC_FINDIVSR1; in wait_findivsr()
1663 finvivsr = rcc_base + RCC_FINDIVSR2; in wait_findivsr()
1678 uintptr_t rcc_base = stm32_rcc_base(); in wait_xbar_sts() local
1679 uintptr_t xbar_cfgr = rcc_base + RCC_XBAR0CFGR + (0x4 * channel); in wait_xbar_sts()
1731 uintptr_t rcc_base = stm32_rcc_base(); in flexclkgen_config_channel() local
1736 io_clrsetbits32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel), in flexclkgen_config_channel()
1745 io_clrsetbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel), in flexclkgen_config_channel()
1755 io_clrsetbits32(rcc_base + RCC_XBAR0CFGR + (0x4 * channel), in flexclkgen_config_channel()
1759 io_setbits32(rcc_base + RCC_XBAR0CFGR + (0x4 * channel), in flexclkgen_config_channel()
2255 uintptr_t rcc_base = clk_stm32_get_rcc_base(); in clk_stm32_flexgen_get_parent() local
2258 address = rcc_base + RCC_XBAR0CFGR + (cfg->flex_id * 4); in clk_stm32_flexgen_get_parent()
2265 uintptr_t rcc_base = clk_stm32_get_rcc_base(); in clk_stm32_flexgen_set_parent() local
2270 io_clrsetbits32(rcc_base + RCC_XBAR0CFGR + (channel), in clk_stm32_flexgen_set_parent()
2284 uintptr_t rcc_base = clk_stm32_get_rcc_base(); in clk_stm32_flexgen_get_rate() local
2290 prediv = io_read32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel)) & in clk_stm32_flexgen_get_rate()
2292 findiv = io_read32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel)) & in clk_stm32_flexgen_get_rate()
2378 uintptr_t rcc_base = stm32_rcc_base(); in clk_stm32_flexgen_set_rate() local
2390 io_clrsetbits32(rcc_base + RCC_PREDIV0CFGR + (0x4 * channel), in clk_stm32_flexgen_set_rate()
2400 io_clrsetbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel), in clk_stm32_flexgen_set_rate()
2413 uintptr_t rcc_base = clk_stm32_get_rcc_base(); in clk_stm32_flexgen_enable() local
2442 io_setbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel), in clk_stm32_flexgen_enable()
2451 uintptr_t rcc_base = clk_stm32_get_rcc_base(); in clk_stm32_flexgen_disable() local
2455 io_clrbits32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel), in clk_stm32_flexgen_disable()
2486 uintptr_t rcc_base = clk_stm32_get_rcc_base(); in ck_timer_get_rate_ops() local
2490 prescaler = io_read32(rcc_base + cfg->apbdiv) & APB_DIV_MASK; in ck_timer_get_rate_ops()
2492 timpre = io_read32(rcc_base + cfg->timpre) & TIM_PRE_MASK; in ck_timer_get_rate_ops()
3491 vaddr_t reg_offset = pdata->rcc_base + RCC_SEMCR(i); in handle_available_semaphores()
3499 cidcfgr = io_read32(pdata->rcc_base + RCC_CIDCFGR(i)); in handle_available_semaphores()
3504 if (!(io_read32(pdata->rcc_base + RCC_SECCFGR(index)) & in handle_available_semaphores()
3549 io_clrbits32(pdata->rcc_base + RCC_CIDCFGR(i), in apply_rcc_rif_config()
3560 io_clrsetbits32(pdata->rcc_base + RCC_PRIVCFGR(index), in apply_rcc_rif_config()
3563 io_clrsetbits32(pdata->rcc_base + RCC_SECCFGR(index), in apply_rcc_rif_config()
3578 io_clrsetbits32(pdata->rcc_base + RCC_CIDCFGR(i), in apply_rcc_rif_config()
3584 io_clrsetbits32(pdata->rcc_base + RCC_RCFGLOCKR(index), in apply_rcc_rif_config()
3596 if ((io_read32(pdata->rcc_base + RCC_PRIVCFGR(index)) & in apply_rcc_rif_config()
3601 if ((io_read32(pdata->rcc_base + RCC_SECCFGR(index)) & in apply_rcc_rif_config()
3625 pdata->conf_data.cid_confs[i] = io_read32(pdata->rcc_base + in stm32_rcc_rif_pm_suspend()
3629 pdata->conf_data.priv_conf[i] = io_read32(pdata->rcc_base + in stm32_rcc_rif_pm_suspend()
3631 pdata->conf_data.sec_conf[i] = io_read32(pdata->rcc_base + in stm32_rcc_rif_pm_suspend()
3633 pdata->conf_data.lock_conf[i] = io_read32(pdata->rcc_base + in stm32_rcc_rif_pm_suspend()