Searched refs:dtpr1 (Results 1 – 10 of 10) sorted by relevance
28 .dtpr1 = 0x328341E0ul,79 .dtpr1 = 0x32834200ul,
27 .dtpr1 = 0x12868300ul,
27 unsigned int dtpr1; member
78 u32 dtpr1; member
33 debug_ddr_cfg("dtpr1 0x%08X\n", ptr->dtpr1); in dump_phy_config()331 spd_cb->phy_cfg.dtpr1 = (spd->t_wlo & 0xf) << 26 | in init_ddr3param()
51 __raw_writel(phy_cfg->dtpr1, base + KS2_DDRPHY_DTPR1_OFFSET); in ddr3_init_ddrphy()
183 u32 dtpr1; /* 0x4c dram timing parameters register 1 */ member
172 u32 dtpr1; /* 0x38 dram timing parameters register 1 */ member
90 dtpr1
142 (MCTL_TAOND << 0), &mctl_phy->dtpr1); in mctl_channel_init()