Searched refs:device_reg_24xx (Results 1 – 11 of 11) sorted by relevance
10 #define IOBASE_ADDR offsetof(struct device_reg_24xx, iobase_addr)
108 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla27xx_dump_mpi_ram()188 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_dump_ram()283 qla24xx_read_window(struct device_reg_24xx __iomem *reg, uint32_t iobase, in qla24xx_read_window()297 qla24xx_pause_risc(struct device_reg_24xx __iomem *reg, struct qla_hw_data *ha) in qla24xx_pause_risc()313 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_soft_reset()1070 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_fw_dump()1316 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla25xx_fw_dump()1629 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla81xx_fw_dump()1944 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla83xx_fw_dump()2641 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in ql_dump_regs()
455 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_read_flash_dword()498 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_write_flash_dword()1195 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_unprotect_flash()1220 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_protect_flash()1459 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_write_nvram_data()1731 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_beacon_blink()1859 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_beacon_on()1911 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_beacon_off()
86 qla27xx_read_reg(__iomem struct device_reg_24xx *reg, in qla27xx_read_reg()95 qla27xx_write_reg(__iomem struct device_reg_24xx *reg, in qla27xx_write_reg()106 qla27xx_read_window(__iomem struct device_reg_24xx *reg, in qla27xx_read_window()
452 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; in qla81xx_idc_event()979 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in qla2x00_async_event()3357 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_mbx_completion()3587 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla2xxx_check_risc_status()3645 struct device_reg_24xx __iomem *reg; in qla24xx_intr_handler()3748 struct device_reg_24xx __iomem *reg; in qla24xx_msix_rsp_q()3780 struct device_reg_24xx __iomem *reg; in qla24xx_msix_default()3893 struct device_reg_24xx __iomem *reg; in qla2xxx_msix_rsp_q_hs()
375 extern void qla24xx_pause_risc(struct device_reg_24xx __iomem *,
2293 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla2x00_initialize_adapter()2568 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_pci_config()2842 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_reset_risc()2969 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; in qla25xx_read_risc_sema_reg()2978 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; in qla25xx_write_risc_sema_reg()7294 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_reset_adapter()
1090 struct device_reg_24xx { struct
1212 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla2x00_isp_reg_stat()1911 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_enable_intrs()1924 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_disable_intrs()7483 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in qla2xxx_pci_mmio_enabled()7781 BUILD_BUG_ON(sizeof(struct device_reg_24xx) != 256); in qla2x00_module_init()
934 struct device_reg_24xx isp24;
5428 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla81xx_write_mpi_register()