xref: /OK3568_Linux_fs/kernel/drivers/scsi/qla2xxx/qla_isr.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * QLogic Fibre Channel HBA Driver
4*4882a593Smuzhiyun  * Copyright (c)  2003-2014 QLogic Corporation
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun #include "qla_def.h"
7*4882a593Smuzhiyun #include "qla_target.h"
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/cpu.h>
12*4882a593Smuzhiyun #include <linux/t10-pi.h>
13*4882a593Smuzhiyun #include <scsi/scsi_tcq.h>
14*4882a593Smuzhiyun #include <scsi/scsi_bsg_fc.h>
15*4882a593Smuzhiyun #include <scsi/scsi_eh.h>
16*4882a593Smuzhiyun #include <scsi/fc/fc_fs.h>
17*4882a593Smuzhiyun #include <linux/nvme-fc-driver.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
20*4882a593Smuzhiyun static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
21*4882a593Smuzhiyun static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
22*4882a593Smuzhiyun static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
23*4882a593Smuzhiyun 	sts_entry_t *);
24*4882a593Smuzhiyun static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha,
25*4882a593Smuzhiyun 	struct purex_item *item);
26*4882a593Smuzhiyun static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha,
27*4882a593Smuzhiyun 	uint16_t size);
28*4882a593Smuzhiyun static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha,
29*4882a593Smuzhiyun 	void *pkt);
30*4882a593Smuzhiyun static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha,
31*4882a593Smuzhiyun 	void **pkt, struct rsp_que **rsp);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static void
qla27xx_process_purex_fpin(struct scsi_qla_host * vha,struct purex_item * item)34*4882a593Smuzhiyun qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	void *pkt = &item->iocb;
37*4882a593Smuzhiyun 	uint16_t pkt_size = item->size;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d,
40*4882a593Smuzhiyun 	       "%s: Enter\n", __func__);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e,
43*4882a593Smuzhiyun 	       "-------- ELS REQ -------\n");
44*4882a593Smuzhiyun 	ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f,
45*4882a593Smuzhiyun 		       pkt, pkt_size);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun const char *const port_state_str[] = {
51*4882a593Smuzhiyun 	"Unknown",
52*4882a593Smuzhiyun 	"UNCONFIGURED",
53*4882a593Smuzhiyun 	"DEAD",
54*4882a593Smuzhiyun 	"LOST",
55*4882a593Smuzhiyun 	"ONLINE"
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static void
qla24xx_process_abts(struct scsi_qla_host * vha,struct purex_item * pkt)59*4882a593Smuzhiyun qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct abts_entry_24xx *abts =
62*4882a593Smuzhiyun 	    (struct abts_entry_24xx *)&pkt->iocb;
63*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
64*4882a593Smuzhiyun 	struct els_entry_24xx *rsp_els;
65*4882a593Smuzhiyun 	struct abts_entry_24xx *abts_rsp;
66*4882a593Smuzhiyun 	dma_addr_t dma;
67*4882a593Smuzhiyun 	uint32_t fctl;
68*4882a593Smuzhiyun 	int rval;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	ql_log(ql_log_warn, vha, 0x0287,
73*4882a593Smuzhiyun 	    "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n",
74*4882a593Smuzhiyun 	    abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id,
75*4882a593Smuzhiyun 	    abts->seq_id, abts->seq_cnt);
76*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
77*4882a593Smuzhiyun 	    "-------- ABTS RCV -------\n");
78*4882a593Smuzhiyun 	ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
79*4882a593Smuzhiyun 	    (uint8_t *)abts, sizeof(*abts));
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma,
82*4882a593Smuzhiyun 	    GFP_KERNEL);
83*4882a593Smuzhiyun 	if (!rsp_els) {
84*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x0287,
85*4882a593Smuzhiyun 		    "Failed allocate dma buffer ABTS/ELS RSP.\n");
86*4882a593Smuzhiyun 		return;
87*4882a593Smuzhiyun 	}
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	/* terminate exchange */
90*4882a593Smuzhiyun 	rsp_els->entry_type = ELS_IOCB_TYPE;
91*4882a593Smuzhiyun 	rsp_els->entry_count = 1;
92*4882a593Smuzhiyun 	rsp_els->nport_handle = cpu_to_le16(~0);
93*4882a593Smuzhiyun 	rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort;
94*4882a593Smuzhiyun 	rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG);
95*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init, vha, 0x0283,
96*4882a593Smuzhiyun 	    "Sending ELS Response to terminate exchange %#x...\n",
97*4882a593Smuzhiyun 	    abts->rx_xch_addr_to_abort);
98*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
99*4882a593Smuzhiyun 	    "-------- ELS RSP -------\n");
100*4882a593Smuzhiyun 	ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
101*4882a593Smuzhiyun 	    (uint8_t *)rsp_els, sizeof(*rsp_els));
102*4882a593Smuzhiyun 	rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0);
103*4882a593Smuzhiyun 	if (rval) {
104*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x0288,
105*4882a593Smuzhiyun 		    "%s: iocb failed to execute -> %x\n", __func__, rval);
106*4882a593Smuzhiyun 	} else if (rsp_els->comp_status) {
107*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x0289,
108*4882a593Smuzhiyun 		    "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
109*4882a593Smuzhiyun 		    __func__, rsp_els->comp_status,
110*4882a593Smuzhiyun 		    rsp_els->error_subcode_1, rsp_els->error_subcode_2);
111*4882a593Smuzhiyun 	} else {
112*4882a593Smuzhiyun 		ql_dbg(ql_dbg_init, vha, 0x028a,
113*4882a593Smuzhiyun 		    "%s: abort exchange done.\n", __func__);
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* send ABTS response */
117*4882a593Smuzhiyun 	abts_rsp = (void *)rsp_els;
118*4882a593Smuzhiyun 	memset(abts_rsp, 0, sizeof(*abts_rsp));
119*4882a593Smuzhiyun 	abts_rsp->entry_type = ABTS_RSP_TYPE;
120*4882a593Smuzhiyun 	abts_rsp->entry_count = 1;
121*4882a593Smuzhiyun 	abts_rsp->nport_handle = abts->nport_handle;
122*4882a593Smuzhiyun 	abts_rsp->vp_idx = abts->vp_idx;
123*4882a593Smuzhiyun 	abts_rsp->sof_type = abts->sof_type & 0xf0;
124*4882a593Smuzhiyun 	abts_rsp->rx_xch_addr = abts->rx_xch_addr;
125*4882a593Smuzhiyun 	abts_rsp->d_id[0] = abts->s_id[0];
126*4882a593Smuzhiyun 	abts_rsp->d_id[1] = abts->s_id[1];
127*4882a593Smuzhiyun 	abts_rsp->d_id[2] = abts->s_id[2];
128*4882a593Smuzhiyun 	abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC;
129*4882a593Smuzhiyun 	abts_rsp->s_id[0] = abts->d_id[0];
130*4882a593Smuzhiyun 	abts_rsp->s_id[1] = abts->d_id[1];
131*4882a593Smuzhiyun 	abts_rsp->s_id[2] = abts->d_id[2];
132*4882a593Smuzhiyun 	abts_rsp->cs_ctl = abts->cs_ctl;
133*4882a593Smuzhiyun 	/* include flipping bit23 in fctl */
134*4882a593Smuzhiyun 	fctl = ~(abts->f_ctl[2] | 0x7F) << 16 |
135*4882a593Smuzhiyun 	    FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT;
136*4882a593Smuzhiyun 	abts_rsp->f_ctl[0] = fctl >> 0 & 0xff;
137*4882a593Smuzhiyun 	abts_rsp->f_ctl[1] = fctl >> 8 & 0xff;
138*4882a593Smuzhiyun 	abts_rsp->f_ctl[2] = fctl >> 16 & 0xff;
139*4882a593Smuzhiyun 	abts_rsp->type = FC_TYPE_BLD;
140*4882a593Smuzhiyun 	abts_rsp->rx_id = abts->rx_id;
141*4882a593Smuzhiyun 	abts_rsp->ox_id = abts->ox_id;
142*4882a593Smuzhiyun 	abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id;
143*4882a593Smuzhiyun 	abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id;
144*4882a593Smuzhiyun 	abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0);
145*4882a593Smuzhiyun 	abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort;
146*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init, vha, 0x028b,
147*4882a593Smuzhiyun 	    "Sending BA ACC response to ABTS %#x...\n",
148*4882a593Smuzhiyun 	    abts->rx_xch_addr_to_abort);
149*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
150*4882a593Smuzhiyun 	    "-------- ELS RSP -------\n");
151*4882a593Smuzhiyun 	ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
152*4882a593Smuzhiyun 	    (uint8_t *)abts_rsp, sizeof(*abts_rsp));
153*4882a593Smuzhiyun 	rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0);
154*4882a593Smuzhiyun 	if (rval) {
155*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x028c,
156*4882a593Smuzhiyun 		    "%s: iocb failed to execute -> %x\n", __func__, rval);
157*4882a593Smuzhiyun 	} else if (abts_rsp->comp_status) {
158*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x028d,
159*4882a593Smuzhiyun 		    "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
160*4882a593Smuzhiyun 		    __func__, abts_rsp->comp_status,
161*4882a593Smuzhiyun 		    abts_rsp->payload.error.subcode1,
162*4882a593Smuzhiyun 		    abts_rsp->payload.error.subcode2);
163*4882a593Smuzhiyun 	} else {
164*4882a593Smuzhiyun 		ql_dbg(ql_dbg_init, vha, 0x028ea,
165*4882a593Smuzhiyun 		    "%s: done.\n", __func__);
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun /**
172*4882a593Smuzhiyun  * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
173*4882a593Smuzhiyun  * @irq: interrupt number
174*4882a593Smuzhiyun  * @dev_id: SCSI driver HA context
175*4882a593Smuzhiyun  *
176*4882a593Smuzhiyun  * Called by system whenever the host adapter generates an interrupt.
177*4882a593Smuzhiyun  *
178*4882a593Smuzhiyun  * Returns handled flag.
179*4882a593Smuzhiyun  */
180*4882a593Smuzhiyun irqreturn_t
qla2100_intr_handler(int irq,void * dev_id)181*4882a593Smuzhiyun qla2100_intr_handler(int irq, void *dev_id)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	scsi_qla_host_t	*vha;
184*4882a593Smuzhiyun 	struct qla_hw_data *ha;
185*4882a593Smuzhiyun 	struct device_reg_2xxx __iomem *reg;
186*4882a593Smuzhiyun 	int		status;
187*4882a593Smuzhiyun 	unsigned long	iter;
188*4882a593Smuzhiyun 	uint16_t	hccr;
189*4882a593Smuzhiyun 	uint16_t	mb[8];
190*4882a593Smuzhiyun 	struct rsp_que *rsp;
191*4882a593Smuzhiyun 	unsigned long	flags;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	rsp = (struct rsp_que *) dev_id;
194*4882a593Smuzhiyun 	if (!rsp) {
195*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x505d,
196*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
197*4882a593Smuzhiyun 		return (IRQ_NONE);
198*4882a593Smuzhiyun 	}
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	ha = rsp->hw;
201*4882a593Smuzhiyun 	reg = &ha->iobase->isp;
202*4882a593Smuzhiyun 	status = 0;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->hardware_lock, flags);
205*4882a593Smuzhiyun 	vha = pci_get_drvdata(ha->pdev);
206*4882a593Smuzhiyun 	for (iter = 50; iter--; ) {
207*4882a593Smuzhiyun 		hccr = rd_reg_word(&reg->hccr);
208*4882a593Smuzhiyun 		if (qla2x00_check_reg16_for_disconnect(vha, hccr))
209*4882a593Smuzhiyun 			break;
210*4882a593Smuzhiyun 		if (hccr & HCCR_RISC_PAUSE) {
211*4882a593Smuzhiyun 			if (pci_channel_offline(ha->pdev))
212*4882a593Smuzhiyun 				break;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 			/*
215*4882a593Smuzhiyun 			 * Issue a "HARD" reset in order for the RISC interrupt
216*4882a593Smuzhiyun 			 * bit to be cleared.  Schedule a big hammer to get
217*4882a593Smuzhiyun 			 * out of the RISC PAUSED state.
218*4882a593Smuzhiyun 			 */
219*4882a593Smuzhiyun 			wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
220*4882a593Smuzhiyun 			rd_reg_word(&reg->hccr);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 			ha->isp_ops->fw_dump(vha);
223*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
224*4882a593Smuzhiyun 			break;
225*4882a593Smuzhiyun 		} else if ((rd_reg_word(&reg->istatus) & ISR_RISC_INT) == 0)
226*4882a593Smuzhiyun 			break;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 		if (rd_reg_word(&reg->semaphore) & BIT_0) {
229*4882a593Smuzhiyun 			wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
230*4882a593Smuzhiyun 			rd_reg_word(&reg->hccr);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 			/* Get mailbox data. */
233*4882a593Smuzhiyun 			mb[0] = RD_MAILBOX_REG(ha, reg, 0);
234*4882a593Smuzhiyun 			if (mb[0] > 0x3fff && mb[0] < 0x8000) {
235*4882a593Smuzhiyun 				qla2x00_mbx_completion(vha, mb[0]);
236*4882a593Smuzhiyun 				status |= MBX_INTERRUPT;
237*4882a593Smuzhiyun 			} else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
238*4882a593Smuzhiyun 				mb[1] = RD_MAILBOX_REG(ha, reg, 1);
239*4882a593Smuzhiyun 				mb[2] = RD_MAILBOX_REG(ha, reg, 2);
240*4882a593Smuzhiyun 				mb[3] = RD_MAILBOX_REG(ha, reg, 3);
241*4882a593Smuzhiyun 				qla2x00_async_event(vha, rsp, mb);
242*4882a593Smuzhiyun 			} else {
243*4882a593Smuzhiyun 				/*EMPTY*/
244*4882a593Smuzhiyun 				ql_dbg(ql_dbg_async, vha, 0x5025,
245*4882a593Smuzhiyun 				    "Unrecognized interrupt type (%d).\n",
246*4882a593Smuzhiyun 				    mb[0]);
247*4882a593Smuzhiyun 			}
248*4882a593Smuzhiyun 			/* Release mailbox registers. */
249*4882a593Smuzhiyun 			wrt_reg_word(&reg->semaphore, 0);
250*4882a593Smuzhiyun 			rd_reg_word(&reg->semaphore);
251*4882a593Smuzhiyun 		} else {
252*4882a593Smuzhiyun 			qla2x00_process_response_queue(rsp);
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 			wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
255*4882a593Smuzhiyun 			rd_reg_word(&reg->hccr);
256*4882a593Smuzhiyun 		}
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun 	qla2x00_handle_mbx_completion(ha, status);
259*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	return (IRQ_HANDLED);
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun bool
qla2x00_check_reg32_for_disconnect(scsi_qla_host_t * vha,uint32_t reg)265*4882a593Smuzhiyun qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	/* Check for PCI disconnection */
268*4882a593Smuzhiyun 	if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
269*4882a593Smuzhiyun 		if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
270*4882a593Smuzhiyun 		    !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
271*4882a593Smuzhiyun 		    !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
272*4882a593Smuzhiyun 			/*
273*4882a593Smuzhiyun 			 * Schedule this (only once) on the default system
274*4882a593Smuzhiyun 			 * workqueue so that all the adapter workqueues and the
275*4882a593Smuzhiyun 			 * DPC thread can be shutdown cleanly.
276*4882a593Smuzhiyun 			 */
277*4882a593Smuzhiyun 			schedule_work(&vha->hw->board_disable);
278*4882a593Smuzhiyun 		}
279*4882a593Smuzhiyun 		return true;
280*4882a593Smuzhiyun 	} else
281*4882a593Smuzhiyun 		return false;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun bool
qla2x00_check_reg16_for_disconnect(scsi_qla_host_t * vha,uint16_t reg)285*4882a593Smuzhiyun qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun 	return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun /**
291*4882a593Smuzhiyun  * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
292*4882a593Smuzhiyun  * @irq: interrupt number
293*4882a593Smuzhiyun  * @dev_id: SCSI driver HA context
294*4882a593Smuzhiyun  *
295*4882a593Smuzhiyun  * Called by system whenever the host adapter generates an interrupt.
296*4882a593Smuzhiyun  *
297*4882a593Smuzhiyun  * Returns handled flag.
298*4882a593Smuzhiyun  */
299*4882a593Smuzhiyun irqreturn_t
qla2300_intr_handler(int irq,void * dev_id)300*4882a593Smuzhiyun qla2300_intr_handler(int irq, void *dev_id)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	scsi_qla_host_t	*vha;
303*4882a593Smuzhiyun 	struct device_reg_2xxx __iomem *reg;
304*4882a593Smuzhiyun 	int		status;
305*4882a593Smuzhiyun 	unsigned long	iter;
306*4882a593Smuzhiyun 	uint32_t	stat;
307*4882a593Smuzhiyun 	uint16_t	hccr;
308*4882a593Smuzhiyun 	uint16_t	mb[8];
309*4882a593Smuzhiyun 	struct rsp_que *rsp;
310*4882a593Smuzhiyun 	struct qla_hw_data *ha;
311*4882a593Smuzhiyun 	unsigned long	flags;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	rsp = (struct rsp_que *) dev_id;
314*4882a593Smuzhiyun 	if (!rsp) {
315*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x5058,
316*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
317*4882a593Smuzhiyun 		return (IRQ_NONE);
318*4882a593Smuzhiyun 	}
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	ha = rsp->hw;
321*4882a593Smuzhiyun 	reg = &ha->iobase->isp;
322*4882a593Smuzhiyun 	status = 0;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->hardware_lock, flags);
325*4882a593Smuzhiyun 	vha = pci_get_drvdata(ha->pdev);
326*4882a593Smuzhiyun 	for (iter = 50; iter--; ) {
327*4882a593Smuzhiyun 		stat = rd_reg_dword(&reg->u.isp2300.host_status);
328*4882a593Smuzhiyun 		if (qla2x00_check_reg32_for_disconnect(vha, stat))
329*4882a593Smuzhiyun 			break;
330*4882a593Smuzhiyun 		if (stat & HSR_RISC_PAUSED) {
331*4882a593Smuzhiyun 			if (unlikely(pci_channel_offline(ha->pdev)))
332*4882a593Smuzhiyun 				break;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 			hccr = rd_reg_word(&reg->hccr);
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 			if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
337*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x5026,
338*4882a593Smuzhiyun 				    "Parity error -- HCCR=%x, Dumping "
339*4882a593Smuzhiyun 				    "firmware.\n", hccr);
340*4882a593Smuzhiyun 			else
341*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x5027,
342*4882a593Smuzhiyun 				    "RISC paused -- HCCR=%x, Dumping "
343*4882a593Smuzhiyun 				    "firmware.\n", hccr);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 			/*
346*4882a593Smuzhiyun 			 * Issue a "HARD" reset in order for the RISC
347*4882a593Smuzhiyun 			 * interrupt bit to be cleared.  Schedule a big
348*4882a593Smuzhiyun 			 * hammer to get out of the RISC PAUSED state.
349*4882a593Smuzhiyun 			 */
350*4882a593Smuzhiyun 			wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
351*4882a593Smuzhiyun 			rd_reg_word(&reg->hccr);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 			ha->isp_ops->fw_dump(vha);
354*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
355*4882a593Smuzhiyun 			break;
356*4882a593Smuzhiyun 		} else if ((stat & HSR_RISC_INT) == 0)
357*4882a593Smuzhiyun 			break;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 		switch (stat & 0xff) {
360*4882a593Smuzhiyun 		case 0x1:
361*4882a593Smuzhiyun 		case 0x2:
362*4882a593Smuzhiyun 		case 0x10:
363*4882a593Smuzhiyun 		case 0x11:
364*4882a593Smuzhiyun 			qla2x00_mbx_completion(vha, MSW(stat));
365*4882a593Smuzhiyun 			status |= MBX_INTERRUPT;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 			/* Release mailbox registers. */
368*4882a593Smuzhiyun 			wrt_reg_word(&reg->semaphore, 0);
369*4882a593Smuzhiyun 			break;
370*4882a593Smuzhiyun 		case 0x12:
371*4882a593Smuzhiyun 			mb[0] = MSW(stat);
372*4882a593Smuzhiyun 			mb[1] = RD_MAILBOX_REG(ha, reg, 1);
373*4882a593Smuzhiyun 			mb[2] = RD_MAILBOX_REG(ha, reg, 2);
374*4882a593Smuzhiyun 			mb[3] = RD_MAILBOX_REG(ha, reg, 3);
375*4882a593Smuzhiyun 			qla2x00_async_event(vha, rsp, mb);
376*4882a593Smuzhiyun 			break;
377*4882a593Smuzhiyun 		case 0x13:
378*4882a593Smuzhiyun 			qla2x00_process_response_queue(rsp);
379*4882a593Smuzhiyun 			break;
380*4882a593Smuzhiyun 		case 0x15:
381*4882a593Smuzhiyun 			mb[0] = MBA_CMPLT_1_16BIT;
382*4882a593Smuzhiyun 			mb[1] = MSW(stat);
383*4882a593Smuzhiyun 			qla2x00_async_event(vha, rsp, mb);
384*4882a593Smuzhiyun 			break;
385*4882a593Smuzhiyun 		case 0x16:
386*4882a593Smuzhiyun 			mb[0] = MBA_SCSI_COMPLETION;
387*4882a593Smuzhiyun 			mb[1] = MSW(stat);
388*4882a593Smuzhiyun 			mb[2] = RD_MAILBOX_REG(ha, reg, 2);
389*4882a593Smuzhiyun 			qla2x00_async_event(vha, rsp, mb);
390*4882a593Smuzhiyun 			break;
391*4882a593Smuzhiyun 		default:
392*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5028,
393*4882a593Smuzhiyun 			    "Unrecognized interrupt type (%d).\n", stat & 0xff);
394*4882a593Smuzhiyun 			break;
395*4882a593Smuzhiyun 		}
396*4882a593Smuzhiyun 		wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
397*4882a593Smuzhiyun 		rd_reg_word_relaxed(&reg->hccr);
398*4882a593Smuzhiyun 	}
399*4882a593Smuzhiyun 	qla2x00_handle_mbx_completion(ha, status);
400*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	return (IRQ_HANDLED);
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun /**
406*4882a593Smuzhiyun  * qla2x00_mbx_completion() - Process mailbox command completions.
407*4882a593Smuzhiyun  * @vha: SCSI driver HA context
408*4882a593Smuzhiyun  * @mb0: Mailbox0 register
409*4882a593Smuzhiyun  */
410*4882a593Smuzhiyun static void
qla2x00_mbx_completion(scsi_qla_host_t * vha,uint16_t mb0)411*4882a593Smuzhiyun qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun 	uint16_t	cnt;
414*4882a593Smuzhiyun 	uint32_t	mboxes;
415*4882a593Smuzhiyun 	__le16 __iomem *wptr;
416*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
417*4882a593Smuzhiyun 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	/* Read all mbox registers? */
420*4882a593Smuzhiyun 	WARN_ON_ONCE(ha->mbx_count > 32);
421*4882a593Smuzhiyun 	mboxes = (1ULL << ha->mbx_count) - 1;
422*4882a593Smuzhiyun 	if (!ha->mcp)
423*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
424*4882a593Smuzhiyun 	else
425*4882a593Smuzhiyun 		mboxes = ha->mcp->in_mb;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	/* Load return mailbox registers. */
428*4882a593Smuzhiyun 	ha->flags.mbox_int = 1;
429*4882a593Smuzhiyun 	ha->mailbox_out[0] = mb0;
430*4882a593Smuzhiyun 	mboxes >>= 1;
431*4882a593Smuzhiyun 	wptr = MAILBOX_REG(ha, reg, 1);
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	for (cnt = 1; cnt < ha->mbx_count; cnt++) {
434*4882a593Smuzhiyun 		if (IS_QLA2200(ha) && cnt == 8)
435*4882a593Smuzhiyun 			wptr = MAILBOX_REG(ha, reg, 8);
436*4882a593Smuzhiyun 		if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
437*4882a593Smuzhiyun 			ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
438*4882a593Smuzhiyun 		else if (mboxes & BIT_0)
439*4882a593Smuzhiyun 			ha->mailbox_out[cnt] = rd_reg_word(wptr);
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 		wptr++;
442*4882a593Smuzhiyun 		mboxes >>= 1;
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun static void
qla81xx_idc_event(scsi_qla_host_t * vha,uint16_t aen,uint16_t descr)447*4882a593Smuzhiyun qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun 	static char *event[] =
450*4882a593Smuzhiyun 		{ "Complete", "Request Notification", "Time Extension" };
451*4882a593Smuzhiyun 	int rval;
452*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
453*4882a593Smuzhiyun 	struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
454*4882a593Smuzhiyun 	__le16 __iomem *wptr;
455*4882a593Smuzhiyun 	uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	/* Seed data -- mailbox1 -> mailbox7. */
458*4882a593Smuzhiyun 	if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
459*4882a593Smuzhiyun 		wptr = &reg24->mailbox1;
460*4882a593Smuzhiyun 	else if (IS_QLA8044(vha->hw))
461*4882a593Smuzhiyun 		wptr = &reg82->mailbox_out[1];
462*4882a593Smuzhiyun 	else
463*4882a593Smuzhiyun 		return;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
466*4882a593Smuzhiyun 		mb[cnt] = rd_reg_word(wptr);
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	ql_dbg(ql_dbg_async, vha, 0x5021,
469*4882a593Smuzhiyun 	    "Inter-Driver Communication %s -- "
470*4882a593Smuzhiyun 	    "%04x %04x %04x %04x %04x %04x %04x.\n",
471*4882a593Smuzhiyun 	    event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
472*4882a593Smuzhiyun 	    mb[4], mb[5], mb[6]);
473*4882a593Smuzhiyun 	switch (aen) {
474*4882a593Smuzhiyun 	/* Handle IDC Error completion case. */
475*4882a593Smuzhiyun 	case MBA_IDC_COMPLETE:
476*4882a593Smuzhiyun 		if (mb[1] >> 15) {
477*4882a593Smuzhiyun 			vha->hw->flags.idc_compl_status = 1;
478*4882a593Smuzhiyun 			if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
479*4882a593Smuzhiyun 				complete(&vha->hw->dcbx_comp);
480*4882a593Smuzhiyun 		}
481*4882a593Smuzhiyun 		break;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	case MBA_IDC_NOTIFY:
484*4882a593Smuzhiyun 		/* Acknowledgement needed? [Notify && non-zero timeout]. */
485*4882a593Smuzhiyun 		timeout = (descr >> 8) & 0xf;
486*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5022,
487*4882a593Smuzhiyun 		    "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
488*4882a593Smuzhiyun 		    vha->host_no, event[aen & 0xff], timeout);
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 		if (!timeout)
491*4882a593Smuzhiyun 			return;
492*4882a593Smuzhiyun 		rval = qla2x00_post_idc_ack_work(vha, mb);
493*4882a593Smuzhiyun 		if (rval != QLA_SUCCESS)
494*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5023,
495*4882a593Smuzhiyun 			    "IDC failed to post ACK.\n");
496*4882a593Smuzhiyun 		break;
497*4882a593Smuzhiyun 	case MBA_IDC_TIME_EXT:
498*4882a593Smuzhiyun 		vha->hw->idc_extend_tmo = descr;
499*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5087,
500*4882a593Smuzhiyun 		    "%lu Inter-Driver Communication %s -- "
501*4882a593Smuzhiyun 		    "Extend timeout by=%d.\n",
502*4882a593Smuzhiyun 		    vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
503*4882a593Smuzhiyun 		break;
504*4882a593Smuzhiyun 	}
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun #define LS_UNKNOWN	2
508*4882a593Smuzhiyun const char *
qla2x00_get_link_speed_str(struct qla_hw_data * ha,uint16_t speed)509*4882a593Smuzhiyun qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun 	static const char *const link_speeds[] = {
512*4882a593Smuzhiyun 		"1", "2", "?", "4", "8", "16", "32", "10"
513*4882a593Smuzhiyun 	};
514*4882a593Smuzhiyun #define	QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	if (IS_QLA2100(ha) || IS_QLA2200(ha))
517*4882a593Smuzhiyun 		return link_speeds[0];
518*4882a593Smuzhiyun 	else if (speed == 0x13)
519*4882a593Smuzhiyun 		return link_speeds[QLA_LAST_SPEED];
520*4882a593Smuzhiyun 	else if (speed < QLA_LAST_SPEED)
521*4882a593Smuzhiyun 		return link_speeds[speed];
522*4882a593Smuzhiyun 	else
523*4882a593Smuzhiyun 		return link_speeds[LS_UNKNOWN];
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun static void
qla83xx_handle_8200_aen(scsi_qla_host_t * vha,uint16_t * mb)527*4882a593Smuzhiyun qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
528*4882a593Smuzhiyun {
529*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	/*
532*4882a593Smuzhiyun 	 * 8200 AEN Interpretation:
533*4882a593Smuzhiyun 	 * mb[0] = AEN code
534*4882a593Smuzhiyun 	 * mb[1] = AEN Reason code
535*4882a593Smuzhiyun 	 * mb[2] = LSW of Peg-Halt Status-1 Register
536*4882a593Smuzhiyun 	 * mb[6] = MSW of Peg-Halt Status-1 Register
537*4882a593Smuzhiyun 	 * mb[3] = LSW of Peg-Halt Status-2 register
538*4882a593Smuzhiyun 	 * mb[7] = MSW of Peg-Halt Status-2 register
539*4882a593Smuzhiyun 	 * mb[4] = IDC Device-State Register value
540*4882a593Smuzhiyun 	 * mb[5] = IDC Driver-Presence Register value
541*4882a593Smuzhiyun 	 */
542*4882a593Smuzhiyun 	ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
543*4882a593Smuzhiyun 	    "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
544*4882a593Smuzhiyun 	    mb[0], mb[1], mb[2], mb[6]);
545*4882a593Smuzhiyun 	ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
546*4882a593Smuzhiyun 	    "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
547*4882a593Smuzhiyun 	    "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
550*4882a593Smuzhiyun 				IDC_HEARTBEAT_FAILURE)) {
551*4882a593Smuzhiyun 		ha->flags.nic_core_hung = 1;
552*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5060,
553*4882a593Smuzhiyun 		    "83XX: F/W Error Reported: Check if reset required.\n");
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 		if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
556*4882a593Smuzhiyun 			uint32_t protocol_engine_id, fw_err_code, err_level;
557*4882a593Smuzhiyun 
558*4882a593Smuzhiyun 			/*
559*4882a593Smuzhiyun 			 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
560*4882a593Smuzhiyun 			 *  - PEG-Halt Status-1 Register:
561*4882a593Smuzhiyun 			 *	(LSW = mb[2], MSW = mb[6])
562*4882a593Smuzhiyun 			 *	Bits 0-7   = protocol-engine ID
563*4882a593Smuzhiyun 			 *	Bits 8-28  = f/w error code
564*4882a593Smuzhiyun 			 *	Bits 29-31 = Error-level
565*4882a593Smuzhiyun 			 *	    Error-level 0x1 = Non-Fatal error
566*4882a593Smuzhiyun 			 *	    Error-level 0x2 = Recoverable Fatal error
567*4882a593Smuzhiyun 			 *	    Error-level 0x4 = UnRecoverable Fatal error
568*4882a593Smuzhiyun 			 *  - PEG-Halt Status-2 Register:
569*4882a593Smuzhiyun 			 *	(LSW = mb[3], MSW = mb[7])
570*4882a593Smuzhiyun 			 */
571*4882a593Smuzhiyun 			protocol_engine_id = (mb[2] & 0xff);
572*4882a593Smuzhiyun 			fw_err_code = (((mb[2] & 0xff00) >> 8) |
573*4882a593Smuzhiyun 			    ((mb[6] & 0x1fff) << 8));
574*4882a593Smuzhiyun 			err_level = ((mb[6] & 0xe000) >> 13);
575*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
576*4882a593Smuzhiyun 			    "Register: protocol_engine_id=0x%x "
577*4882a593Smuzhiyun 			    "fw_err_code=0x%x err_level=0x%x.\n",
578*4882a593Smuzhiyun 			    protocol_engine_id, fw_err_code, err_level);
579*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
580*4882a593Smuzhiyun 			    "Register: 0x%x%x.\n", mb[7], mb[3]);
581*4882a593Smuzhiyun 			if (err_level == ERR_LEVEL_NON_FATAL) {
582*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x5063,
583*4882a593Smuzhiyun 				    "Not a fatal error, f/w has recovered itself.\n");
584*4882a593Smuzhiyun 			} else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
585*4882a593Smuzhiyun 				ql_log(ql_log_fatal, vha, 0x5064,
586*4882a593Smuzhiyun 				    "Recoverable Fatal error: Chip reset "
587*4882a593Smuzhiyun 				    "required.\n");
588*4882a593Smuzhiyun 				qla83xx_schedule_work(vha,
589*4882a593Smuzhiyun 				    QLA83XX_NIC_CORE_RESET);
590*4882a593Smuzhiyun 			} else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
591*4882a593Smuzhiyun 				ql_log(ql_log_fatal, vha, 0x5065,
592*4882a593Smuzhiyun 				    "Unrecoverable Fatal error: Set FAILED "
593*4882a593Smuzhiyun 				    "state, reboot required.\n");
594*4882a593Smuzhiyun 				qla83xx_schedule_work(vha,
595*4882a593Smuzhiyun 				    QLA83XX_NIC_CORE_UNRECOVERABLE);
596*4882a593Smuzhiyun 			}
597*4882a593Smuzhiyun 		}
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 		if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
600*4882a593Smuzhiyun 			uint16_t peg_fw_state, nw_interface_link_up;
601*4882a593Smuzhiyun 			uint16_t nw_interface_signal_detect, sfp_status;
602*4882a593Smuzhiyun 			uint16_t htbt_counter, htbt_monitor_enable;
603*4882a593Smuzhiyun 			uint16_t sfp_additional_info, sfp_multirate;
604*4882a593Smuzhiyun 			uint16_t sfp_tx_fault, link_speed, dcbx_status;
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 			/*
607*4882a593Smuzhiyun 			 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
608*4882a593Smuzhiyun 			 *  - PEG-to-FC Status Register:
609*4882a593Smuzhiyun 			 *	(LSW = mb[2], MSW = mb[6])
610*4882a593Smuzhiyun 			 *	Bits 0-7   = Peg-Firmware state
611*4882a593Smuzhiyun 			 *	Bit 8      = N/W Interface Link-up
612*4882a593Smuzhiyun 			 *	Bit 9      = N/W Interface signal detected
613*4882a593Smuzhiyun 			 *	Bits 10-11 = SFP Status
614*4882a593Smuzhiyun 			 *	  SFP Status 0x0 = SFP+ transceiver not expected
615*4882a593Smuzhiyun 			 *	  SFP Status 0x1 = SFP+ transceiver not present
616*4882a593Smuzhiyun 			 *	  SFP Status 0x2 = SFP+ transceiver invalid
617*4882a593Smuzhiyun 			 *	  SFP Status 0x3 = SFP+ transceiver present and
618*4882a593Smuzhiyun 			 *	  valid
619*4882a593Smuzhiyun 			 *	Bits 12-14 = Heartbeat Counter
620*4882a593Smuzhiyun 			 *	Bit 15     = Heartbeat Monitor Enable
621*4882a593Smuzhiyun 			 *	Bits 16-17 = SFP Additional Info
622*4882a593Smuzhiyun 			 *	  SFP info 0x0 = Unregocnized transceiver for
623*4882a593Smuzhiyun 			 *	  Ethernet
624*4882a593Smuzhiyun 			 *	  SFP info 0x1 = SFP+ brand validation failed
625*4882a593Smuzhiyun 			 *	  SFP info 0x2 = SFP+ speed validation failed
626*4882a593Smuzhiyun 			 *	  SFP info 0x3 = SFP+ access error
627*4882a593Smuzhiyun 			 *	Bit 18     = SFP Multirate
628*4882a593Smuzhiyun 			 *	Bit 19     = SFP Tx Fault
629*4882a593Smuzhiyun 			 *	Bits 20-22 = Link Speed
630*4882a593Smuzhiyun 			 *	Bits 23-27 = Reserved
631*4882a593Smuzhiyun 			 *	Bits 28-30 = DCBX Status
632*4882a593Smuzhiyun 			 *	  DCBX Status 0x0 = DCBX Disabled
633*4882a593Smuzhiyun 			 *	  DCBX Status 0x1 = DCBX Enabled
634*4882a593Smuzhiyun 			 *	  DCBX Status 0x2 = DCBX Exchange error
635*4882a593Smuzhiyun 			 *	Bit 31     = Reserved
636*4882a593Smuzhiyun 			 */
637*4882a593Smuzhiyun 			peg_fw_state = (mb[2] & 0x00ff);
638*4882a593Smuzhiyun 			nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
639*4882a593Smuzhiyun 			nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
640*4882a593Smuzhiyun 			sfp_status = ((mb[2] & 0x0c00) >> 10);
641*4882a593Smuzhiyun 			htbt_counter = ((mb[2] & 0x7000) >> 12);
642*4882a593Smuzhiyun 			htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
643*4882a593Smuzhiyun 			sfp_additional_info = (mb[6] & 0x0003);
644*4882a593Smuzhiyun 			sfp_multirate = ((mb[6] & 0x0004) >> 2);
645*4882a593Smuzhiyun 			sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
646*4882a593Smuzhiyun 			link_speed = ((mb[6] & 0x0070) >> 4);
647*4882a593Smuzhiyun 			dcbx_status = ((mb[6] & 0x7000) >> 12);
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5066,
650*4882a593Smuzhiyun 			    "Peg-to-Fc Status Register:\n"
651*4882a593Smuzhiyun 			    "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
652*4882a593Smuzhiyun 			    "nw_interface_signal_detect=0x%x"
653*4882a593Smuzhiyun 			    "\nsfp_statis=0x%x.\n ", peg_fw_state,
654*4882a593Smuzhiyun 			    nw_interface_link_up, nw_interface_signal_detect,
655*4882a593Smuzhiyun 			    sfp_status);
656*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5067,
657*4882a593Smuzhiyun 			    "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
658*4882a593Smuzhiyun 			    "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
659*4882a593Smuzhiyun 			    htbt_counter, htbt_monitor_enable,
660*4882a593Smuzhiyun 			    sfp_additional_info, sfp_multirate);
661*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5068,
662*4882a593Smuzhiyun 			    "sfp_tx_fault=0x%x, link_state=0x%x, "
663*4882a593Smuzhiyun 			    "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
664*4882a593Smuzhiyun 			    dcbx_status);
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 			qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
667*4882a593Smuzhiyun 		}
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 		if (mb[1] & IDC_HEARTBEAT_FAILURE) {
670*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5069,
671*4882a593Smuzhiyun 			    "Heartbeat Failure encountered, chip reset "
672*4882a593Smuzhiyun 			    "required.\n");
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 			qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
675*4882a593Smuzhiyun 		}
676*4882a593Smuzhiyun 	}
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
679*4882a593Smuzhiyun 		ql_log(ql_log_info, vha, 0x506a,
680*4882a593Smuzhiyun 		    "IDC Device-State changed = 0x%x.\n", mb[4]);
681*4882a593Smuzhiyun 		if (ha->flags.nic_core_reset_owner)
682*4882a593Smuzhiyun 			return;
683*4882a593Smuzhiyun 		qla83xx_schedule_work(vha, MBA_IDC_AEN);
684*4882a593Smuzhiyun 	}
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun int
qla2x00_is_a_vp_did(scsi_qla_host_t * vha,uint32_t rscn_entry)688*4882a593Smuzhiyun qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
689*4882a593Smuzhiyun {
690*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
691*4882a593Smuzhiyun 	scsi_qla_host_t *vp;
692*4882a593Smuzhiyun 	uint32_t vp_did;
693*4882a593Smuzhiyun 	unsigned long flags;
694*4882a593Smuzhiyun 	int ret = 0;
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 	if (!ha->num_vhosts)
697*4882a593Smuzhiyun 		return ret;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->vport_slock, flags);
700*4882a593Smuzhiyun 	list_for_each_entry(vp, &ha->vp_list, list) {
701*4882a593Smuzhiyun 		vp_did = vp->d_id.b24;
702*4882a593Smuzhiyun 		if (vp_did == rscn_entry) {
703*4882a593Smuzhiyun 			ret = 1;
704*4882a593Smuzhiyun 			break;
705*4882a593Smuzhiyun 		}
706*4882a593Smuzhiyun 	}
707*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->vport_slock, flags);
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	return ret;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun fc_port_t *
qla2x00_find_fcport_by_loopid(scsi_qla_host_t * vha,uint16_t loop_id)713*4882a593Smuzhiyun qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
714*4882a593Smuzhiyun {
715*4882a593Smuzhiyun 	fc_port_t *f, *tf;
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	f = tf = NULL;
718*4882a593Smuzhiyun 	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
719*4882a593Smuzhiyun 		if (f->loop_id == loop_id)
720*4882a593Smuzhiyun 			return f;
721*4882a593Smuzhiyun 	return NULL;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun fc_port_t *
qla2x00_find_fcport_by_wwpn(scsi_qla_host_t * vha,u8 * wwpn,u8 incl_deleted)725*4882a593Smuzhiyun qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun 	fc_port_t *f, *tf;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	f = tf = NULL;
730*4882a593Smuzhiyun 	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
731*4882a593Smuzhiyun 		if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
732*4882a593Smuzhiyun 			if (incl_deleted)
733*4882a593Smuzhiyun 				return f;
734*4882a593Smuzhiyun 			else if (f->deleted == 0)
735*4882a593Smuzhiyun 				return f;
736*4882a593Smuzhiyun 		}
737*4882a593Smuzhiyun 	}
738*4882a593Smuzhiyun 	return NULL;
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun fc_port_t *
qla2x00_find_fcport_by_nportid(scsi_qla_host_t * vha,port_id_t * id,u8 incl_deleted)742*4882a593Smuzhiyun qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
743*4882a593Smuzhiyun 	u8 incl_deleted)
744*4882a593Smuzhiyun {
745*4882a593Smuzhiyun 	fc_port_t *f, *tf;
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	f = tf = NULL;
748*4882a593Smuzhiyun 	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
749*4882a593Smuzhiyun 		if (f->d_id.b24 == id->b24) {
750*4882a593Smuzhiyun 			if (incl_deleted)
751*4882a593Smuzhiyun 				return f;
752*4882a593Smuzhiyun 			else if (f->deleted == 0)
753*4882a593Smuzhiyun 				return f;
754*4882a593Smuzhiyun 		}
755*4882a593Smuzhiyun 	}
756*4882a593Smuzhiyun 	return NULL;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun /* Shall be called only on supported adapters. */
760*4882a593Smuzhiyun static void
qla27xx_handle_8200_aen(scsi_qla_host_t * vha,uint16_t * mb)761*4882a593Smuzhiyun qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
764*4882a593Smuzhiyun 	bool reset_isp_needed = 0;
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	ql_log(ql_log_warn, vha, 0x02f0,
767*4882a593Smuzhiyun 	       "MPI Heartbeat stop. MPI reset is%s needed. "
768*4882a593Smuzhiyun 	       "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
769*4882a593Smuzhiyun 	       mb[1] & BIT_8 ? "" : " not",
770*4882a593Smuzhiyun 	       mb[0], mb[1], mb[2], mb[3]);
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	if ((mb[1] & BIT_8) == 0)
773*4882a593Smuzhiyun 		return;
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	ql_log(ql_log_warn, vha, 0x02f1,
776*4882a593Smuzhiyun 	       "MPI Heartbeat stop. FW dump needed\n");
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	if (ql2xfulldump_on_mpifail) {
779*4882a593Smuzhiyun 		ha->isp_ops->fw_dump(vha);
780*4882a593Smuzhiyun 		reset_isp_needed = 1;
781*4882a593Smuzhiyun 	}
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	ha->isp_ops->mpi_fw_dump(vha, 1);
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	if (reset_isp_needed) {
786*4882a593Smuzhiyun 		vha->hw->flags.fw_init_done = 0;
787*4882a593Smuzhiyun 		set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
788*4882a593Smuzhiyun 		qla2xxx_wake_dpc(vha);
789*4882a593Smuzhiyun 	}
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun static struct purex_item *
qla24xx_alloc_purex_item(scsi_qla_host_t * vha,uint16_t size)793*4882a593Smuzhiyun qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size)
794*4882a593Smuzhiyun {
795*4882a593Smuzhiyun 	struct purex_item *item = NULL;
796*4882a593Smuzhiyun 	uint8_t item_hdr_size = sizeof(*item);
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	if (size > QLA_DEFAULT_PAYLOAD_SIZE) {
799*4882a593Smuzhiyun 		item = kzalloc(item_hdr_size +
800*4882a593Smuzhiyun 		    (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC);
801*4882a593Smuzhiyun 	} else {
802*4882a593Smuzhiyun 		if (atomic_inc_return(&vha->default_item.in_use) == 1) {
803*4882a593Smuzhiyun 			item = &vha->default_item;
804*4882a593Smuzhiyun 			goto initialize_purex_header;
805*4882a593Smuzhiyun 		} else {
806*4882a593Smuzhiyun 			item = kzalloc(item_hdr_size, GFP_ATOMIC);
807*4882a593Smuzhiyun 		}
808*4882a593Smuzhiyun 	}
809*4882a593Smuzhiyun 	if (!item) {
810*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5092,
811*4882a593Smuzhiyun 		       ">> Failed allocate purex list item.\n");
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 		return NULL;
814*4882a593Smuzhiyun 	}
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun initialize_purex_header:
817*4882a593Smuzhiyun 	item->vha = vha;
818*4882a593Smuzhiyun 	item->size = size;
819*4882a593Smuzhiyun 	return item;
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun static void
qla24xx_queue_purex_item(scsi_qla_host_t * vha,struct purex_item * pkt,void (* process_item)(struct scsi_qla_host * vha,struct purex_item * pkt))823*4882a593Smuzhiyun qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt,
824*4882a593Smuzhiyun 			 void (*process_item)(struct scsi_qla_host *vha,
825*4882a593Smuzhiyun 					      struct purex_item *pkt))
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun 	struct purex_list *list = &vha->purex_list;
828*4882a593Smuzhiyun 	ulong flags;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 	pkt->process_item = process_item;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	spin_lock_irqsave(&list->lock, flags);
833*4882a593Smuzhiyun 	list_add_tail(&pkt->list, &list->head);
834*4882a593Smuzhiyun 	spin_unlock_irqrestore(&list->lock, flags);
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun 	set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags);
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun /**
840*4882a593Smuzhiyun  * qla24xx_copy_std_pkt() - Copy over purex ELS which is
841*4882a593Smuzhiyun  * contained in a single IOCB.
842*4882a593Smuzhiyun  * purex packet.
843*4882a593Smuzhiyun  * @vha: SCSI driver HA context
844*4882a593Smuzhiyun  * @pkt: ELS packet
845*4882a593Smuzhiyun  */
846*4882a593Smuzhiyun static struct purex_item
qla24xx_copy_std_pkt(struct scsi_qla_host * vha,void * pkt)847*4882a593Smuzhiyun *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt)
848*4882a593Smuzhiyun {
849*4882a593Smuzhiyun 	struct purex_item *item;
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	item = qla24xx_alloc_purex_item(vha,
852*4882a593Smuzhiyun 					QLA_DEFAULT_PAYLOAD_SIZE);
853*4882a593Smuzhiyun 	if (!item)
854*4882a593Smuzhiyun 		return item;
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	memcpy(&item->iocb, pkt, sizeof(item->iocb));
857*4882a593Smuzhiyun 	return item;
858*4882a593Smuzhiyun }
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun /**
861*4882a593Smuzhiyun  * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can
862*4882a593Smuzhiyun  * span over multiple IOCBs.
863*4882a593Smuzhiyun  * @vha: SCSI driver HA context
864*4882a593Smuzhiyun  * @pkt: ELS packet
865*4882a593Smuzhiyun  * @rsp: Response queue
866*4882a593Smuzhiyun  */
867*4882a593Smuzhiyun static struct purex_item *
qla27xx_copy_fpin_pkt(struct scsi_qla_host * vha,void ** pkt,struct rsp_que ** rsp)868*4882a593Smuzhiyun qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt,
869*4882a593Smuzhiyun 		      struct rsp_que **rsp)
870*4882a593Smuzhiyun {
871*4882a593Smuzhiyun 	struct purex_entry_24xx *purex = *pkt;
872*4882a593Smuzhiyun 	struct rsp_que *rsp_q = *rsp;
873*4882a593Smuzhiyun 	sts_cont_entry_t *new_pkt;
874*4882a593Smuzhiyun 	uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0;
875*4882a593Smuzhiyun 	uint16_t buffer_copy_offset = 0;
876*4882a593Smuzhiyun 	uint16_t entry_count, entry_count_remaining;
877*4882a593Smuzhiyun 	struct purex_item *item;
878*4882a593Smuzhiyun 	void *fpin_pkt = NULL;
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF)
881*4882a593Smuzhiyun 	    - PURX_ELS_HEADER_SIZE;
882*4882a593Smuzhiyun 	pending_bytes = total_bytes;
883*4882a593Smuzhiyun 	entry_count = entry_count_remaining = purex->entry_count;
884*4882a593Smuzhiyun 	no_bytes = (pending_bytes > sizeof(purex->els_frame_payload))  ?
885*4882a593Smuzhiyun 		   sizeof(purex->els_frame_payload) : pending_bytes;
886*4882a593Smuzhiyun 	ql_log(ql_log_info, vha, 0x509a,
887*4882a593Smuzhiyun 	       "FPIN ELS, frame_size 0x%x, entry count %d\n",
888*4882a593Smuzhiyun 	       total_bytes, entry_count);
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun 	item = qla24xx_alloc_purex_item(vha, total_bytes);
891*4882a593Smuzhiyun 	if (!item)
892*4882a593Smuzhiyun 		return item;
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	fpin_pkt = &item->iocb;
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun 	memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes);
897*4882a593Smuzhiyun 	buffer_copy_offset += no_bytes;
898*4882a593Smuzhiyun 	pending_bytes -= no_bytes;
899*4882a593Smuzhiyun 	--entry_count_remaining;
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	((response_t *)purex)->signature = RESPONSE_PROCESSED;
902*4882a593Smuzhiyun 	wmb();
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	do {
905*4882a593Smuzhiyun 		while ((total_bytes > 0) && (entry_count_remaining > 0)) {
906*4882a593Smuzhiyun 			if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) {
907*4882a593Smuzhiyun 				ql_dbg(ql_dbg_async, vha, 0x5084,
908*4882a593Smuzhiyun 				       "Ran out of IOCBs, partial data 0x%x\n",
909*4882a593Smuzhiyun 				       buffer_copy_offset);
910*4882a593Smuzhiyun 				cpu_relax();
911*4882a593Smuzhiyun 				continue;
912*4882a593Smuzhiyun 			}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 			new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr;
915*4882a593Smuzhiyun 			*pkt = new_pkt;
916*4882a593Smuzhiyun 
917*4882a593Smuzhiyun 			if (new_pkt->entry_type != STATUS_CONT_TYPE) {
918*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x507a,
919*4882a593Smuzhiyun 				       "Unexpected IOCB type, partial data 0x%x\n",
920*4882a593Smuzhiyun 				       buffer_copy_offset);
921*4882a593Smuzhiyun 				break;
922*4882a593Smuzhiyun 			}
923*4882a593Smuzhiyun 
924*4882a593Smuzhiyun 			rsp_q->ring_index++;
925*4882a593Smuzhiyun 			if (rsp_q->ring_index == rsp_q->length) {
926*4882a593Smuzhiyun 				rsp_q->ring_index = 0;
927*4882a593Smuzhiyun 				rsp_q->ring_ptr = rsp_q->ring;
928*4882a593Smuzhiyun 			} else {
929*4882a593Smuzhiyun 				rsp_q->ring_ptr++;
930*4882a593Smuzhiyun 			}
931*4882a593Smuzhiyun 			no_bytes = (pending_bytes > sizeof(new_pkt->data)) ?
932*4882a593Smuzhiyun 			    sizeof(new_pkt->data) : pending_bytes;
933*4882a593Smuzhiyun 			if ((buffer_copy_offset + no_bytes) <= total_bytes) {
934*4882a593Smuzhiyun 				memcpy(((uint8_t *)fpin_pkt +
935*4882a593Smuzhiyun 				    buffer_copy_offset), new_pkt->data,
936*4882a593Smuzhiyun 				    no_bytes);
937*4882a593Smuzhiyun 				buffer_copy_offset += no_bytes;
938*4882a593Smuzhiyun 				pending_bytes -= no_bytes;
939*4882a593Smuzhiyun 				--entry_count_remaining;
940*4882a593Smuzhiyun 			} else {
941*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x5044,
942*4882a593Smuzhiyun 				       "Attempt to copy more that we got, optimizing..%x\n",
943*4882a593Smuzhiyun 				       buffer_copy_offset);
944*4882a593Smuzhiyun 				memcpy(((uint8_t *)fpin_pkt +
945*4882a593Smuzhiyun 				    buffer_copy_offset), new_pkt->data,
946*4882a593Smuzhiyun 				    total_bytes - buffer_copy_offset);
947*4882a593Smuzhiyun 			}
948*4882a593Smuzhiyun 
949*4882a593Smuzhiyun 			((response_t *)new_pkt)->signature = RESPONSE_PROCESSED;
950*4882a593Smuzhiyun 			wmb();
951*4882a593Smuzhiyun 		}
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun 		if (pending_bytes != 0 || entry_count_remaining != 0) {
954*4882a593Smuzhiyun 			ql_log(ql_log_fatal, vha, 0x508b,
955*4882a593Smuzhiyun 			       "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n",
956*4882a593Smuzhiyun 			       total_bytes, entry_count_remaining);
957*4882a593Smuzhiyun 			qla24xx_free_purex_item(item);
958*4882a593Smuzhiyun 			return NULL;
959*4882a593Smuzhiyun 		}
960*4882a593Smuzhiyun 	} while (entry_count_remaining > 0);
961*4882a593Smuzhiyun 	host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes);
962*4882a593Smuzhiyun 	return item;
963*4882a593Smuzhiyun }
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun /**
966*4882a593Smuzhiyun  * qla2x00_async_event() - Process aynchronous events.
967*4882a593Smuzhiyun  * @vha: SCSI driver HA context
968*4882a593Smuzhiyun  * @rsp: response queue
969*4882a593Smuzhiyun  * @mb: Mailbox registers (0 - 3)
970*4882a593Smuzhiyun  */
971*4882a593Smuzhiyun void
qla2x00_async_event(scsi_qla_host_t * vha,struct rsp_que * rsp,uint16_t * mb)972*4882a593Smuzhiyun qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
973*4882a593Smuzhiyun {
974*4882a593Smuzhiyun 	uint16_t	handle_cnt;
975*4882a593Smuzhiyun 	uint16_t	cnt, mbx;
976*4882a593Smuzhiyun 	uint32_t	handles[5];
977*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
978*4882a593Smuzhiyun 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
979*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
980*4882a593Smuzhiyun 	struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
981*4882a593Smuzhiyun 	uint32_t	rscn_entry, host_pid;
982*4882a593Smuzhiyun 	unsigned long	flags;
983*4882a593Smuzhiyun 	fc_port_t	*fcport = NULL;
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	if (!vha->hw->flags.fw_started)
986*4882a593Smuzhiyun 		return;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	/* Setup to process RIO completion. */
989*4882a593Smuzhiyun 	handle_cnt = 0;
990*4882a593Smuzhiyun 	if (IS_CNA_CAPABLE(ha))
991*4882a593Smuzhiyun 		goto skip_rio;
992*4882a593Smuzhiyun 	switch (mb[0]) {
993*4882a593Smuzhiyun 	case MBA_SCSI_COMPLETION:
994*4882a593Smuzhiyun 		handles[0] = make_handle(mb[2], mb[1]);
995*4882a593Smuzhiyun 		handle_cnt = 1;
996*4882a593Smuzhiyun 		break;
997*4882a593Smuzhiyun 	case MBA_CMPLT_1_16BIT:
998*4882a593Smuzhiyun 		handles[0] = mb[1];
999*4882a593Smuzhiyun 		handle_cnt = 1;
1000*4882a593Smuzhiyun 		mb[0] = MBA_SCSI_COMPLETION;
1001*4882a593Smuzhiyun 		break;
1002*4882a593Smuzhiyun 	case MBA_CMPLT_2_16BIT:
1003*4882a593Smuzhiyun 		handles[0] = mb[1];
1004*4882a593Smuzhiyun 		handles[1] = mb[2];
1005*4882a593Smuzhiyun 		handle_cnt = 2;
1006*4882a593Smuzhiyun 		mb[0] = MBA_SCSI_COMPLETION;
1007*4882a593Smuzhiyun 		break;
1008*4882a593Smuzhiyun 	case MBA_CMPLT_3_16BIT:
1009*4882a593Smuzhiyun 		handles[0] = mb[1];
1010*4882a593Smuzhiyun 		handles[1] = mb[2];
1011*4882a593Smuzhiyun 		handles[2] = mb[3];
1012*4882a593Smuzhiyun 		handle_cnt = 3;
1013*4882a593Smuzhiyun 		mb[0] = MBA_SCSI_COMPLETION;
1014*4882a593Smuzhiyun 		break;
1015*4882a593Smuzhiyun 	case MBA_CMPLT_4_16BIT:
1016*4882a593Smuzhiyun 		handles[0] = mb[1];
1017*4882a593Smuzhiyun 		handles[1] = mb[2];
1018*4882a593Smuzhiyun 		handles[2] = mb[3];
1019*4882a593Smuzhiyun 		handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1020*4882a593Smuzhiyun 		handle_cnt = 4;
1021*4882a593Smuzhiyun 		mb[0] = MBA_SCSI_COMPLETION;
1022*4882a593Smuzhiyun 		break;
1023*4882a593Smuzhiyun 	case MBA_CMPLT_5_16BIT:
1024*4882a593Smuzhiyun 		handles[0] = mb[1];
1025*4882a593Smuzhiyun 		handles[1] = mb[2];
1026*4882a593Smuzhiyun 		handles[2] = mb[3];
1027*4882a593Smuzhiyun 		handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1028*4882a593Smuzhiyun 		handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
1029*4882a593Smuzhiyun 		handle_cnt = 5;
1030*4882a593Smuzhiyun 		mb[0] = MBA_SCSI_COMPLETION;
1031*4882a593Smuzhiyun 		break;
1032*4882a593Smuzhiyun 	case MBA_CMPLT_2_32BIT:
1033*4882a593Smuzhiyun 		handles[0] = make_handle(mb[2], mb[1]);
1034*4882a593Smuzhiyun 		handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7),
1035*4882a593Smuzhiyun 					 RD_MAILBOX_REG(ha, reg, 6));
1036*4882a593Smuzhiyun 		handle_cnt = 2;
1037*4882a593Smuzhiyun 		mb[0] = MBA_SCSI_COMPLETION;
1038*4882a593Smuzhiyun 		break;
1039*4882a593Smuzhiyun 	default:
1040*4882a593Smuzhiyun 		break;
1041*4882a593Smuzhiyun 	}
1042*4882a593Smuzhiyun skip_rio:
1043*4882a593Smuzhiyun 	switch (mb[0]) {
1044*4882a593Smuzhiyun 	case MBA_SCSI_COMPLETION:	/* Fast Post */
1045*4882a593Smuzhiyun 		if (!vha->flags.online)
1046*4882a593Smuzhiyun 			break;
1047*4882a593Smuzhiyun 
1048*4882a593Smuzhiyun 		for (cnt = 0; cnt < handle_cnt; cnt++)
1049*4882a593Smuzhiyun 			qla2x00_process_completed_request(vha, rsp->req,
1050*4882a593Smuzhiyun 				handles[cnt]);
1051*4882a593Smuzhiyun 		break;
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	case MBA_RESET:			/* Reset */
1054*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5002,
1055*4882a593Smuzhiyun 		    "Asynchronous RESET.\n");
1056*4882a593Smuzhiyun 
1057*4882a593Smuzhiyun 		set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1058*4882a593Smuzhiyun 		break;
1059*4882a593Smuzhiyun 
1060*4882a593Smuzhiyun 	case MBA_SYSTEM_ERR:		/* System Error */
1061*4882a593Smuzhiyun 		mbx = 0;
1062*4882a593Smuzhiyun 		if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
1063*4882a593Smuzhiyun 		    IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1064*4882a593Smuzhiyun 			u16 m[4];
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 			m[0] = rd_reg_word(&reg24->mailbox4);
1067*4882a593Smuzhiyun 			m[1] = rd_reg_word(&reg24->mailbox5);
1068*4882a593Smuzhiyun 			m[2] = rd_reg_word(&reg24->mailbox6);
1069*4882a593Smuzhiyun 			mbx = m[3] = rd_reg_word(&reg24->mailbox7);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5003,
1072*4882a593Smuzhiyun 			    "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n",
1073*4882a593Smuzhiyun 			    mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]);
1074*4882a593Smuzhiyun 		} else
1075*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x5003,
1076*4882a593Smuzhiyun 			    "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ",
1077*4882a593Smuzhiyun 			    mb[1], mb[2], mb[3]);
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun 		if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
1080*4882a593Smuzhiyun 		    rd_reg_word(&reg24->mailbox7) & BIT_8)
1081*4882a593Smuzhiyun 			ha->isp_ops->mpi_fw_dump(vha, 1);
1082*4882a593Smuzhiyun 		ha->isp_ops->fw_dump(vha);
1083*4882a593Smuzhiyun 		ha->flags.fw_init_done = 0;
1084*4882a593Smuzhiyun 		QLA_FW_STOPPED(ha);
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun 		if (IS_FWI2_CAPABLE(ha)) {
1087*4882a593Smuzhiyun 			if (mb[1] == 0 && mb[2] == 0) {
1088*4882a593Smuzhiyun 				ql_log(ql_log_fatal, vha, 0x5004,
1089*4882a593Smuzhiyun 				    "Unrecoverable Hardware Error: adapter "
1090*4882a593Smuzhiyun 				    "marked OFFLINE!\n");
1091*4882a593Smuzhiyun 				vha->flags.online = 0;
1092*4882a593Smuzhiyun 				vha->device_flags |= DFLG_DEV_FAILED;
1093*4882a593Smuzhiyun 			} else {
1094*4882a593Smuzhiyun 				/* Check to see if MPI timeout occurred */
1095*4882a593Smuzhiyun 				if ((mbx & MBX_3) && (ha->port_no == 0))
1096*4882a593Smuzhiyun 					set_bit(MPI_RESET_NEEDED,
1097*4882a593Smuzhiyun 					    &vha->dpc_flags);
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1100*4882a593Smuzhiyun 			}
1101*4882a593Smuzhiyun 		} else if (mb[1] == 0) {
1102*4882a593Smuzhiyun 			ql_log(ql_log_fatal, vha, 0x5005,
1103*4882a593Smuzhiyun 			    "Unrecoverable Hardware Error: adapter marked "
1104*4882a593Smuzhiyun 			    "OFFLINE!\n");
1105*4882a593Smuzhiyun 			vha->flags.online = 0;
1106*4882a593Smuzhiyun 			vha->device_flags |= DFLG_DEV_FAILED;
1107*4882a593Smuzhiyun 		} else
1108*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1109*4882a593Smuzhiyun 		break;
1110*4882a593Smuzhiyun 
1111*4882a593Smuzhiyun 	case MBA_REQ_TRANSFER_ERR:	/* Request Transfer Error */
1112*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5006,
1113*4882a593Smuzhiyun 		    "ISP Request Transfer Error (%x).\n",  mb[1]);
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 		set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1116*4882a593Smuzhiyun 		break;
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	case MBA_RSP_TRANSFER_ERR:	/* Response Transfer Error */
1119*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5007,
1120*4882a593Smuzhiyun 		    "ISP Response Transfer Error (%x).\n", mb[1]);
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun 		set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1123*4882a593Smuzhiyun 		break;
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 	case MBA_WAKEUP_THRES:		/* Request Queue Wake-up */
1126*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5008,
1127*4882a593Smuzhiyun 		    "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
1128*4882a593Smuzhiyun 		break;
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	case MBA_LOOP_INIT_ERR:
1131*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5090,
1132*4882a593Smuzhiyun 		    "LOOP INIT ERROR (%x).\n", mb[1]);
1133*4882a593Smuzhiyun 		set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1134*4882a593Smuzhiyun 		break;
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun 	case MBA_LIP_OCCURRED:		/* Loop Initialization Procedure */
1137*4882a593Smuzhiyun 		ha->flags.lip_ae = 1;
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5009,
1140*4882a593Smuzhiyun 		    "LIP occurred (%x).\n", mb[1]);
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 		if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1143*4882a593Smuzhiyun 			atomic_set(&vha->loop_state, LOOP_DOWN);
1144*4882a593Smuzhiyun 			atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1145*4882a593Smuzhiyun 			qla2x00_mark_all_devices_lost(vha);
1146*4882a593Smuzhiyun 		}
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun 		if (vha->vp_idx) {
1149*4882a593Smuzhiyun 			atomic_set(&vha->vp_state, VP_FAILED);
1150*4882a593Smuzhiyun 			fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1151*4882a593Smuzhiyun 		}
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun 		set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1154*4882a593Smuzhiyun 		set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 		vha->flags.management_server_logged_in = 0;
1157*4882a593Smuzhiyun 		qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1158*4882a593Smuzhiyun 		break;
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	case MBA_LOOP_UP:		/* Loop Up Event */
1161*4882a593Smuzhiyun 		if (IS_QLA2100(ha) || IS_QLA2200(ha))
1162*4882a593Smuzhiyun 			ha->link_data_rate = PORT_SPEED_1GB;
1163*4882a593Smuzhiyun 		else
1164*4882a593Smuzhiyun 			ha->link_data_rate = mb[1];
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun 		ql_log(ql_log_info, vha, 0x500a,
1167*4882a593Smuzhiyun 		    "LOOP UP detected (%s Gbps).\n",
1168*4882a593Smuzhiyun 		    qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun 		if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1171*4882a593Smuzhiyun 			if (mb[2] & BIT_0)
1172*4882a593Smuzhiyun 				ql_log(ql_log_info, vha, 0x11a0,
1173*4882a593Smuzhiyun 				    "FEC=enabled (link up).\n");
1174*4882a593Smuzhiyun 		}
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun 		vha->flags.management_server_logged_in = 0;
1177*4882a593Smuzhiyun 		qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
1178*4882a593Smuzhiyun 
1179*4882a593Smuzhiyun 		break;
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	case MBA_LOOP_DOWN:		/* Loop Down Event */
1182*4882a593Smuzhiyun 		SAVE_TOPO(ha);
1183*4882a593Smuzhiyun 		ha->flags.lip_ae = 0;
1184*4882a593Smuzhiyun 		ha->current_topology = 0;
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 		mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
1187*4882a593Smuzhiyun 			? rd_reg_word(&reg24->mailbox4) : 0;
1188*4882a593Smuzhiyun 		mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(&reg82->mailbox_out[4])
1189*4882a593Smuzhiyun 			: mbx;
1190*4882a593Smuzhiyun 		ql_log(ql_log_info, vha, 0x500b,
1191*4882a593Smuzhiyun 		    "LOOP DOWN detected (%x %x %x %x).\n",
1192*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3], mbx);
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun 		if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1195*4882a593Smuzhiyun 			atomic_set(&vha->loop_state, LOOP_DOWN);
1196*4882a593Smuzhiyun 			atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1197*4882a593Smuzhiyun 			/*
1198*4882a593Smuzhiyun 			 * In case of loop down, restore WWPN from
1199*4882a593Smuzhiyun 			 * NVRAM in case of FA-WWPN capable ISP
1200*4882a593Smuzhiyun 			 * Restore for Physical Port only
1201*4882a593Smuzhiyun 			 */
1202*4882a593Smuzhiyun 			if (!vha->vp_idx) {
1203*4882a593Smuzhiyun 				if (ha->flags.fawwpn_enabled &&
1204*4882a593Smuzhiyun 				    (ha->current_topology == ISP_CFG_F)) {
1205*4882a593Smuzhiyun 					memcpy(vha->port_name, ha->port_name, WWN_SIZE);
1206*4882a593Smuzhiyun 					fc_host_port_name(vha->host) =
1207*4882a593Smuzhiyun 					    wwn_to_u64(vha->port_name);
1208*4882a593Smuzhiyun 					ql_dbg(ql_dbg_init + ql_dbg_verbose,
1209*4882a593Smuzhiyun 					    vha, 0x00d8, "LOOP DOWN detected,"
1210*4882a593Smuzhiyun 					    "restore WWPN %016llx\n",
1211*4882a593Smuzhiyun 					    wwn_to_u64(vha->port_name));
1212*4882a593Smuzhiyun 				}
1213*4882a593Smuzhiyun 
1214*4882a593Smuzhiyun 				clear_bit(VP_CONFIG_OK, &vha->vp_flags);
1215*4882a593Smuzhiyun 			}
1216*4882a593Smuzhiyun 
1217*4882a593Smuzhiyun 			vha->device_flags |= DFLG_NO_CABLE;
1218*4882a593Smuzhiyun 			qla2x00_mark_all_devices_lost(vha);
1219*4882a593Smuzhiyun 		}
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 		if (vha->vp_idx) {
1222*4882a593Smuzhiyun 			atomic_set(&vha->vp_state, VP_FAILED);
1223*4882a593Smuzhiyun 			fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1224*4882a593Smuzhiyun 		}
1225*4882a593Smuzhiyun 
1226*4882a593Smuzhiyun 		vha->flags.management_server_logged_in = 0;
1227*4882a593Smuzhiyun 		ha->link_data_rate = PORT_SPEED_UNKNOWN;
1228*4882a593Smuzhiyun 		qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1229*4882a593Smuzhiyun 		break;
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun 	case MBA_LIP_RESET:		/* LIP reset occurred */
1232*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x500c,
1233*4882a593Smuzhiyun 		    "LIP reset occurred (%x).\n", mb[1]);
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 		if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1236*4882a593Smuzhiyun 			atomic_set(&vha->loop_state, LOOP_DOWN);
1237*4882a593Smuzhiyun 			atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1238*4882a593Smuzhiyun 			qla2x00_mark_all_devices_lost(vha);
1239*4882a593Smuzhiyun 		}
1240*4882a593Smuzhiyun 
1241*4882a593Smuzhiyun 		if (vha->vp_idx) {
1242*4882a593Smuzhiyun 			atomic_set(&vha->vp_state, VP_FAILED);
1243*4882a593Smuzhiyun 			fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1244*4882a593Smuzhiyun 		}
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun 		set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 		ha->operating_mode = LOOP;
1249*4882a593Smuzhiyun 		vha->flags.management_server_logged_in = 0;
1250*4882a593Smuzhiyun 		qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1251*4882a593Smuzhiyun 		break;
1252*4882a593Smuzhiyun 
1253*4882a593Smuzhiyun 	/* case MBA_DCBX_COMPLETE: */
1254*4882a593Smuzhiyun 	case MBA_POINT_TO_POINT:	/* Point-to-Point */
1255*4882a593Smuzhiyun 		ha->flags.lip_ae = 0;
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 		if (IS_QLA2100(ha))
1258*4882a593Smuzhiyun 			break;
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun 		if (IS_CNA_CAPABLE(ha)) {
1261*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x500d,
1262*4882a593Smuzhiyun 			    "DCBX Completed -- %04x %04x %04x.\n",
1263*4882a593Smuzhiyun 			    mb[1], mb[2], mb[3]);
1264*4882a593Smuzhiyun 			if (ha->notify_dcbx_comp && !vha->vp_idx)
1265*4882a593Smuzhiyun 				complete(&ha->dcbx_comp);
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun 		} else
1268*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x500e,
1269*4882a593Smuzhiyun 			    "Asynchronous P2P MODE received.\n");
1270*4882a593Smuzhiyun 
1271*4882a593Smuzhiyun 		/*
1272*4882a593Smuzhiyun 		 * Until there's a transition from loop down to loop up, treat
1273*4882a593Smuzhiyun 		 * this as loop down only.
1274*4882a593Smuzhiyun 		 */
1275*4882a593Smuzhiyun 		if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1276*4882a593Smuzhiyun 			atomic_set(&vha->loop_state, LOOP_DOWN);
1277*4882a593Smuzhiyun 			if (!atomic_read(&vha->loop_down_timer))
1278*4882a593Smuzhiyun 				atomic_set(&vha->loop_down_timer,
1279*4882a593Smuzhiyun 				    LOOP_DOWN_TIME);
1280*4882a593Smuzhiyun 			if (!N2N_TOPO(ha))
1281*4882a593Smuzhiyun 				qla2x00_mark_all_devices_lost(vha);
1282*4882a593Smuzhiyun 		}
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 		if (vha->vp_idx) {
1285*4882a593Smuzhiyun 			atomic_set(&vha->vp_state, VP_FAILED);
1286*4882a593Smuzhiyun 			fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1287*4882a593Smuzhiyun 		}
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun 		if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
1290*4882a593Smuzhiyun 			set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 		set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1293*4882a593Smuzhiyun 		set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun 		vha->flags.management_server_logged_in = 0;
1296*4882a593Smuzhiyun 		break;
1297*4882a593Smuzhiyun 
1298*4882a593Smuzhiyun 	case MBA_CHG_IN_CONNECTION:	/* Change in connection mode */
1299*4882a593Smuzhiyun 		if (IS_QLA2100(ha))
1300*4882a593Smuzhiyun 			break;
1301*4882a593Smuzhiyun 
1302*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x500f,
1303*4882a593Smuzhiyun 		    "Configuration change detected: value=%x.\n", mb[1]);
1304*4882a593Smuzhiyun 
1305*4882a593Smuzhiyun 		if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1306*4882a593Smuzhiyun 			atomic_set(&vha->loop_state, LOOP_DOWN);
1307*4882a593Smuzhiyun 			if (!atomic_read(&vha->loop_down_timer))
1308*4882a593Smuzhiyun 				atomic_set(&vha->loop_down_timer,
1309*4882a593Smuzhiyun 				    LOOP_DOWN_TIME);
1310*4882a593Smuzhiyun 			qla2x00_mark_all_devices_lost(vha);
1311*4882a593Smuzhiyun 		}
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun 		if (vha->vp_idx) {
1314*4882a593Smuzhiyun 			atomic_set(&vha->vp_state, VP_FAILED);
1315*4882a593Smuzhiyun 			fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1316*4882a593Smuzhiyun 		}
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun 		set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1319*4882a593Smuzhiyun 		set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1320*4882a593Smuzhiyun 		break;
1321*4882a593Smuzhiyun 
1322*4882a593Smuzhiyun 	case MBA_PORT_UPDATE:		/* Port database update */
1323*4882a593Smuzhiyun 		/*
1324*4882a593Smuzhiyun 		 * Handle only global and vn-port update events
1325*4882a593Smuzhiyun 		 *
1326*4882a593Smuzhiyun 		 * Relevant inputs:
1327*4882a593Smuzhiyun 		 * mb[1] = N_Port handle of changed port
1328*4882a593Smuzhiyun 		 * OR 0xffff for global event
1329*4882a593Smuzhiyun 		 * mb[2] = New login state
1330*4882a593Smuzhiyun 		 * 7 = Port logged out
1331*4882a593Smuzhiyun 		 * mb[3] = LSB is vp_idx, 0xff = all vps
1332*4882a593Smuzhiyun 		 *
1333*4882a593Smuzhiyun 		 * Skip processing if:
1334*4882a593Smuzhiyun 		 *       Event is global, vp_idx is NOT all vps,
1335*4882a593Smuzhiyun 		 *           vp_idx does not match
1336*4882a593Smuzhiyun 		 *       Event is not global, vp_idx does not match
1337*4882a593Smuzhiyun 		 */
1338*4882a593Smuzhiyun 		if (IS_QLA2XXX_MIDTYPE(ha) &&
1339*4882a593Smuzhiyun 		    ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
1340*4882a593Smuzhiyun 			(mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
1341*4882a593Smuzhiyun 			break;
1342*4882a593Smuzhiyun 
1343*4882a593Smuzhiyun 		if (mb[2] == 0x7) {
1344*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5010,
1345*4882a593Smuzhiyun 			    "Port %s %04x %04x %04x.\n",
1346*4882a593Smuzhiyun 			    mb[1] == 0xffff ? "unavailable" : "logout",
1347*4882a593Smuzhiyun 			    mb[1], mb[2], mb[3]);
1348*4882a593Smuzhiyun 
1349*4882a593Smuzhiyun 			if (mb[1] == 0xffff)
1350*4882a593Smuzhiyun 				goto global_port_update;
1351*4882a593Smuzhiyun 
1352*4882a593Smuzhiyun 			if (mb[1] == NPH_SNS_LID(ha)) {
1353*4882a593Smuzhiyun 				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1354*4882a593Smuzhiyun 				set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1355*4882a593Smuzhiyun 				break;
1356*4882a593Smuzhiyun 			}
1357*4882a593Smuzhiyun 
1358*4882a593Smuzhiyun 			/* use handle_cnt for loop id/nport handle */
1359*4882a593Smuzhiyun 			if (IS_FWI2_CAPABLE(ha))
1360*4882a593Smuzhiyun 				handle_cnt = NPH_SNS;
1361*4882a593Smuzhiyun 			else
1362*4882a593Smuzhiyun 				handle_cnt = SIMPLE_NAME_SERVER;
1363*4882a593Smuzhiyun 			if (mb[1] == handle_cnt) {
1364*4882a593Smuzhiyun 				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1365*4882a593Smuzhiyun 				set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1366*4882a593Smuzhiyun 				break;
1367*4882a593Smuzhiyun 			}
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun 			/* Port logout */
1370*4882a593Smuzhiyun 			fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1371*4882a593Smuzhiyun 			if (!fcport)
1372*4882a593Smuzhiyun 				break;
1373*4882a593Smuzhiyun 			if (atomic_read(&fcport->state) != FCS_ONLINE)
1374*4882a593Smuzhiyun 				break;
1375*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x508a,
1376*4882a593Smuzhiyun 			    "Marking port lost loopid=%04x portid=%06x.\n",
1377*4882a593Smuzhiyun 			    fcport->loop_id, fcport->d_id.b24);
1378*4882a593Smuzhiyun 			if (qla_ini_mode_enabled(vha)) {
1379*4882a593Smuzhiyun 				fcport->logout_on_delete = 0;
1380*4882a593Smuzhiyun 				qlt_schedule_sess_for_deletion(fcport);
1381*4882a593Smuzhiyun 			}
1382*4882a593Smuzhiyun 			break;
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun global_port_update:
1385*4882a593Smuzhiyun 			if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1386*4882a593Smuzhiyun 				atomic_set(&vha->loop_state, LOOP_DOWN);
1387*4882a593Smuzhiyun 				atomic_set(&vha->loop_down_timer,
1388*4882a593Smuzhiyun 				    LOOP_DOWN_TIME);
1389*4882a593Smuzhiyun 				vha->device_flags |= DFLG_NO_CABLE;
1390*4882a593Smuzhiyun 				qla2x00_mark_all_devices_lost(vha);
1391*4882a593Smuzhiyun 			}
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun 			if (vha->vp_idx) {
1394*4882a593Smuzhiyun 				atomic_set(&vha->vp_state, VP_FAILED);
1395*4882a593Smuzhiyun 				fc_vport_set_state(vha->fc_vport,
1396*4882a593Smuzhiyun 				    FC_VPORT_FAILED);
1397*4882a593Smuzhiyun 				qla2x00_mark_all_devices_lost(vha);
1398*4882a593Smuzhiyun 			}
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 			vha->flags.management_server_logged_in = 0;
1401*4882a593Smuzhiyun 			ha->link_data_rate = PORT_SPEED_UNKNOWN;
1402*4882a593Smuzhiyun 			break;
1403*4882a593Smuzhiyun 		}
1404*4882a593Smuzhiyun 
1405*4882a593Smuzhiyun 		/*
1406*4882a593Smuzhiyun 		 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1407*4882a593Smuzhiyun 		 * event etc. earlier indicating loop is down) then process
1408*4882a593Smuzhiyun 		 * it.  Otherwise ignore it and Wait for RSCN to come in.
1409*4882a593Smuzhiyun 		 */
1410*4882a593Smuzhiyun 		atomic_set(&vha->loop_down_timer, 0);
1411*4882a593Smuzhiyun 		if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
1412*4882a593Smuzhiyun 			!ha->flags.n2n_ae  &&
1413*4882a593Smuzhiyun 		    atomic_read(&vha->loop_state) != LOOP_DEAD) {
1414*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5011,
1415*4882a593Smuzhiyun 			    "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1416*4882a593Smuzhiyun 			    mb[1], mb[2], mb[3]);
1417*4882a593Smuzhiyun 			break;
1418*4882a593Smuzhiyun 		}
1419*4882a593Smuzhiyun 
1420*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5012,
1421*4882a593Smuzhiyun 		    "Port database changed %04x %04x %04x.\n",
1422*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun 		/*
1425*4882a593Smuzhiyun 		 * Mark all devices as missing so we will login again.
1426*4882a593Smuzhiyun 		 */
1427*4882a593Smuzhiyun 		atomic_set(&vha->loop_state, LOOP_UP);
1428*4882a593Smuzhiyun 		vha->scan.scan_retry = 0;
1429*4882a593Smuzhiyun 
1430*4882a593Smuzhiyun 		set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1431*4882a593Smuzhiyun 		set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1432*4882a593Smuzhiyun 		set_bit(VP_CONFIG_OK, &vha->vp_flags);
1433*4882a593Smuzhiyun 		break;
1434*4882a593Smuzhiyun 
1435*4882a593Smuzhiyun 	case MBA_RSCN_UPDATE:		/* State Change Registration */
1436*4882a593Smuzhiyun 		/* Check if the Vport has issued a SCR */
1437*4882a593Smuzhiyun 		if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
1438*4882a593Smuzhiyun 			break;
1439*4882a593Smuzhiyun 		/* Only handle SCNs for our Vport index. */
1440*4882a593Smuzhiyun 		if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
1441*4882a593Smuzhiyun 			break;
1442*4882a593Smuzhiyun 
1443*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5013,
1444*4882a593Smuzhiyun 		    "RSCN database changed -- %04x %04x %04x.\n",
1445*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1446*4882a593Smuzhiyun 
1447*4882a593Smuzhiyun 		rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
1448*4882a593Smuzhiyun 		host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1449*4882a593Smuzhiyun 				| vha->d_id.b.al_pa;
1450*4882a593Smuzhiyun 		if (rscn_entry == host_pid) {
1451*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5014,
1452*4882a593Smuzhiyun 			    "Ignoring RSCN update to local host "
1453*4882a593Smuzhiyun 			    "port ID (%06x).\n", host_pid);
1454*4882a593Smuzhiyun 			break;
1455*4882a593Smuzhiyun 		}
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun 		/* Ignore reserved bits from RSCN-payload. */
1458*4882a593Smuzhiyun 		rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun 		/* Skip RSCNs for virtual ports on the same physical port */
1461*4882a593Smuzhiyun 		if (qla2x00_is_a_vp_did(vha, rscn_entry))
1462*4882a593Smuzhiyun 			break;
1463*4882a593Smuzhiyun 
1464*4882a593Smuzhiyun 		atomic_set(&vha->loop_down_timer, 0);
1465*4882a593Smuzhiyun 		vha->flags.management_server_logged_in = 0;
1466*4882a593Smuzhiyun 		{
1467*4882a593Smuzhiyun 			struct event_arg ea;
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun 			memset(&ea, 0, sizeof(ea));
1470*4882a593Smuzhiyun 			ea.id.b24 = rscn_entry;
1471*4882a593Smuzhiyun 			ea.id.b.rsvd_1 = rscn_entry >> 24;
1472*4882a593Smuzhiyun 			qla2x00_handle_rscn(vha, &ea);
1473*4882a593Smuzhiyun 			qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1474*4882a593Smuzhiyun 		}
1475*4882a593Smuzhiyun 		break;
1476*4882a593Smuzhiyun 	case MBA_CONGN_NOTI_RECV:
1477*4882a593Smuzhiyun 		if (!ha->flags.scm_enabled ||
1478*4882a593Smuzhiyun 		    mb[1] != QLA_CON_PRIMITIVE_RECEIVED)
1479*4882a593Smuzhiyun 			break;
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun 		if (mb[2] == QLA_CONGESTION_ARB_WARNING) {
1482*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x509b,
1483*4882a593Smuzhiyun 			       "Congestion Warning %04x %04x.\n", mb[1], mb[2]);
1484*4882a593Smuzhiyun 		} else if (mb[2] == QLA_CONGESTION_ARB_ALARM) {
1485*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x509b,
1486*4882a593Smuzhiyun 			       "Congestion Alarm %04x %04x.\n", mb[1], mb[2]);
1487*4882a593Smuzhiyun 		}
1488*4882a593Smuzhiyun 		break;
1489*4882a593Smuzhiyun 	/* case MBA_RIO_RESPONSE: */
1490*4882a593Smuzhiyun 	case MBA_ZIO_RESPONSE:
1491*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5015,
1492*4882a593Smuzhiyun 		    "[R|Z]IO update completion.\n");
1493*4882a593Smuzhiyun 
1494*4882a593Smuzhiyun 		if (IS_FWI2_CAPABLE(ha))
1495*4882a593Smuzhiyun 			qla24xx_process_response_queue(vha, rsp);
1496*4882a593Smuzhiyun 		else
1497*4882a593Smuzhiyun 			qla2x00_process_response_queue(rsp);
1498*4882a593Smuzhiyun 		break;
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 	case MBA_DISCARD_RND_FRAME:
1501*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5016,
1502*4882a593Smuzhiyun 		    "Discard RND Frame -- %04x %04x %04x.\n",
1503*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1504*4882a593Smuzhiyun 		break;
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	case MBA_TRACE_NOTIFICATION:
1507*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5017,
1508*4882a593Smuzhiyun 		    "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
1509*4882a593Smuzhiyun 		break;
1510*4882a593Smuzhiyun 
1511*4882a593Smuzhiyun 	case MBA_ISP84XX_ALERT:
1512*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5018,
1513*4882a593Smuzhiyun 		    "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1514*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1515*4882a593Smuzhiyun 
1516*4882a593Smuzhiyun 		spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1517*4882a593Smuzhiyun 		switch (mb[1]) {
1518*4882a593Smuzhiyun 		case A84_PANIC_RECOVERY:
1519*4882a593Smuzhiyun 			ql_log(ql_log_info, vha, 0x5019,
1520*4882a593Smuzhiyun 			    "Alert 84XX: panic recovery %04x %04x.\n",
1521*4882a593Smuzhiyun 			    mb[2], mb[3]);
1522*4882a593Smuzhiyun 			break;
1523*4882a593Smuzhiyun 		case A84_OP_LOGIN_COMPLETE:
1524*4882a593Smuzhiyun 			ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
1525*4882a593Smuzhiyun 			ql_log(ql_log_info, vha, 0x501a,
1526*4882a593Smuzhiyun 			    "Alert 84XX: firmware version %x.\n",
1527*4882a593Smuzhiyun 			    ha->cs84xx->op_fw_version);
1528*4882a593Smuzhiyun 			break;
1529*4882a593Smuzhiyun 		case A84_DIAG_LOGIN_COMPLETE:
1530*4882a593Smuzhiyun 			ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1531*4882a593Smuzhiyun 			ql_log(ql_log_info, vha, 0x501b,
1532*4882a593Smuzhiyun 			    "Alert 84XX: diagnostic firmware version %x.\n",
1533*4882a593Smuzhiyun 			    ha->cs84xx->diag_fw_version);
1534*4882a593Smuzhiyun 			break;
1535*4882a593Smuzhiyun 		case A84_GOLD_LOGIN_COMPLETE:
1536*4882a593Smuzhiyun 			ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1537*4882a593Smuzhiyun 			ha->cs84xx->fw_update = 1;
1538*4882a593Smuzhiyun 			ql_log(ql_log_info, vha, 0x501c,
1539*4882a593Smuzhiyun 			    "Alert 84XX: gold firmware version %x.\n",
1540*4882a593Smuzhiyun 			    ha->cs84xx->gold_fw_version);
1541*4882a593Smuzhiyun 			break;
1542*4882a593Smuzhiyun 		default:
1543*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x501d,
1544*4882a593Smuzhiyun 			    "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
1545*4882a593Smuzhiyun 			    mb[1], mb[2], mb[3]);
1546*4882a593Smuzhiyun 		}
1547*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1548*4882a593Smuzhiyun 		break;
1549*4882a593Smuzhiyun 	case MBA_DCBX_START:
1550*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x501e,
1551*4882a593Smuzhiyun 		    "DCBX Started -- %04x %04x %04x.\n",
1552*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1553*4882a593Smuzhiyun 		break;
1554*4882a593Smuzhiyun 	case MBA_DCBX_PARAM_UPDATE:
1555*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x501f,
1556*4882a593Smuzhiyun 		    "DCBX Parameters Updated -- %04x %04x %04x.\n",
1557*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1558*4882a593Smuzhiyun 		break;
1559*4882a593Smuzhiyun 	case MBA_FCF_CONF_ERR:
1560*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5020,
1561*4882a593Smuzhiyun 		    "FCF Configuration Error -- %04x %04x %04x.\n",
1562*4882a593Smuzhiyun 		    mb[1], mb[2], mb[3]);
1563*4882a593Smuzhiyun 		break;
1564*4882a593Smuzhiyun 	case MBA_IDC_NOTIFY:
1565*4882a593Smuzhiyun 		if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1566*4882a593Smuzhiyun 			mb[4] = rd_reg_word(&reg24->mailbox4);
1567*4882a593Smuzhiyun 			if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1568*4882a593Smuzhiyun 			    (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1569*4882a593Smuzhiyun 			    (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
1570*4882a593Smuzhiyun 				set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
1571*4882a593Smuzhiyun 				/*
1572*4882a593Smuzhiyun 				 * Extend loop down timer since port is active.
1573*4882a593Smuzhiyun 				 */
1574*4882a593Smuzhiyun 				if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1575*4882a593Smuzhiyun 					atomic_set(&vha->loop_down_timer,
1576*4882a593Smuzhiyun 					    LOOP_DOWN_TIME);
1577*4882a593Smuzhiyun 				qla2xxx_wake_dpc(vha);
1578*4882a593Smuzhiyun 			}
1579*4882a593Smuzhiyun 		}
1580*4882a593Smuzhiyun 		fallthrough;
1581*4882a593Smuzhiyun 	case MBA_IDC_COMPLETE:
1582*4882a593Smuzhiyun 		if (ha->notify_lb_portup_comp && !vha->vp_idx)
1583*4882a593Smuzhiyun 			complete(&ha->lb_portup_comp);
1584*4882a593Smuzhiyun 		fallthrough;
1585*4882a593Smuzhiyun 	case MBA_IDC_TIME_EXT:
1586*4882a593Smuzhiyun 		if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1587*4882a593Smuzhiyun 		    IS_QLA8044(ha))
1588*4882a593Smuzhiyun 			qla81xx_idc_event(vha, mb[0], mb[1]);
1589*4882a593Smuzhiyun 		break;
1590*4882a593Smuzhiyun 
1591*4882a593Smuzhiyun 	case MBA_IDC_AEN:
1592*4882a593Smuzhiyun 		if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1593*4882a593Smuzhiyun 			qla27xx_handle_8200_aen(vha, mb);
1594*4882a593Smuzhiyun 		} else if (IS_QLA83XX(ha)) {
1595*4882a593Smuzhiyun 			mb[4] = rd_reg_word(&reg24->mailbox4);
1596*4882a593Smuzhiyun 			mb[5] = rd_reg_word(&reg24->mailbox5);
1597*4882a593Smuzhiyun 			mb[6] = rd_reg_word(&reg24->mailbox6);
1598*4882a593Smuzhiyun 			mb[7] = rd_reg_word(&reg24->mailbox7);
1599*4882a593Smuzhiyun 			qla83xx_handle_8200_aen(vha, mb);
1600*4882a593Smuzhiyun 		} else {
1601*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5052,
1602*4882a593Smuzhiyun 			    "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
1603*4882a593Smuzhiyun 			    mb[0], mb[1], mb[2], mb[3]);
1604*4882a593Smuzhiyun 		}
1605*4882a593Smuzhiyun 		break;
1606*4882a593Smuzhiyun 
1607*4882a593Smuzhiyun 	case MBA_DPORT_DIAGNOSTICS:
1608*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5052,
1609*4882a593Smuzhiyun 		    "D-Port Diagnostics: %04x %04x %04x %04x\n",
1610*4882a593Smuzhiyun 		    mb[0], mb[1], mb[2], mb[3]);
1611*4882a593Smuzhiyun 		memcpy(vha->dport_data, mb, sizeof(vha->dport_data));
1612*4882a593Smuzhiyun 		if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1613*4882a593Smuzhiyun 			static char *results[] = {
1614*4882a593Smuzhiyun 			    "start", "done(pass)", "done(error)", "undefined" };
1615*4882a593Smuzhiyun 			static char *types[] = {
1616*4882a593Smuzhiyun 			    "none", "dynamic", "static", "other" };
1617*4882a593Smuzhiyun 			uint result = mb[1] >> 0 & 0x3;
1618*4882a593Smuzhiyun 			uint type = mb[1] >> 6 & 0x3;
1619*4882a593Smuzhiyun 			uint sw = mb[1] >> 15 & 0x1;
1620*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5052,
1621*4882a593Smuzhiyun 			    "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
1622*4882a593Smuzhiyun 			    results[result], types[type], sw);
1623*4882a593Smuzhiyun 			if (result == 2) {
1624*4882a593Smuzhiyun 				static char *reasons[] = {
1625*4882a593Smuzhiyun 				    "reserved", "unexpected reject",
1626*4882a593Smuzhiyun 				    "unexpected phase", "retry exceeded",
1627*4882a593Smuzhiyun 				    "timed out", "not supported",
1628*4882a593Smuzhiyun 				    "user stopped" };
1629*4882a593Smuzhiyun 				uint reason = mb[2] >> 0 & 0xf;
1630*4882a593Smuzhiyun 				uint phase = mb[2] >> 12 & 0xf;
1631*4882a593Smuzhiyun 				ql_dbg(ql_dbg_async, vha, 0x5052,
1632*4882a593Smuzhiyun 				    "D-Port Diagnostics: reason=%s phase=%u \n",
1633*4882a593Smuzhiyun 				    reason < 7 ? reasons[reason] : "other",
1634*4882a593Smuzhiyun 				    phase >> 1);
1635*4882a593Smuzhiyun 			}
1636*4882a593Smuzhiyun 		}
1637*4882a593Smuzhiyun 		break;
1638*4882a593Smuzhiyun 
1639*4882a593Smuzhiyun 	case MBA_TEMPERATURE_ALERT:
1640*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x505e,
1641*4882a593Smuzhiyun 		    "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1642*4882a593Smuzhiyun 		if (mb[1] == 0x12)
1643*4882a593Smuzhiyun 			schedule_work(&ha->board_disable);
1644*4882a593Smuzhiyun 		break;
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun 	case MBA_TRANS_INSERT:
1647*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5091,
1648*4882a593Smuzhiyun 		    "Transceiver Insertion: %04x\n", mb[1]);
1649*4882a593Smuzhiyun 		set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
1650*4882a593Smuzhiyun 		break;
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 	case MBA_TRANS_REMOVE:
1653*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n");
1654*4882a593Smuzhiyun 		break;
1655*4882a593Smuzhiyun 
1656*4882a593Smuzhiyun 	default:
1657*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5057,
1658*4882a593Smuzhiyun 		    "Unknown AEN:%04x %04x %04x %04x\n",
1659*4882a593Smuzhiyun 		    mb[0], mb[1], mb[2], mb[3]);
1660*4882a593Smuzhiyun 	}
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	qlt_async_event(mb[0], vha, mb);
1663*4882a593Smuzhiyun 
1664*4882a593Smuzhiyun 	if (!vha->vp_idx && ha->num_vhosts)
1665*4882a593Smuzhiyun 		qla2x00_alert_all_vps(rsp, mb);
1666*4882a593Smuzhiyun }
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun /**
1669*4882a593Smuzhiyun  * qla2x00_process_completed_request() - Process a Fast Post response.
1670*4882a593Smuzhiyun  * @vha: SCSI driver HA context
1671*4882a593Smuzhiyun  * @req: request queue
1672*4882a593Smuzhiyun  * @index: SRB index
1673*4882a593Smuzhiyun  */
1674*4882a593Smuzhiyun void
qla2x00_process_completed_request(struct scsi_qla_host * vha,struct req_que * req,uint32_t index)1675*4882a593Smuzhiyun qla2x00_process_completed_request(struct scsi_qla_host *vha,
1676*4882a593Smuzhiyun 				  struct req_que *req, uint32_t index)
1677*4882a593Smuzhiyun {
1678*4882a593Smuzhiyun 	srb_t *sp;
1679*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
1680*4882a593Smuzhiyun 
1681*4882a593Smuzhiyun 	/* Validate handle. */
1682*4882a593Smuzhiyun 	if (index >= req->num_outstanding_cmds) {
1683*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x3014,
1684*4882a593Smuzhiyun 		    "Invalid SCSI command index (%x).\n", index);
1685*4882a593Smuzhiyun 
1686*4882a593Smuzhiyun 		if (IS_P3P_TYPE(ha))
1687*4882a593Smuzhiyun 			set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1688*4882a593Smuzhiyun 		else
1689*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1690*4882a593Smuzhiyun 		return;
1691*4882a593Smuzhiyun 	}
1692*4882a593Smuzhiyun 
1693*4882a593Smuzhiyun 	sp = req->outstanding_cmds[index];
1694*4882a593Smuzhiyun 	if (sp) {
1695*4882a593Smuzhiyun 		/* Free outstanding command slot. */
1696*4882a593Smuzhiyun 		req->outstanding_cmds[index] = NULL;
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun 		/* Save ISP completion status */
1699*4882a593Smuzhiyun 		sp->done(sp, DID_OK << 16);
1700*4882a593Smuzhiyun 	} else {
1701*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1702*4882a593Smuzhiyun 
1703*4882a593Smuzhiyun 		if (IS_P3P_TYPE(ha))
1704*4882a593Smuzhiyun 			set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1705*4882a593Smuzhiyun 		else
1706*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1707*4882a593Smuzhiyun 	}
1708*4882a593Smuzhiyun }
1709*4882a593Smuzhiyun 
1710*4882a593Smuzhiyun srb_t *
qla2x00_get_sp_from_handle(scsi_qla_host_t * vha,const char * func,struct req_que * req,void * iocb)1711*4882a593Smuzhiyun qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1712*4882a593Smuzhiyun     struct req_que *req, void *iocb)
1713*4882a593Smuzhiyun {
1714*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
1715*4882a593Smuzhiyun 	sts_entry_t *pkt = iocb;
1716*4882a593Smuzhiyun 	srb_t *sp;
1717*4882a593Smuzhiyun 	uint16_t index;
1718*4882a593Smuzhiyun 
1719*4882a593Smuzhiyun 	index = LSW(pkt->handle);
1720*4882a593Smuzhiyun 	if (index >= req->num_outstanding_cmds) {
1721*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5031,
1722*4882a593Smuzhiyun 			   "%s: Invalid command index (%x) type %8ph.\n",
1723*4882a593Smuzhiyun 			   func, index, iocb);
1724*4882a593Smuzhiyun 		if (IS_P3P_TYPE(ha))
1725*4882a593Smuzhiyun 			set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1726*4882a593Smuzhiyun 		else
1727*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1728*4882a593Smuzhiyun 		return NULL;
1729*4882a593Smuzhiyun 	}
1730*4882a593Smuzhiyun 	sp = req->outstanding_cmds[index];
1731*4882a593Smuzhiyun 	if (!sp) {
1732*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5032,
1733*4882a593Smuzhiyun 			"%s: Invalid completion handle (%x) -- timed-out.\n",
1734*4882a593Smuzhiyun 			func, index);
1735*4882a593Smuzhiyun 		return NULL;
1736*4882a593Smuzhiyun 	}
1737*4882a593Smuzhiyun 	if (sp->handle != index) {
1738*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x5033,
1739*4882a593Smuzhiyun 			"%s: SRB handle (%x) mismatch %x.\n", func,
1740*4882a593Smuzhiyun 			sp->handle, index);
1741*4882a593Smuzhiyun 		return NULL;
1742*4882a593Smuzhiyun 	}
1743*4882a593Smuzhiyun 
1744*4882a593Smuzhiyun 	req->outstanding_cmds[index] = NULL;
1745*4882a593Smuzhiyun 	return sp;
1746*4882a593Smuzhiyun }
1747*4882a593Smuzhiyun 
1748*4882a593Smuzhiyun static void
qla2x00_mbx_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct mbx_entry * mbx)1749*4882a593Smuzhiyun qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1750*4882a593Smuzhiyun     struct mbx_entry *mbx)
1751*4882a593Smuzhiyun {
1752*4882a593Smuzhiyun 	const char func[] = "MBX-IOCB";
1753*4882a593Smuzhiyun 	const char *type;
1754*4882a593Smuzhiyun 	fc_port_t *fcport;
1755*4882a593Smuzhiyun 	srb_t *sp;
1756*4882a593Smuzhiyun 	struct srb_iocb *lio;
1757*4882a593Smuzhiyun 	uint16_t *data;
1758*4882a593Smuzhiyun 	uint16_t status;
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1761*4882a593Smuzhiyun 	if (!sp)
1762*4882a593Smuzhiyun 		return;
1763*4882a593Smuzhiyun 
1764*4882a593Smuzhiyun 	lio = &sp->u.iocb_cmd;
1765*4882a593Smuzhiyun 	type = sp->name;
1766*4882a593Smuzhiyun 	fcport = sp->fcport;
1767*4882a593Smuzhiyun 	data = lio->u.logio.data;
1768*4882a593Smuzhiyun 
1769*4882a593Smuzhiyun 	data[0] = MBS_COMMAND_ERROR;
1770*4882a593Smuzhiyun 	data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1771*4882a593Smuzhiyun 	    QLA_LOGIO_LOGIN_RETRIED : 0;
1772*4882a593Smuzhiyun 	if (mbx->entry_status) {
1773*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5043,
1774*4882a593Smuzhiyun 		    "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
1775*4882a593Smuzhiyun 		    "entry-status=%x status=%x state-flag=%x "
1776*4882a593Smuzhiyun 		    "status-flags=%x.\n", type, sp->handle,
1777*4882a593Smuzhiyun 		    fcport->d_id.b.domain, fcport->d_id.b.area,
1778*4882a593Smuzhiyun 		    fcport->d_id.b.al_pa, mbx->entry_status,
1779*4882a593Smuzhiyun 		    le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
1780*4882a593Smuzhiyun 		    le16_to_cpu(mbx->status_flags));
1781*4882a593Smuzhiyun 
1782*4882a593Smuzhiyun 		ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
1783*4882a593Smuzhiyun 		    mbx, sizeof(*mbx));
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun 		goto logio_done;
1786*4882a593Smuzhiyun 	}
1787*4882a593Smuzhiyun 
1788*4882a593Smuzhiyun 	status = le16_to_cpu(mbx->status);
1789*4882a593Smuzhiyun 	if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
1790*4882a593Smuzhiyun 	    le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1791*4882a593Smuzhiyun 		status = 0;
1792*4882a593Smuzhiyun 	if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
1793*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x5045,
1794*4882a593Smuzhiyun 		    "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1795*4882a593Smuzhiyun 		    type, sp->handle, fcport->d_id.b.domain,
1796*4882a593Smuzhiyun 		    fcport->d_id.b.area, fcport->d_id.b.al_pa,
1797*4882a593Smuzhiyun 		    le16_to_cpu(mbx->mb1));
1798*4882a593Smuzhiyun 
1799*4882a593Smuzhiyun 		data[0] = MBS_COMMAND_COMPLETE;
1800*4882a593Smuzhiyun 		if (sp->type == SRB_LOGIN_CMD) {
1801*4882a593Smuzhiyun 			fcport->port_type = FCT_TARGET;
1802*4882a593Smuzhiyun 			if (le16_to_cpu(mbx->mb1) & BIT_0)
1803*4882a593Smuzhiyun 				fcport->port_type = FCT_INITIATOR;
1804*4882a593Smuzhiyun 			else if (le16_to_cpu(mbx->mb1) & BIT_1)
1805*4882a593Smuzhiyun 				fcport->flags |= FCF_FCP2_DEVICE;
1806*4882a593Smuzhiyun 		}
1807*4882a593Smuzhiyun 		goto logio_done;
1808*4882a593Smuzhiyun 	}
1809*4882a593Smuzhiyun 
1810*4882a593Smuzhiyun 	data[0] = le16_to_cpu(mbx->mb0);
1811*4882a593Smuzhiyun 	switch (data[0]) {
1812*4882a593Smuzhiyun 	case MBS_PORT_ID_USED:
1813*4882a593Smuzhiyun 		data[1] = le16_to_cpu(mbx->mb1);
1814*4882a593Smuzhiyun 		break;
1815*4882a593Smuzhiyun 	case MBS_LOOP_ID_USED:
1816*4882a593Smuzhiyun 		break;
1817*4882a593Smuzhiyun 	default:
1818*4882a593Smuzhiyun 		data[0] = MBS_COMMAND_ERROR;
1819*4882a593Smuzhiyun 		break;
1820*4882a593Smuzhiyun 	}
1821*4882a593Smuzhiyun 
1822*4882a593Smuzhiyun 	ql_log(ql_log_warn, vha, 0x5046,
1823*4882a593Smuzhiyun 	    "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1824*4882a593Smuzhiyun 	    "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1825*4882a593Smuzhiyun 	    fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1826*4882a593Smuzhiyun 	    status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
1827*4882a593Smuzhiyun 	    le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
1828*4882a593Smuzhiyun 	    le16_to_cpu(mbx->mb7));
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun logio_done:
1831*4882a593Smuzhiyun 	sp->done(sp, 0);
1832*4882a593Smuzhiyun }
1833*4882a593Smuzhiyun 
1834*4882a593Smuzhiyun static void
qla24xx_mbx_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct mbx_24xx_entry * pkt)1835*4882a593Smuzhiyun qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1836*4882a593Smuzhiyun     struct mbx_24xx_entry *pkt)
1837*4882a593Smuzhiyun {
1838*4882a593Smuzhiyun 	const char func[] = "MBX-IOCB2";
1839*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
1840*4882a593Smuzhiyun 	srb_t *sp;
1841*4882a593Smuzhiyun 	struct srb_iocb *si;
1842*4882a593Smuzhiyun 	u16 sz, i;
1843*4882a593Smuzhiyun 	int res;
1844*4882a593Smuzhiyun 
1845*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1846*4882a593Smuzhiyun 	if (!sp)
1847*4882a593Smuzhiyun 		return;
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun 	if (sp->type == SRB_SCSI_CMD ||
1850*4882a593Smuzhiyun 	    sp->type == SRB_NVME_CMD ||
1851*4882a593Smuzhiyun 	    sp->type == SRB_TM_CMD) {
1852*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x509d,
1853*4882a593Smuzhiyun 			"Inconsistent event entry type %d\n", sp->type);
1854*4882a593Smuzhiyun 		if (IS_P3P_TYPE(ha))
1855*4882a593Smuzhiyun 			set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1856*4882a593Smuzhiyun 		else
1857*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1858*4882a593Smuzhiyun 		return;
1859*4882a593Smuzhiyun 	}
1860*4882a593Smuzhiyun 
1861*4882a593Smuzhiyun 	si = &sp->u.iocb_cmd;
1862*4882a593Smuzhiyun 	sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun 	for (i = 0; i < sz; i++)
1865*4882a593Smuzhiyun 		si->u.mbx.in_mb[i] = pkt->mb[i];
1866*4882a593Smuzhiyun 
1867*4882a593Smuzhiyun 	res = (si->u.mbx.in_mb[0] & MBS_MASK);
1868*4882a593Smuzhiyun 
1869*4882a593Smuzhiyun 	sp->done(sp, res);
1870*4882a593Smuzhiyun }
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun static void
qla24xxx_nack_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct nack_to_isp * pkt)1873*4882a593Smuzhiyun qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1874*4882a593Smuzhiyun     struct nack_to_isp *pkt)
1875*4882a593Smuzhiyun {
1876*4882a593Smuzhiyun 	const char func[] = "nack";
1877*4882a593Smuzhiyun 	srb_t *sp;
1878*4882a593Smuzhiyun 	int res = 0;
1879*4882a593Smuzhiyun 
1880*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1881*4882a593Smuzhiyun 	if (!sp)
1882*4882a593Smuzhiyun 		return;
1883*4882a593Smuzhiyun 
1884*4882a593Smuzhiyun 	if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1885*4882a593Smuzhiyun 		res = QLA_FUNCTION_FAILED;
1886*4882a593Smuzhiyun 
1887*4882a593Smuzhiyun 	sp->done(sp, res);
1888*4882a593Smuzhiyun }
1889*4882a593Smuzhiyun 
1890*4882a593Smuzhiyun static void
qla2x00_ct_entry(scsi_qla_host_t * vha,struct req_que * req,sts_entry_t * pkt,int iocb_type)1891*4882a593Smuzhiyun qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1892*4882a593Smuzhiyun     sts_entry_t *pkt, int iocb_type)
1893*4882a593Smuzhiyun {
1894*4882a593Smuzhiyun 	const char func[] = "CT_IOCB";
1895*4882a593Smuzhiyun 	const char *type;
1896*4882a593Smuzhiyun 	srb_t *sp;
1897*4882a593Smuzhiyun 	struct bsg_job *bsg_job;
1898*4882a593Smuzhiyun 	struct fc_bsg_reply *bsg_reply;
1899*4882a593Smuzhiyun 	uint16_t comp_status;
1900*4882a593Smuzhiyun 	int res = 0;
1901*4882a593Smuzhiyun 
1902*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1903*4882a593Smuzhiyun 	if (!sp)
1904*4882a593Smuzhiyun 		return;
1905*4882a593Smuzhiyun 
1906*4882a593Smuzhiyun 	switch (sp->type) {
1907*4882a593Smuzhiyun 	case SRB_CT_CMD:
1908*4882a593Smuzhiyun 	    bsg_job = sp->u.bsg_job;
1909*4882a593Smuzhiyun 	    bsg_reply = bsg_job->reply;
1910*4882a593Smuzhiyun 
1911*4882a593Smuzhiyun 	    type = "ct pass-through";
1912*4882a593Smuzhiyun 
1913*4882a593Smuzhiyun 	    comp_status = le16_to_cpu(pkt->comp_status);
1914*4882a593Smuzhiyun 
1915*4882a593Smuzhiyun 	    /*
1916*4882a593Smuzhiyun 	     * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1917*4882a593Smuzhiyun 	     * fc payload  to the caller
1918*4882a593Smuzhiyun 	     */
1919*4882a593Smuzhiyun 	    bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1920*4882a593Smuzhiyun 	    bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1921*4882a593Smuzhiyun 
1922*4882a593Smuzhiyun 	    if (comp_status != CS_COMPLETE) {
1923*4882a593Smuzhiyun 		    if (comp_status == CS_DATA_UNDERRUN) {
1924*4882a593Smuzhiyun 			    res = DID_OK << 16;
1925*4882a593Smuzhiyun 			    bsg_reply->reply_payload_rcv_len =
1926*4882a593Smuzhiyun 				le16_to_cpu(pkt->rsp_info_len);
1927*4882a593Smuzhiyun 
1928*4882a593Smuzhiyun 			    ql_log(ql_log_warn, vha, 0x5048,
1929*4882a593Smuzhiyun 				"CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1930*4882a593Smuzhiyun 				type, comp_status,
1931*4882a593Smuzhiyun 				bsg_reply->reply_payload_rcv_len);
1932*4882a593Smuzhiyun 		    } else {
1933*4882a593Smuzhiyun 			    ql_log(ql_log_warn, vha, 0x5049,
1934*4882a593Smuzhiyun 				"CT pass-through-%s error comp_status=0x%x.\n",
1935*4882a593Smuzhiyun 				type, comp_status);
1936*4882a593Smuzhiyun 			    res = DID_ERROR << 16;
1937*4882a593Smuzhiyun 			    bsg_reply->reply_payload_rcv_len = 0;
1938*4882a593Smuzhiyun 		    }
1939*4882a593Smuzhiyun 		    ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1940*4882a593Smuzhiyun 			pkt, sizeof(*pkt));
1941*4882a593Smuzhiyun 	    } else {
1942*4882a593Smuzhiyun 		    res = DID_OK << 16;
1943*4882a593Smuzhiyun 		    bsg_reply->reply_payload_rcv_len =
1944*4882a593Smuzhiyun 			bsg_job->reply_payload.payload_len;
1945*4882a593Smuzhiyun 		    bsg_job->reply_len = 0;
1946*4882a593Smuzhiyun 	    }
1947*4882a593Smuzhiyun 	    break;
1948*4882a593Smuzhiyun 	case SRB_CT_PTHRU_CMD:
1949*4882a593Smuzhiyun 	    /*
1950*4882a593Smuzhiyun 	     * borrowing sts_entry_24xx.comp_status.
1951*4882a593Smuzhiyun 	     * same location as ct_entry_24xx.comp_status
1952*4882a593Smuzhiyun 	     */
1953*4882a593Smuzhiyun 	     res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1954*4882a593Smuzhiyun 		 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1955*4882a593Smuzhiyun 		 sp->name);
1956*4882a593Smuzhiyun 	     break;
1957*4882a593Smuzhiyun 	}
1958*4882a593Smuzhiyun 
1959*4882a593Smuzhiyun 	sp->done(sp, res);
1960*4882a593Smuzhiyun }
1961*4882a593Smuzhiyun 
1962*4882a593Smuzhiyun static void
qla24xx_els_ct_entry(scsi_qla_host_t * vha,struct req_que * req,struct sts_entry_24xx * pkt,int iocb_type)1963*4882a593Smuzhiyun qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1964*4882a593Smuzhiyun     struct sts_entry_24xx *pkt, int iocb_type)
1965*4882a593Smuzhiyun {
1966*4882a593Smuzhiyun 	struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt;
1967*4882a593Smuzhiyun 	const char func[] = "ELS_CT_IOCB";
1968*4882a593Smuzhiyun 	const char *type;
1969*4882a593Smuzhiyun 	srb_t *sp;
1970*4882a593Smuzhiyun 	struct bsg_job *bsg_job;
1971*4882a593Smuzhiyun 	struct fc_bsg_reply *bsg_reply;
1972*4882a593Smuzhiyun 	uint16_t comp_status;
1973*4882a593Smuzhiyun 	uint32_t fw_status[3];
1974*4882a593Smuzhiyun 	int res;
1975*4882a593Smuzhiyun 	struct srb_iocb *els;
1976*4882a593Smuzhiyun 
1977*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1978*4882a593Smuzhiyun 	if (!sp)
1979*4882a593Smuzhiyun 		return;
1980*4882a593Smuzhiyun 
1981*4882a593Smuzhiyun 	type = NULL;
1982*4882a593Smuzhiyun 	switch (sp->type) {
1983*4882a593Smuzhiyun 	case SRB_ELS_CMD_RPT:
1984*4882a593Smuzhiyun 	case SRB_ELS_CMD_HST:
1985*4882a593Smuzhiyun 		type = "els";
1986*4882a593Smuzhiyun 		break;
1987*4882a593Smuzhiyun 	case SRB_CT_CMD:
1988*4882a593Smuzhiyun 		type = "ct pass-through";
1989*4882a593Smuzhiyun 		break;
1990*4882a593Smuzhiyun 	case SRB_ELS_DCMD:
1991*4882a593Smuzhiyun 		type = "Driver ELS logo";
1992*4882a593Smuzhiyun 		if (iocb_type != ELS_IOCB_TYPE) {
1993*4882a593Smuzhiyun 			ql_dbg(ql_dbg_user, vha, 0x5047,
1994*4882a593Smuzhiyun 			    "Completing %s: (%p) type=%d.\n",
1995*4882a593Smuzhiyun 			    type, sp, sp->type);
1996*4882a593Smuzhiyun 			sp->done(sp, 0);
1997*4882a593Smuzhiyun 			return;
1998*4882a593Smuzhiyun 		}
1999*4882a593Smuzhiyun 		break;
2000*4882a593Smuzhiyun 	case SRB_CT_PTHRU_CMD:
2001*4882a593Smuzhiyun 		/* borrowing sts_entry_24xx.comp_status.
2002*4882a593Smuzhiyun 		   same location as ct_entry_24xx.comp_status
2003*4882a593Smuzhiyun 		 */
2004*4882a593Smuzhiyun 		res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
2005*4882a593Smuzhiyun 			(struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
2006*4882a593Smuzhiyun 			sp->name);
2007*4882a593Smuzhiyun 		sp->done(sp, res);
2008*4882a593Smuzhiyun 		return;
2009*4882a593Smuzhiyun 	default:
2010*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x503e,
2011*4882a593Smuzhiyun 		    "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
2012*4882a593Smuzhiyun 		return;
2013*4882a593Smuzhiyun 	}
2014*4882a593Smuzhiyun 
2015*4882a593Smuzhiyun 	comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
2016*4882a593Smuzhiyun 	fw_status[1] = le32_to_cpu(ese->error_subcode_1);
2017*4882a593Smuzhiyun 	fw_status[2] = le32_to_cpu(ese->error_subcode_2);
2018*4882a593Smuzhiyun 
2019*4882a593Smuzhiyun 	if (iocb_type == ELS_IOCB_TYPE) {
2020*4882a593Smuzhiyun 		els = &sp->u.iocb_cmd;
2021*4882a593Smuzhiyun 		els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]);
2022*4882a593Smuzhiyun 		els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]);
2023*4882a593Smuzhiyun 		els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]);
2024*4882a593Smuzhiyun 		els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]);
2025*4882a593Smuzhiyun 		if (comp_status == CS_COMPLETE) {
2026*4882a593Smuzhiyun 			res =  DID_OK << 16;
2027*4882a593Smuzhiyun 		} else {
2028*4882a593Smuzhiyun 			if (comp_status == CS_DATA_UNDERRUN) {
2029*4882a593Smuzhiyun 				res =  DID_OK << 16;
2030*4882a593Smuzhiyun 				els->u.els_plogi.len = cpu_to_le16(le32_to_cpu(
2031*4882a593Smuzhiyun 					ese->total_byte_count));
2032*4882a593Smuzhiyun 			} else {
2033*4882a593Smuzhiyun 				els->u.els_plogi.len = 0;
2034*4882a593Smuzhiyun 				res = DID_ERROR << 16;
2035*4882a593Smuzhiyun 			}
2036*4882a593Smuzhiyun 		}
2037*4882a593Smuzhiyun 		ql_dbg(ql_dbg_disc, vha, 0x503f,
2038*4882a593Smuzhiyun 		    "ELS IOCB Done -%s hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
2039*4882a593Smuzhiyun 		    type, sp->handle, comp_status, fw_status[1], fw_status[2],
2040*4882a593Smuzhiyun 		    le32_to_cpu(ese->total_byte_count));
2041*4882a593Smuzhiyun 		goto els_ct_done;
2042*4882a593Smuzhiyun 	}
2043*4882a593Smuzhiyun 
2044*4882a593Smuzhiyun 	/* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
2045*4882a593Smuzhiyun 	 * fc payload  to the caller
2046*4882a593Smuzhiyun 	 */
2047*4882a593Smuzhiyun 	bsg_job = sp->u.bsg_job;
2048*4882a593Smuzhiyun 	bsg_reply = bsg_job->reply;
2049*4882a593Smuzhiyun 	bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
2050*4882a593Smuzhiyun 	bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
2051*4882a593Smuzhiyun 
2052*4882a593Smuzhiyun 	if (comp_status != CS_COMPLETE) {
2053*4882a593Smuzhiyun 		if (comp_status == CS_DATA_UNDERRUN) {
2054*4882a593Smuzhiyun 			res = DID_OK << 16;
2055*4882a593Smuzhiyun 			bsg_reply->reply_payload_rcv_len =
2056*4882a593Smuzhiyun 				le32_to_cpu(ese->total_byte_count);
2057*4882a593Smuzhiyun 
2058*4882a593Smuzhiyun 			ql_dbg(ql_dbg_user, vha, 0x503f,
2059*4882a593Smuzhiyun 			    "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
2060*4882a593Smuzhiyun 			    "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
2061*4882a593Smuzhiyun 			    type, sp->handle, comp_status, fw_status[1], fw_status[2],
2062*4882a593Smuzhiyun 			    le32_to_cpu(ese->total_byte_count));
2063*4882a593Smuzhiyun 		} else {
2064*4882a593Smuzhiyun 			ql_dbg(ql_dbg_user, vha, 0x5040,
2065*4882a593Smuzhiyun 			    "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
2066*4882a593Smuzhiyun 			    "error subcode 1=0x%x error subcode 2=0x%x.\n",
2067*4882a593Smuzhiyun 			    type, sp->handle, comp_status,
2068*4882a593Smuzhiyun 			    le32_to_cpu(ese->error_subcode_1),
2069*4882a593Smuzhiyun 			    le32_to_cpu(ese->error_subcode_2));
2070*4882a593Smuzhiyun 			res = DID_ERROR << 16;
2071*4882a593Smuzhiyun 			bsg_reply->reply_payload_rcv_len = 0;
2072*4882a593Smuzhiyun 		}
2073*4882a593Smuzhiyun 		memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
2074*4882a593Smuzhiyun 		       fw_status, sizeof(fw_status));
2075*4882a593Smuzhiyun 		ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
2076*4882a593Smuzhiyun 		    pkt, sizeof(*pkt));
2077*4882a593Smuzhiyun 	}
2078*4882a593Smuzhiyun 	else {
2079*4882a593Smuzhiyun 		res =  DID_OK << 16;
2080*4882a593Smuzhiyun 		bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
2081*4882a593Smuzhiyun 		bsg_job->reply_len = 0;
2082*4882a593Smuzhiyun 	}
2083*4882a593Smuzhiyun els_ct_done:
2084*4882a593Smuzhiyun 
2085*4882a593Smuzhiyun 	sp->done(sp, res);
2086*4882a593Smuzhiyun }
2087*4882a593Smuzhiyun 
2088*4882a593Smuzhiyun static void
qla24xx_logio_entry(scsi_qla_host_t * vha,struct req_que * req,struct logio_entry_24xx * logio)2089*4882a593Smuzhiyun qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
2090*4882a593Smuzhiyun     struct logio_entry_24xx *logio)
2091*4882a593Smuzhiyun {
2092*4882a593Smuzhiyun 	const char func[] = "LOGIO-IOCB";
2093*4882a593Smuzhiyun 	const char *type;
2094*4882a593Smuzhiyun 	fc_port_t *fcport;
2095*4882a593Smuzhiyun 	srb_t *sp;
2096*4882a593Smuzhiyun 	struct srb_iocb *lio;
2097*4882a593Smuzhiyun 	uint16_t *data;
2098*4882a593Smuzhiyun 	uint32_t iop[2];
2099*4882a593Smuzhiyun 
2100*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
2101*4882a593Smuzhiyun 	if (!sp)
2102*4882a593Smuzhiyun 		return;
2103*4882a593Smuzhiyun 
2104*4882a593Smuzhiyun 	lio = &sp->u.iocb_cmd;
2105*4882a593Smuzhiyun 	type = sp->name;
2106*4882a593Smuzhiyun 	fcport = sp->fcport;
2107*4882a593Smuzhiyun 	data = lio->u.logio.data;
2108*4882a593Smuzhiyun 
2109*4882a593Smuzhiyun 	data[0] = MBS_COMMAND_ERROR;
2110*4882a593Smuzhiyun 	data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
2111*4882a593Smuzhiyun 		QLA_LOGIO_LOGIN_RETRIED : 0;
2112*4882a593Smuzhiyun 	if (logio->entry_status) {
2113*4882a593Smuzhiyun 		ql_log(ql_log_warn, fcport->vha, 0x5034,
2114*4882a593Smuzhiyun 		    "Async-%s error entry - %8phC hdl=%x"
2115*4882a593Smuzhiyun 		    "portid=%02x%02x%02x entry-status=%x.\n",
2116*4882a593Smuzhiyun 		    type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
2117*4882a593Smuzhiyun 		    fcport->d_id.b.area, fcport->d_id.b.al_pa,
2118*4882a593Smuzhiyun 		    logio->entry_status);
2119*4882a593Smuzhiyun 		ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
2120*4882a593Smuzhiyun 		    logio, sizeof(*logio));
2121*4882a593Smuzhiyun 
2122*4882a593Smuzhiyun 		goto logio_done;
2123*4882a593Smuzhiyun 	}
2124*4882a593Smuzhiyun 
2125*4882a593Smuzhiyun 	if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
2126*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, sp->vha, 0x5036,
2127*4882a593Smuzhiyun 		    "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n",
2128*4882a593Smuzhiyun 		    type, sp->handle, fcport->d_id.b24, fcport->port_name,
2129*4882a593Smuzhiyun 		    le32_to_cpu(logio->io_parameter[0]));
2130*4882a593Smuzhiyun 
2131*4882a593Smuzhiyun 		vha->hw->exch_starvation = 0;
2132*4882a593Smuzhiyun 		data[0] = MBS_COMMAND_COMPLETE;
2133*4882a593Smuzhiyun 
2134*4882a593Smuzhiyun 		if (sp->type == SRB_PRLI_CMD) {
2135*4882a593Smuzhiyun 			lio->u.logio.iop[0] =
2136*4882a593Smuzhiyun 			    le32_to_cpu(logio->io_parameter[0]);
2137*4882a593Smuzhiyun 			lio->u.logio.iop[1] =
2138*4882a593Smuzhiyun 			    le32_to_cpu(logio->io_parameter[1]);
2139*4882a593Smuzhiyun 			goto logio_done;
2140*4882a593Smuzhiyun 		}
2141*4882a593Smuzhiyun 
2142*4882a593Smuzhiyun 		if (sp->type != SRB_LOGIN_CMD)
2143*4882a593Smuzhiyun 			goto logio_done;
2144*4882a593Smuzhiyun 
2145*4882a593Smuzhiyun 		iop[0] = le32_to_cpu(logio->io_parameter[0]);
2146*4882a593Smuzhiyun 		if (iop[0] & BIT_4) {
2147*4882a593Smuzhiyun 			fcport->port_type = FCT_TARGET;
2148*4882a593Smuzhiyun 			if (iop[0] & BIT_8)
2149*4882a593Smuzhiyun 				fcport->flags |= FCF_FCP2_DEVICE;
2150*4882a593Smuzhiyun 		} else if (iop[0] & BIT_5)
2151*4882a593Smuzhiyun 			fcport->port_type = FCT_INITIATOR;
2152*4882a593Smuzhiyun 
2153*4882a593Smuzhiyun 		if (iop[0] & BIT_7)
2154*4882a593Smuzhiyun 			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2155*4882a593Smuzhiyun 
2156*4882a593Smuzhiyun 		if (logio->io_parameter[7] || logio->io_parameter[8])
2157*4882a593Smuzhiyun 			fcport->supported_classes |= FC_COS_CLASS2;
2158*4882a593Smuzhiyun 		if (logio->io_parameter[9] || logio->io_parameter[10])
2159*4882a593Smuzhiyun 			fcport->supported_classes |= FC_COS_CLASS3;
2160*4882a593Smuzhiyun 
2161*4882a593Smuzhiyun 		goto logio_done;
2162*4882a593Smuzhiyun 	}
2163*4882a593Smuzhiyun 
2164*4882a593Smuzhiyun 	iop[0] = le32_to_cpu(logio->io_parameter[0]);
2165*4882a593Smuzhiyun 	iop[1] = le32_to_cpu(logio->io_parameter[1]);
2166*4882a593Smuzhiyun 	lio->u.logio.iop[0] = iop[0];
2167*4882a593Smuzhiyun 	lio->u.logio.iop[1] = iop[1];
2168*4882a593Smuzhiyun 	switch (iop[0]) {
2169*4882a593Smuzhiyun 	case LSC_SCODE_PORTID_USED:
2170*4882a593Smuzhiyun 		data[0] = MBS_PORT_ID_USED;
2171*4882a593Smuzhiyun 		data[1] = LSW(iop[1]);
2172*4882a593Smuzhiyun 		break;
2173*4882a593Smuzhiyun 	case LSC_SCODE_NPORT_USED:
2174*4882a593Smuzhiyun 		data[0] = MBS_LOOP_ID_USED;
2175*4882a593Smuzhiyun 		break;
2176*4882a593Smuzhiyun 	case LSC_SCODE_CMD_FAILED:
2177*4882a593Smuzhiyun 		if (iop[1] == 0x0606) {
2178*4882a593Smuzhiyun 			/*
2179*4882a593Smuzhiyun 			 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
2180*4882a593Smuzhiyun 			 * Target side acked.
2181*4882a593Smuzhiyun 			 */
2182*4882a593Smuzhiyun 			data[0] = MBS_COMMAND_COMPLETE;
2183*4882a593Smuzhiyun 			goto logio_done;
2184*4882a593Smuzhiyun 		}
2185*4882a593Smuzhiyun 		data[0] = MBS_COMMAND_ERROR;
2186*4882a593Smuzhiyun 		break;
2187*4882a593Smuzhiyun 	case LSC_SCODE_NOXCB:
2188*4882a593Smuzhiyun 		vha->hw->exch_starvation++;
2189*4882a593Smuzhiyun 		if (vha->hw->exch_starvation > 5) {
2190*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0xd046,
2191*4882a593Smuzhiyun 			    "Exchange starvation. Resetting RISC\n");
2192*4882a593Smuzhiyun 
2193*4882a593Smuzhiyun 			vha->hw->exch_starvation = 0;
2194*4882a593Smuzhiyun 
2195*4882a593Smuzhiyun 			if (IS_P3P_TYPE(vha->hw))
2196*4882a593Smuzhiyun 				set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2197*4882a593Smuzhiyun 			else
2198*4882a593Smuzhiyun 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2199*4882a593Smuzhiyun 			qla2xxx_wake_dpc(vha);
2200*4882a593Smuzhiyun 		}
2201*4882a593Smuzhiyun 		fallthrough;
2202*4882a593Smuzhiyun 	default:
2203*4882a593Smuzhiyun 		data[0] = MBS_COMMAND_ERROR;
2204*4882a593Smuzhiyun 		break;
2205*4882a593Smuzhiyun 	}
2206*4882a593Smuzhiyun 
2207*4882a593Smuzhiyun 	ql_dbg(ql_dbg_async, sp->vha, 0x5037,
2208*4882a593Smuzhiyun 	    "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n",
2209*4882a593Smuzhiyun 	    type, sp->handle, fcport->d_id.b24, fcport->port_name,
2210*4882a593Smuzhiyun 	    le16_to_cpu(logio->comp_status),
2211*4882a593Smuzhiyun 	    le32_to_cpu(logio->io_parameter[0]),
2212*4882a593Smuzhiyun 	    le32_to_cpu(logio->io_parameter[1]));
2213*4882a593Smuzhiyun 
2214*4882a593Smuzhiyun logio_done:
2215*4882a593Smuzhiyun 	sp->done(sp, 0);
2216*4882a593Smuzhiyun }
2217*4882a593Smuzhiyun 
2218*4882a593Smuzhiyun static void
qla24xx_tm_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,void * tsk)2219*4882a593Smuzhiyun qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
2220*4882a593Smuzhiyun {
2221*4882a593Smuzhiyun 	const char func[] = "TMF-IOCB";
2222*4882a593Smuzhiyun 	const char *type;
2223*4882a593Smuzhiyun 	fc_port_t *fcport;
2224*4882a593Smuzhiyun 	srb_t *sp;
2225*4882a593Smuzhiyun 	struct srb_iocb *iocb;
2226*4882a593Smuzhiyun 	struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2227*4882a593Smuzhiyun 
2228*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
2229*4882a593Smuzhiyun 	if (!sp)
2230*4882a593Smuzhiyun 		return;
2231*4882a593Smuzhiyun 
2232*4882a593Smuzhiyun 	iocb = &sp->u.iocb_cmd;
2233*4882a593Smuzhiyun 	type = sp->name;
2234*4882a593Smuzhiyun 	fcport = sp->fcport;
2235*4882a593Smuzhiyun 	iocb->u.tmf.data = QLA_SUCCESS;
2236*4882a593Smuzhiyun 
2237*4882a593Smuzhiyun 	if (sts->entry_status) {
2238*4882a593Smuzhiyun 		ql_log(ql_log_warn, fcport->vha, 0x5038,
2239*4882a593Smuzhiyun 		    "Async-%s error - hdl=%x entry-status(%x).\n",
2240*4882a593Smuzhiyun 		    type, sp->handle, sts->entry_status);
2241*4882a593Smuzhiyun 		iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2242*4882a593Smuzhiyun 	} else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
2243*4882a593Smuzhiyun 		ql_log(ql_log_warn, fcport->vha, 0x5039,
2244*4882a593Smuzhiyun 		    "Async-%s error - hdl=%x completion status(%x).\n",
2245*4882a593Smuzhiyun 		    type, sp->handle, sts->comp_status);
2246*4882a593Smuzhiyun 		iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2247*4882a593Smuzhiyun 	} else if ((le16_to_cpu(sts->scsi_status) &
2248*4882a593Smuzhiyun 	    SS_RESPONSE_INFO_LEN_VALID)) {
2249*4882a593Smuzhiyun 		host_to_fcp_swap(sts->data, sizeof(sts->data));
2250*4882a593Smuzhiyun 		if (le32_to_cpu(sts->rsp_data_len) < 4) {
2251*4882a593Smuzhiyun 			ql_log(ql_log_warn, fcport->vha, 0x503b,
2252*4882a593Smuzhiyun 			    "Async-%s error - hdl=%x not enough response(%d).\n",
2253*4882a593Smuzhiyun 			    type, sp->handle, sts->rsp_data_len);
2254*4882a593Smuzhiyun 		} else if (sts->data[3]) {
2255*4882a593Smuzhiyun 			ql_log(ql_log_warn, fcport->vha, 0x503c,
2256*4882a593Smuzhiyun 			    "Async-%s error - hdl=%x response(%x).\n",
2257*4882a593Smuzhiyun 			    type, sp->handle, sts->data[3]);
2258*4882a593Smuzhiyun 			iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2259*4882a593Smuzhiyun 		}
2260*4882a593Smuzhiyun 	}
2261*4882a593Smuzhiyun 
2262*4882a593Smuzhiyun 	if (iocb->u.tmf.data != QLA_SUCCESS)
2263*4882a593Smuzhiyun 		ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
2264*4882a593Smuzhiyun 		    sts, sizeof(*sts));
2265*4882a593Smuzhiyun 
2266*4882a593Smuzhiyun 	sp->done(sp, 0);
2267*4882a593Smuzhiyun }
2268*4882a593Smuzhiyun 
qla24xx_nvme_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,void * tsk,srb_t * sp)2269*4882a593Smuzhiyun static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2270*4882a593Smuzhiyun     void *tsk, srb_t *sp)
2271*4882a593Smuzhiyun {
2272*4882a593Smuzhiyun 	fc_port_t *fcport;
2273*4882a593Smuzhiyun 	struct srb_iocb *iocb;
2274*4882a593Smuzhiyun 	struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2275*4882a593Smuzhiyun 	uint16_t        state_flags;
2276*4882a593Smuzhiyun 	struct nvmefc_fcp_req *fd;
2277*4882a593Smuzhiyun 	uint16_t        ret = QLA_SUCCESS;
2278*4882a593Smuzhiyun 	__le16		comp_status = sts->comp_status;
2279*4882a593Smuzhiyun 	int		logit = 0;
2280*4882a593Smuzhiyun 
2281*4882a593Smuzhiyun 	iocb = &sp->u.iocb_cmd;
2282*4882a593Smuzhiyun 	fcport = sp->fcport;
2283*4882a593Smuzhiyun 	iocb->u.nvme.comp_status = comp_status;
2284*4882a593Smuzhiyun 	state_flags  = le16_to_cpu(sts->state_flags);
2285*4882a593Smuzhiyun 	fd = iocb->u.nvme.desc;
2286*4882a593Smuzhiyun 
2287*4882a593Smuzhiyun 	if (unlikely(iocb->u.nvme.aen_op))
2288*4882a593Smuzhiyun 		atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
2289*4882a593Smuzhiyun 
2290*4882a593Smuzhiyun 	if (unlikely(comp_status != CS_COMPLETE))
2291*4882a593Smuzhiyun 		logit = 1;
2292*4882a593Smuzhiyun 
2293*4882a593Smuzhiyun 	fd->transferred_length = fd->payload_length -
2294*4882a593Smuzhiyun 	    le32_to_cpu(sts->residual_len);
2295*4882a593Smuzhiyun 
2296*4882a593Smuzhiyun 	/*
2297*4882a593Smuzhiyun 	 * State flags: Bit 6 and 0.
2298*4882a593Smuzhiyun 	 * If 0 is set, we don't care about 6.
2299*4882a593Smuzhiyun 	 * both cases resp was dma'd to host buffer
2300*4882a593Smuzhiyun 	 * if both are 0, that is good path case.
2301*4882a593Smuzhiyun 	 * if six is set and 0 is clear, we need to
2302*4882a593Smuzhiyun 	 * copy resp data from status iocb to resp buffer.
2303*4882a593Smuzhiyun 	 */
2304*4882a593Smuzhiyun 	if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
2305*4882a593Smuzhiyun 		iocb->u.nvme.rsp_pyld_len = 0;
2306*4882a593Smuzhiyun 	} else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) ==
2307*4882a593Smuzhiyun 			(SF_FCP_RSP_DMA | SF_NVME_ERSP)) {
2308*4882a593Smuzhiyun 		/* Response already DMA'd to fd->rspaddr. */
2309*4882a593Smuzhiyun 		iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2310*4882a593Smuzhiyun 	} else if ((state_flags & SF_FCP_RSP_DMA)) {
2311*4882a593Smuzhiyun 		/*
2312*4882a593Smuzhiyun 		 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this
2313*4882a593Smuzhiyun 		 * as an error.
2314*4882a593Smuzhiyun 		 */
2315*4882a593Smuzhiyun 		iocb->u.nvme.rsp_pyld_len = 0;
2316*4882a593Smuzhiyun 		fd->transferred_length = 0;
2317*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io, fcport->vha, 0x307a,
2318*4882a593Smuzhiyun 			"Unexpected values in NVMe_RSP IU.\n");
2319*4882a593Smuzhiyun 		logit = 1;
2320*4882a593Smuzhiyun 	} else if (state_flags & SF_NVME_ERSP) {
2321*4882a593Smuzhiyun 		uint32_t *inbuf, *outbuf;
2322*4882a593Smuzhiyun 		uint16_t iter;
2323*4882a593Smuzhiyun 
2324*4882a593Smuzhiyun 		inbuf = (uint32_t *)&sts->nvme_ersp_data;
2325*4882a593Smuzhiyun 		outbuf = (uint32_t *)fd->rspaddr;
2326*4882a593Smuzhiyun 		iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2327*4882a593Smuzhiyun 		if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >
2328*4882a593Smuzhiyun 		    sizeof(struct nvme_fc_ersp_iu))) {
2329*4882a593Smuzhiyun 			if (ql_mask_match(ql_dbg_io)) {
2330*4882a593Smuzhiyun 				WARN_ONCE(1, "Unexpected response payload length %u.\n",
2331*4882a593Smuzhiyun 				    iocb->u.nvme.rsp_pyld_len);
2332*4882a593Smuzhiyun 				ql_log(ql_log_warn, fcport->vha, 0x5100,
2333*4882a593Smuzhiyun 				    "Unexpected response payload length %u.\n",
2334*4882a593Smuzhiyun 				    iocb->u.nvme.rsp_pyld_len);
2335*4882a593Smuzhiyun 			}
2336*4882a593Smuzhiyun 			iocb->u.nvme.rsp_pyld_len =
2337*4882a593Smuzhiyun 				cpu_to_le16(sizeof(struct nvme_fc_ersp_iu));
2338*4882a593Smuzhiyun 		}
2339*4882a593Smuzhiyun 		iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2;
2340*4882a593Smuzhiyun 		for (; iter; iter--)
2341*4882a593Smuzhiyun 			*outbuf++ = swab32(*inbuf++);
2342*4882a593Smuzhiyun 	}
2343*4882a593Smuzhiyun 
2344*4882a593Smuzhiyun 	if (state_flags & SF_NVME_ERSP) {
2345*4882a593Smuzhiyun 		struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr;
2346*4882a593Smuzhiyun 		u32 tgt_xfer_len;
2347*4882a593Smuzhiyun 
2348*4882a593Smuzhiyun 		tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len);
2349*4882a593Smuzhiyun 		if (fd->transferred_length != tgt_xfer_len) {
2350*4882a593Smuzhiyun 			ql_dbg(ql_dbg_io, fcport->vha, 0x3079,
2351*4882a593Smuzhiyun 				"Dropped frame(s) detected (sent/rcvd=%u/%u).\n",
2352*4882a593Smuzhiyun 				tgt_xfer_len, fd->transferred_length);
2353*4882a593Smuzhiyun 			logit = 1;
2354*4882a593Smuzhiyun 		} else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) {
2355*4882a593Smuzhiyun 			/*
2356*4882a593Smuzhiyun 			 * Do not log if this is just an underflow and there
2357*4882a593Smuzhiyun 			 * is no data loss.
2358*4882a593Smuzhiyun 			 */
2359*4882a593Smuzhiyun 			logit = 0;
2360*4882a593Smuzhiyun 		}
2361*4882a593Smuzhiyun 	}
2362*4882a593Smuzhiyun 
2363*4882a593Smuzhiyun 	if (unlikely(logit))
2364*4882a593Smuzhiyun 		ql_log(ql_log_warn, fcport->vha, 0x5060,
2365*4882a593Smuzhiyun 		   "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x  ox_id=%x\n",
2366*4882a593Smuzhiyun 		   sp->name, sp->handle, comp_status,
2367*4882a593Smuzhiyun 		   fd->transferred_length, le32_to_cpu(sts->residual_len),
2368*4882a593Smuzhiyun 		   sts->ox_id);
2369*4882a593Smuzhiyun 
2370*4882a593Smuzhiyun 	/*
2371*4882a593Smuzhiyun 	 * If transport error then Failure (HBA rejects request)
2372*4882a593Smuzhiyun 	 * otherwise transport will handle.
2373*4882a593Smuzhiyun 	 */
2374*4882a593Smuzhiyun 	switch (le16_to_cpu(comp_status)) {
2375*4882a593Smuzhiyun 	case CS_COMPLETE:
2376*4882a593Smuzhiyun 		break;
2377*4882a593Smuzhiyun 
2378*4882a593Smuzhiyun 	case CS_RESET:
2379*4882a593Smuzhiyun 	case CS_PORT_UNAVAILABLE:
2380*4882a593Smuzhiyun 	case CS_PORT_LOGGED_OUT:
2381*4882a593Smuzhiyun 		fcport->nvme_flag |= NVME_FLAG_RESETTING;
2382*4882a593Smuzhiyun 		fallthrough;
2383*4882a593Smuzhiyun 	case CS_ABORTED:
2384*4882a593Smuzhiyun 	case CS_PORT_BUSY:
2385*4882a593Smuzhiyun 		fd->transferred_length = 0;
2386*4882a593Smuzhiyun 		iocb->u.nvme.rsp_pyld_len = 0;
2387*4882a593Smuzhiyun 		ret = QLA_ABORTED;
2388*4882a593Smuzhiyun 		break;
2389*4882a593Smuzhiyun 	case CS_DATA_UNDERRUN:
2390*4882a593Smuzhiyun 		break;
2391*4882a593Smuzhiyun 	default:
2392*4882a593Smuzhiyun 		ret = QLA_FUNCTION_FAILED;
2393*4882a593Smuzhiyun 		break;
2394*4882a593Smuzhiyun 	}
2395*4882a593Smuzhiyun 	sp->done(sp, ret);
2396*4882a593Smuzhiyun }
2397*4882a593Smuzhiyun 
qla_ctrlvp_completed(scsi_qla_host_t * vha,struct req_que * req,struct vp_ctrl_entry_24xx * vce)2398*4882a593Smuzhiyun static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
2399*4882a593Smuzhiyun     struct vp_ctrl_entry_24xx *vce)
2400*4882a593Smuzhiyun {
2401*4882a593Smuzhiyun 	const char func[] = "CTRLVP-IOCB";
2402*4882a593Smuzhiyun 	srb_t *sp;
2403*4882a593Smuzhiyun 	int rval = QLA_SUCCESS;
2404*4882a593Smuzhiyun 
2405*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
2406*4882a593Smuzhiyun 	if (!sp)
2407*4882a593Smuzhiyun 		return;
2408*4882a593Smuzhiyun 
2409*4882a593Smuzhiyun 	if (vce->entry_status != 0) {
2410*4882a593Smuzhiyun 		ql_dbg(ql_dbg_vport, vha, 0x10c4,
2411*4882a593Smuzhiyun 		    "%s: Failed to complete IOCB -- error status (%x)\n",
2412*4882a593Smuzhiyun 		    sp->name, vce->entry_status);
2413*4882a593Smuzhiyun 		rval = QLA_FUNCTION_FAILED;
2414*4882a593Smuzhiyun 	} else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
2415*4882a593Smuzhiyun 		ql_dbg(ql_dbg_vport, vha, 0x10c5,
2416*4882a593Smuzhiyun 		    "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
2417*4882a593Smuzhiyun 		    sp->name, le16_to_cpu(vce->comp_status),
2418*4882a593Smuzhiyun 		    le16_to_cpu(vce->vp_idx_failed));
2419*4882a593Smuzhiyun 		rval = QLA_FUNCTION_FAILED;
2420*4882a593Smuzhiyun 	} else {
2421*4882a593Smuzhiyun 		ql_dbg(ql_dbg_vport, vha, 0x10c6,
2422*4882a593Smuzhiyun 		    "Done %s.\n", __func__);
2423*4882a593Smuzhiyun 	}
2424*4882a593Smuzhiyun 
2425*4882a593Smuzhiyun 	sp->rc = rval;
2426*4882a593Smuzhiyun 	sp->done(sp, rval);
2427*4882a593Smuzhiyun }
2428*4882a593Smuzhiyun 
2429*4882a593Smuzhiyun /* Process a single response queue entry. */
qla2x00_process_response_entry(struct scsi_qla_host * vha,struct rsp_que * rsp,sts_entry_t * pkt)2430*4882a593Smuzhiyun static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
2431*4882a593Smuzhiyun 					   struct rsp_que *rsp,
2432*4882a593Smuzhiyun 					   sts_entry_t *pkt)
2433*4882a593Smuzhiyun {
2434*4882a593Smuzhiyun 	sts21_entry_t *sts21_entry;
2435*4882a593Smuzhiyun 	sts22_entry_t *sts22_entry;
2436*4882a593Smuzhiyun 	uint16_t handle_cnt;
2437*4882a593Smuzhiyun 	uint16_t cnt;
2438*4882a593Smuzhiyun 
2439*4882a593Smuzhiyun 	switch (pkt->entry_type) {
2440*4882a593Smuzhiyun 	case STATUS_TYPE:
2441*4882a593Smuzhiyun 		qla2x00_status_entry(vha, rsp, pkt);
2442*4882a593Smuzhiyun 		break;
2443*4882a593Smuzhiyun 	case STATUS_TYPE_21:
2444*4882a593Smuzhiyun 		sts21_entry = (sts21_entry_t *)pkt;
2445*4882a593Smuzhiyun 		handle_cnt = sts21_entry->handle_count;
2446*4882a593Smuzhiyun 		for (cnt = 0; cnt < handle_cnt; cnt++)
2447*4882a593Smuzhiyun 			qla2x00_process_completed_request(vha, rsp->req,
2448*4882a593Smuzhiyun 						sts21_entry->handle[cnt]);
2449*4882a593Smuzhiyun 		break;
2450*4882a593Smuzhiyun 	case STATUS_TYPE_22:
2451*4882a593Smuzhiyun 		sts22_entry = (sts22_entry_t *)pkt;
2452*4882a593Smuzhiyun 		handle_cnt = sts22_entry->handle_count;
2453*4882a593Smuzhiyun 		for (cnt = 0; cnt < handle_cnt; cnt++)
2454*4882a593Smuzhiyun 			qla2x00_process_completed_request(vha, rsp->req,
2455*4882a593Smuzhiyun 						sts22_entry->handle[cnt]);
2456*4882a593Smuzhiyun 		break;
2457*4882a593Smuzhiyun 	case STATUS_CONT_TYPE:
2458*4882a593Smuzhiyun 		qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2459*4882a593Smuzhiyun 		break;
2460*4882a593Smuzhiyun 	case MBX_IOCB_TYPE:
2461*4882a593Smuzhiyun 		qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2462*4882a593Smuzhiyun 		break;
2463*4882a593Smuzhiyun 	case CT_IOCB_TYPE:
2464*4882a593Smuzhiyun 		qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2465*4882a593Smuzhiyun 		break;
2466*4882a593Smuzhiyun 	default:
2467*4882a593Smuzhiyun 		/* Type Not Supported. */
2468*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x504a,
2469*4882a593Smuzhiyun 		       "Received unknown response pkt type %x entry status=%x.\n",
2470*4882a593Smuzhiyun 		       pkt->entry_type, pkt->entry_status);
2471*4882a593Smuzhiyun 		break;
2472*4882a593Smuzhiyun 	}
2473*4882a593Smuzhiyun }
2474*4882a593Smuzhiyun 
2475*4882a593Smuzhiyun /**
2476*4882a593Smuzhiyun  * qla2x00_process_response_queue() - Process response queue entries.
2477*4882a593Smuzhiyun  * @rsp: response queue
2478*4882a593Smuzhiyun  */
2479*4882a593Smuzhiyun void
qla2x00_process_response_queue(struct rsp_que * rsp)2480*4882a593Smuzhiyun qla2x00_process_response_queue(struct rsp_que *rsp)
2481*4882a593Smuzhiyun {
2482*4882a593Smuzhiyun 	struct scsi_qla_host *vha;
2483*4882a593Smuzhiyun 	struct qla_hw_data *ha = rsp->hw;
2484*4882a593Smuzhiyun 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2485*4882a593Smuzhiyun 	sts_entry_t	*pkt;
2486*4882a593Smuzhiyun 
2487*4882a593Smuzhiyun 	vha = pci_get_drvdata(ha->pdev);
2488*4882a593Smuzhiyun 
2489*4882a593Smuzhiyun 	if (!vha->flags.online)
2490*4882a593Smuzhiyun 		return;
2491*4882a593Smuzhiyun 
2492*4882a593Smuzhiyun 	while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2493*4882a593Smuzhiyun 		pkt = (sts_entry_t *)rsp->ring_ptr;
2494*4882a593Smuzhiyun 
2495*4882a593Smuzhiyun 		rsp->ring_index++;
2496*4882a593Smuzhiyun 		if (rsp->ring_index == rsp->length) {
2497*4882a593Smuzhiyun 			rsp->ring_index = 0;
2498*4882a593Smuzhiyun 			rsp->ring_ptr = rsp->ring;
2499*4882a593Smuzhiyun 		} else {
2500*4882a593Smuzhiyun 			rsp->ring_ptr++;
2501*4882a593Smuzhiyun 		}
2502*4882a593Smuzhiyun 
2503*4882a593Smuzhiyun 		if (pkt->entry_status != 0) {
2504*4882a593Smuzhiyun 			qla2x00_error_entry(vha, rsp, pkt);
2505*4882a593Smuzhiyun 			((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2506*4882a593Smuzhiyun 			wmb();
2507*4882a593Smuzhiyun 			continue;
2508*4882a593Smuzhiyun 		}
2509*4882a593Smuzhiyun 
2510*4882a593Smuzhiyun 		qla2x00_process_response_entry(vha, rsp, pkt);
2511*4882a593Smuzhiyun 		((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2512*4882a593Smuzhiyun 		wmb();
2513*4882a593Smuzhiyun 	}
2514*4882a593Smuzhiyun 
2515*4882a593Smuzhiyun 	/* Adjust ring index */
2516*4882a593Smuzhiyun 	wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
2517*4882a593Smuzhiyun }
2518*4882a593Smuzhiyun 
2519*4882a593Smuzhiyun static inline void
qla2x00_handle_sense(srb_t * sp,uint8_t * sense_data,uint32_t par_sense_len,uint32_t sense_len,struct rsp_que * rsp,int res)2520*4882a593Smuzhiyun qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2521*4882a593Smuzhiyun 		     uint32_t sense_len, struct rsp_que *rsp, int res)
2522*4882a593Smuzhiyun {
2523*4882a593Smuzhiyun 	struct scsi_qla_host *vha = sp->vha;
2524*4882a593Smuzhiyun 	struct scsi_cmnd *cp = GET_CMD_SP(sp);
2525*4882a593Smuzhiyun 	uint32_t track_sense_len;
2526*4882a593Smuzhiyun 
2527*4882a593Smuzhiyun 	if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2528*4882a593Smuzhiyun 		sense_len = SCSI_SENSE_BUFFERSIZE;
2529*4882a593Smuzhiyun 
2530*4882a593Smuzhiyun 	SET_CMD_SENSE_LEN(sp, sense_len);
2531*4882a593Smuzhiyun 	SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2532*4882a593Smuzhiyun 	track_sense_len = sense_len;
2533*4882a593Smuzhiyun 
2534*4882a593Smuzhiyun 	if (sense_len > par_sense_len)
2535*4882a593Smuzhiyun 		sense_len = par_sense_len;
2536*4882a593Smuzhiyun 
2537*4882a593Smuzhiyun 	memcpy(cp->sense_buffer, sense_data, sense_len);
2538*4882a593Smuzhiyun 
2539*4882a593Smuzhiyun 	SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2540*4882a593Smuzhiyun 	track_sense_len -= sense_len;
2541*4882a593Smuzhiyun 	SET_CMD_SENSE_LEN(sp, track_sense_len);
2542*4882a593Smuzhiyun 
2543*4882a593Smuzhiyun 	if (track_sense_len != 0) {
2544*4882a593Smuzhiyun 		rsp->status_srb = sp;
2545*4882a593Smuzhiyun 		cp->result = res;
2546*4882a593Smuzhiyun 	}
2547*4882a593Smuzhiyun 
2548*4882a593Smuzhiyun 	if (sense_len) {
2549*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
2550*4882a593Smuzhiyun 		    "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2551*4882a593Smuzhiyun 		    sp->vha->host_no, cp->device->id, cp->device->lun,
2552*4882a593Smuzhiyun 		    cp);
2553*4882a593Smuzhiyun 		ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2554*4882a593Smuzhiyun 		    cp->sense_buffer, sense_len);
2555*4882a593Smuzhiyun 	}
2556*4882a593Smuzhiyun }
2557*4882a593Smuzhiyun 
2558*4882a593Smuzhiyun struct scsi_dif_tuple {
2559*4882a593Smuzhiyun 	__be16 guard;       /* Checksum */
2560*4882a593Smuzhiyun 	__be16 app_tag;         /* APPL identifier */
2561*4882a593Smuzhiyun 	__be32 ref_tag;         /* Target LBA or indirect LBA */
2562*4882a593Smuzhiyun };
2563*4882a593Smuzhiyun 
2564*4882a593Smuzhiyun /*
2565*4882a593Smuzhiyun  * Checks the guard or meta-data for the type of error
2566*4882a593Smuzhiyun  * detected by the HBA. In case of errors, we set the
2567*4882a593Smuzhiyun  * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2568*4882a593Smuzhiyun  * to indicate to the kernel that the HBA detected error.
2569*4882a593Smuzhiyun  */
2570*4882a593Smuzhiyun static inline int
qla2x00_handle_dif_error(srb_t * sp,struct sts_entry_24xx * sts24)2571*4882a593Smuzhiyun qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2572*4882a593Smuzhiyun {
2573*4882a593Smuzhiyun 	struct scsi_qla_host *vha = sp->vha;
2574*4882a593Smuzhiyun 	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
2575*4882a593Smuzhiyun 	uint8_t		*ap = &sts24->data[12];
2576*4882a593Smuzhiyun 	uint8_t		*ep = &sts24->data[20];
2577*4882a593Smuzhiyun 	uint32_t	e_ref_tag, a_ref_tag;
2578*4882a593Smuzhiyun 	uint16_t	e_app_tag, a_app_tag;
2579*4882a593Smuzhiyun 	uint16_t	e_guard, a_guard;
2580*4882a593Smuzhiyun 
2581*4882a593Smuzhiyun 	/*
2582*4882a593Smuzhiyun 	 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2583*4882a593Smuzhiyun 	 * would make guard field appear at offset 2
2584*4882a593Smuzhiyun 	 */
2585*4882a593Smuzhiyun 	a_guard   = get_unaligned_le16(ap + 2);
2586*4882a593Smuzhiyun 	a_app_tag = get_unaligned_le16(ap + 0);
2587*4882a593Smuzhiyun 	a_ref_tag = get_unaligned_le32(ap + 4);
2588*4882a593Smuzhiyun 	e_guard   = get_unaligned_le16(ep + 2);
2589*4882a593Smuzhiyun 	e_app_tag = get_unaligned_le16(ep + 0);
2590*4882a593Smuzhiyun 	e_ref_tag = get_unaligned_le32(ep + 4);
2591*4882a593Smuzhiyun 
2592*4882a593Smuzhiyun 	ql_dbg(ql_dbg_io, vha, 0x3023,
2593*4882a593Smuzhiyun 	    "iocb(s) %p Returned STATUS.\n", sts24);
2594*4882a593Smuzhiyun 
2595*4882a593Smuzhiyun 	ql_dbg(ql_dbg_io, vha, 0x3024,
2596*4882a593Smuzhiyun 	    "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
2597*4882a593Smuzhiyun 	    " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
2598*4882a593Smuzhiyun 	    " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
2599*4882a593Smuzhiyun 	    cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
2600*4882a593Smuzhiyun 	    a_app_tag, e_app_tag, a_guard, e_guard);
2601*4882a593Smuzhiyun 
2602*4882a593Smuzhiyun 	/*
2603*4882a593Smuzhiyun 	 * Ignore sector if:
2604*4882a593Smuzhiyun 	 * For type     3: ref & app tag is all 'f's
2605*4882a593Smuzhiyun 	 * For type 0,1,2: app tag is all 'f's
2606*4882a593Smuzhiyun 	 */
2607*4882a593Smuzhiyun 	if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) &&
2608*4882a593Smuzhiyun 	    (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 ||
2609*4882a593Smuzhiyun 	     a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) {
2610*4882a593Smuzhiyun 		uint32_t blocks_done, resid;
2611*4882a593Smuzhiyun 		sector_t lba_s = scsi_get_lba(cmd);
2612*4882a593Smuzhiyun 
2613*4882a593Smuzhiyun 		/* 2TB boundary case covered automatically with this */
2614*4882a593Smuzhiyun 		blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2615*4882a593Smuzhiyun 
2616*4882a593Smuzhiyun 		resid = scsi_bufflen(cmd) - (blocks_done *
2617*4882a593Smuzhiyun 		    cmd->device->sector_size);
2618*4882a593Smuzhiyun 
2619*4882a593Smuzhiyun 		scsi_set_resid(cmd, resid);
2620*4882a593Smuzhiyun 		cmd->result = DID_OK << 16;
2621*4882a593Smuzhiyun 
2622*4882a593Smuzhiyun 		/* Update protection tag */
2623*4882a593Smuzhiyun 		if (scsi_prot_sg_count(cmd)) {
2624*4882a593Smuzhiyun 			uint32_t i, j = 0, k = 0, num_ent;
2625*4882a593Smuzhiyun 			struct scatterlist *sg;
2626*4882a593Smuzhiyun 			struct t10_pi_tuple *spt;
2627*4882a593Smuzhiyun 
2628*4882a593Smuzhiyun 			/* Patch the corresponding protection tags */
2629*4882a593Smuzhiyun 			scsi_for_each_prot_sg(cmd, sg,
2630*4882a593Smuzhiyun 			    scsi_prot_sg_count(cmd), i) {
2631*4882a593Smuzhiyun 				num_ent = sg_dma_len(sg) / 8;
2632*4882a593Smuzhiyun 				if (k + num_ent < blocks_done) {
2633*4882a593Smuzhiyun 					k += num_ent;
2634*4882a593Smuzhiyun 					continue;
2635*4882a593Smuzhiyun 				}
2636*4882a593Smuzhiyun 				j = blocks_done - k - 1;
2637*4882a593Smuzhiyun 				k = blocks_done;
2638*4882a593Smuzhiyun 				break;
2639*4882a593Smuzhiyun 			}
2640*4882a593Smuzhiyun 
2641*4882a593Smuzhiyun 			if (k != blocks_done) {
2642*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x302f,
2643*4882a593Smuzhiyun 				    "unexpected tag values tag:lba=%x:%llx)\n",
2644*4882a593Smuzhiyun 				    e_ref_tag, (unsigned long long)lba_s);
2645*4882a593Smuzhiyun 				return 1;
2646*4882a593Smuzhiyun 			}
2647*4882a593Smuzhiyun 
2648*4882a593Smuzhiyun 			spt = page_address(sg_page(sg)) + sg->offset;
2649*4882a593Smuzhiyun 			spt += j;
2650*4882a593Smuzhiyun 
2651*4882a593Smuzhiyun 			spt->app_tag = T10_PI_APP_ESCAPE;
2652*4882a593Smuzhiyun 			if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
2653*4882a593Smuzhiyun 				spt->ref_tag = T10_PI_REF_ESCAPE;
2654*4882a593Smuzhiyun 		}
2655*4882a593Smuzhiyun 
2656*4882a593Smuzhiyun 		return 0;
2657*4882a593Smuzhiyun 	}
2658*4882a593Smuzhiyun 
2659*4882a593Smuzhiyun 	/* check guard */
2660*4882a593Smuzhiyun 	if (e_guard != a_guard) {
2661*4882a593Smuzhiyun 		scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2662*4882a593Smuzhiyun 		    0x10, 0x1);
2663*4882a593Smuzhiyun 		set_driver_byte(cmd, DRIVER_SENSE);
2664*4882a593Smuzhiyun 		set_host_byte(cmd, DID_ABORT);
2665*4882a593Smuzhiyun 		cmd->result |= SAM_STAT_CHECK_CONDITION;
2666*4882a593Smuzhiyun 		return 1;
2667*4882a593Smuzhiyun 	}
2668*4882a593Smuzhiyun 
2669*4882a593Smuzhiyun 	/* check ref tag */
2670*4882a593Smuzhiyun 	if (e_ref_tag != a_ref_tag) {
2671*4882a593Smuzhiyun 		scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2672*4882a593Smuzhiyun 		    0x10, 0x3);
2673*4882a593Smuzhiyun 		set_driver_byte(cmd, DRIVER_SENSE);
2674*4882a593Smuzhiyun 		set_host_byte(cmd, DID_ABORT);
2675*4882a593Smuzhiyun 		cmd->result |= SAM_STAT_CHECK_CONDITION;
2676*4882a593Smuzhiyun 		return 1;
2677*4882a593Smuzhiyun 	}
2678*4882a593Smuzhiyun 
2679*4882a593Smuzhiyun 	/* check appl tag */
2680*4882a593Smuzhiyun 	if (e_app_tag != a_app_tag) {
2681*4882a593Smuzhiyun 		scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2682*4882a593Smuzhiyun 		    0x10, 0x2);
2683*4882a593Smuzhiyun 		set_driver_byte(cmd, DRIVER_SENSE);
2684*4882a593Smuzhiyun 		set_host_byte(cmd, DID_ABORT);
2685*4882a593Smuzhiyun 		cmd->result |= SAM_STAT_CHECK_CONDITION;
2686*4882a593Smuzhiyun 		return 1;
2687*4882a593Smuzhiyun 	}
2688*4882a593Smuzhiyun 
2689*4882a593Smuzhiyun 	return 1;
2690*4882a593Smuzhiyun }
2691*4882a593Smuzhiyun 
2692*4882a593Smuzhiyun static void
qla25xx_process_bidir_status_iocb(scsi_qla_host_t * vha,void * pkt,struct req_que * req,uint32_t index)2693*4882a593Smuzhiyun qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2694*4882a593Smuzhiyun 				  struct req_que *req, uint32_t index)
2695*4882a593Smuzhiyun {
2696*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
2697*4882a593Smuzhiyun 	srb_t *sp;
2698*4882a593Smuzhiyun 	uint16_t	comp_status;
2699*4882a593Smuzhiyun 	uint16_t	scsi_status;
2700*4882a593Smuzhiyun 	uint16_t thread_id;
2701*4882a593Smuzhiyun 	uint32_t rval = EXT_STATUS_OK;
2702*4882a593Smuzhiyun 	struct bsg_job *bsg_job = NULL;
2703*4882a593Smuzhiyun 	struct fc_bsg_request *bsg_request;
2704*4882a593Smuzhiyun 	struct fc_bsg_reply *bsg_reply;
2705*4882a593Smuzhiyun 	sts_entry_t *sts = pkt;
2706*4882a593Smuzhiyun 	struct sts_entry_24xx *sts24 = pkt;
2707*4882a593Smuzhiyun 
2708*4882a593Smuzhiyun 	/* Validate handle. */
2709*4882a593Smuzhiyun 	if (index >= req->num_outstanding_cmds) {
2710*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x70af,
2711*4882a593Smuzhiyun 		    "Invalid SCSI completion handle 0x%x.\n", index);
2712*4882a593Smuzhiyun 		set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2713*4882a593Smuzhiyun 		return;
2714*4882a593Smuzhiyun 	}
2715*4882a593Smuzhiyun 
2716*4882a593Smuzhiyun 	sp = req->outstanding_cmds[index];
2717*4882a593Smuzhiyun 	if (!sp) {
2718*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x70b0,
2719*4882a593Smuzhiyun 		    "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2720*4882a593Smuzhiyun 		    req->id, index);
2721*4882a593Smuzhiyun 
2722*4882a593Smuzhiyun 		set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2723*4882a593Smuzhiyun 		return;
2724*4882a593Smuzhiyun 	}
2725*4882a593Smuzhiyun 
2726*4882a593Smuzhiyun 	/* Free outstanding command slot. */
2727*4882a593Smuzhiyun 	req->outstanding_cmds[index] = NULL;
2728*4882a593Smuzhiyun 	bsg_job = sp->u.bsg_job;
2729*4882a593Smuzhiyun 	bsg_request = bsg_job->request;
2730*4882a593Smuzhiyun 	bsg_reply = bsg_job->reply;
2731*4882a593Smuzhiyun 
2732*4882a593Smuzhiyun 	if (IS_FWI2_CAPABLE(ha)) {
2733*4882a593Smuzhiyun 		comp_status = le16_to_cpu(sts24->comp_status);
2734*4882a593Smuzhiyun 		scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2735*4882a593Smuzhiyun 	} else {
2736*4882a593Smuzhiyun 		comp_status = le16_to_cpu(sts->comp_status);
2737*4882a593Smuzhiyun 		scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2738*4882a593Smuzhiyun 	}
2739*4882a593Smuzhiyun 
2740*4882a593Smuzhiyun 	thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
2741*4882a593Smuzhiyun 	switch (comp_status) {
2742*4882a593Smuzhiyun 	case CS_COMPLETE:
2743*4882a593Smuzhiyun 		if (scsi_status == 0) {
2744*4882a593Smuzhiyun 			bsg_reply->reply_payload_rcv_len =
2745*4882a593Smuzhiyun 					bsg_job->reply_payload.payload_len;
2746*4882a593Smuzhiyun 			vha->qla_stats.input_bytes +=
2747*4882a593Smuzhiyun 				bsg_reply->reply_payload_rcv_len;
2748*4882a593Smuzhiyun 			vha->qla_stats.input_requests++;
2749*4882a593Smuzhiyun 			rval = EXT_STATUS_OK;
2750*4882a593Smuzhiyun 		}
2751*4882a593Smuzhiyun 		goto done;
2752*4882a593Smuzhiyun 
2753*4882a593Smuzhiyun 	case CS_DATA_OVERRUN:
2754*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b1,
2755*4882a593Smuzhiyun 		    "Command completed with data overrun thread_id=%d\n",
2756*4882a593Smuzhiyun 		    thread_id);
2757*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_OVERRUN;
2758*4882a593Smuzhiyun 		break;
2759*4882a593Smuzhiyun 
2760*4882a593Smuzhiyun 	case CS_DATA_UNDERRUN:
2761*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b2,
2762*4882a593Smuzhiyun 		    "Command completed with data underrun thread_id=%d\n",
2763*4882a593Smuzhiyun 		    thread_id);
2764*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_UNDERRUN;
2765*4882a593Smuzhiyun 		break;
2766*4882a593Smuzhiyun 	case CS_BIDIR_RD_OVERRUN:
2767*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b3,
2768*4882a593Smuzhiyun 		    "Command completed with read data overrun thread_id=%d\n",
2769*4882a593Smuzhiyun 		    thread_id);
2770*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_OVERRUN;
2771*4882a593Smuzhiyun 		break;
2772*4882a593Smuzhiyun 
2773*4882a593Smuzhiyun 	case CS_BIDIR_RD_WR_OVERRUN:
2774*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b4,
2775*4882a593Smuzhiyun 		    "Command completed with read and write data overrun "
2776*4882a593Smuzhiyun 		    "thread_id=%d\n", thread_id);
2777*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_OVERRUN;
2778*4882a593Smuzhiyun 		break;
2779*4882a593Smuzhiyun 
2780*4882a593Smuzhiyun 	case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2781*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b5,
2782*4882a593Smuzhiyun 		    "Command completed with read data over and write data "
2783*4882a593Smuzhiyun 		    "underrun thread_id=%d\n", thread_id);
2784*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_OVERRUN;
2785*4882a593Smuzhiyun 		break;
2786*4882a593Smuzhiyun 
2787*4882a593Smuzhiyun 	case CS_BIDIR_RD_UNDERRUN:
2788*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b6,
2789*4882a593Smuzhiyun 		    "Command completed with read data underrun "
2790*4882a593Smuzhiyun 		    "thread_id=%d\n", thread_id);
2791*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_UNDERRUN;
2792*4882a593Smuzhiyun 		break;
2793*4882a593Smuzhiyun 
2794*4882a593Smuzhiyun 	case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2795*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b7,
2796*4882a593Smuzhiyun 		    "Command completed with read data under and write data "
2797*4882a593Smuzhiyun 		    "overrun thread_id=%d\n", thread_id);
2798*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_UNDERRUN;
2799*4882a593Smuzhiyun 		break;
2800*4882a593Smuzhiyun 
2801*4882a593Smuzhiyun 	case CS_BIDIR_RD_WR_UNDERRUN:
2802*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b8,
2803*4882a593Smuzhiyun 		    "Command completed with read and write data underrun "
2804*4882a593Smuzhiyun 		    "thread_id=%d\n", thread_id);
2805*4882a593Smuzhiyun 		rval = EXT_STATUS_DATA_UNDERRUN;
2806*4882a593Smuzhiyun 		break;
2807*4882a593Smuzhiyun 
2808*4882a593Smuzhiyun 	case CS_BIDIR_DMA:
2809*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70b9,
2810*4882a593Smuzhiyun 		    "Command completed with data DMA error thread_id=%d\n",
2811*4882a593Smuzhiyun 		    thread_id);
2812*4882a593Smuzhiyun 		rval = EXT_STATUS_DMA_ERR;
2813*4882a593Smuzhiyun 		break;
2814*4882a593Smuzhiyun 
2815*4882a593Smuzhiyun 	case CS_TIMEOUT:
2816*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70ba,
2817*4882a593Smuzhiyun 		    "Command completed with timeout thread_id=%d\n",
2818*4882a593Smuzhiyun 		    thread_id);
2819*4882a593Smuzhiyun 		rval = EXT_STATUS_TIMEOUT;
2820*4882a593Smuzhiyun 		break;
2821*4882a593Smuzhiyun 	default:
2822*4882a593Smuzhiyun 		ql_dbg(ql_dbg_user, vha, 0x70bb,
2823*4882a593Smuzhiyun 		    "Command completed with completion status=0x%x "
2824*4882a593Smuzhiyun 		    "thread_id=%d\n", comp_status, thread_id);
2825*4882a593Smuzhiyun 		rval = EXT_STATUS_ERR;
2826*4882a593Smuzhiyun 		break;
2827*4882a593Smuzhiyun 	}
2828*4882a593Smuzhiyun 	bsg_reply->reply_payload_rcv_len = 0;
2829*4882a593Smuzhiyun 
2830*4882a593Smuzhiyun done:
2831*4882a593Smuzhiyun 	/* Return the vendor specific reply to API */
2832*4882a593Smuzhiyun 	bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
2833*4882a593Smuzhiyun 	bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2834*4882a593Smuzhiyun 	/* Always return DID_OK, bsg will send the vendor specific response
2835*4882a593Smuzhiyun 	 * in this case only */
2836*4882a593Smuzhiyun 	sp->done(sp, DID_OK << 16);
2837*4882a593Smuzhiyun 
2838*4882a593Smuzhiyun }
2839*4882a593Smuzhiyun 
2840*4882a593Smuzhiyun /**
2841*4882a593Smuzhiyun  * qla2x00_status_entry() - Process a Status IOCB entry.
2842*4882a593Smuzhiyun  * @vha: SCSI driver HA context
2843*4882a593Smuzhiyun  * @rsp: response queue
2844*4882a593Smuzhiyun  * @pkt: Entry pointer
2845*4882a593Smuzhiyun  */
2846*4882a593Smuzhiyun static void
qla2x00_status_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,void * pkt)2847*4882a593Smuzhiyun qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2848*4882a593Smuzhiyun {
2849*4882a593Smuzhiyun 	srb_t		*sp;
2850*4882a593Smuzhiyun 	fc_port_t	*fcport;
2851*4882a593Smuzhiyun 	struct scsi_cmnd *cp;
2852*4882a593Smuzhiyun 	sts_entry_t *sts = pkt;
2853*4882a593Smuzhiyun 	struct sts_entry_24xx *sts24 = pkt;
2854*4882a593Smuzhiyun 	uint16_t	comp_status;
2855*4882a593Smuzhiyun 	uint16_t	scsi_status;
2856*4882a593Smuzhiyun 	uint16_t	ox_id;
2857*4882a593Smuzhiyun 	uint8_t		lscsi_status;
2858*4882a593Smuzhiyun 	int32_t		resid;
2859*4882a593Smuzhiyun 	uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2860*4882a593Smuzhiyun 	    fw_resid_len;
2861*4882a593Smuzhiyun 	uint8_t		*rsp_info, *sense_data;
2862*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
2863*4882a593Smuzhiyun 	uint32_t handle;
2864*4882a593Smuzhiyun 	uint16_t que;
2865*4882a593Smuzhiyun 	struct req_que *req;
2866*4882a593Smuzhiyun 	int logit = 1;
2867*4882a593Smuzhiyun 	int res = 0;
2868*4882a593Smuzhiyun 	uint16_t state_flags = 0;
2869*4882a593Smuzhiyun 	uint16_t sts_qual = 0;
2870*4882a593Smuzhiyun 
2871*4882a593Smuzhiyun 	if (IS_FWI2_CAPABLE(ha)) {
2872*4882a593Smuzhiyun 		comp_status = le16_to_cpu(sts24->comp_status);
2873*4882a593Smuzhiyun 		scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2874*4882a593Smuzhiyun 		state_flags = le16_to_cpu(sts24->state_flags);
2875*4882a593Smuzhiyun 	} else {
2876*4882a593Smuzhiyun 		comp_status = le16_to_cpu(sts->comp_status);
2877*4882a593Smuzhiyun 		scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2878*4882a593Smuzhiyun 	}
2879*4882a593Smuzhiyun 	handle = (uint32_t) LSW(sts->handle);
2880*4882a593Smuzhiyun 	que = MSW(sts->handle);
2881*4882a593Smuzhiyun 	req = ha->req_q_map[que];
2882*4882a593Smuzhiyun 
2883*4882a593Smuzhiyun 	/* Check for invalid queue pointer */
2884*4882a593Smuzhiyun 	if (req == NULL ||
2885*4882a593Smuzhiyun 	    que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2886*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io, vha, 0x3059,
2887*4882a593Smuzhiyun 		    "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2888*4882a593Smuzhiyun 		    "que=%u.\n", sts->handle, req, que);
2889*4882a593Smuzhiyun 		return;
2890*4882a593Smuzhiyun 	}
2891*4882a593Smuzhiyun 
2892*4882a593Smuzhiyun 	/* Validate handle. */
2893*4882a593Smuzhiyun 	if (handle < req->num_outstanding_cmds) {
2894*4882a593Smuzhiyun 		sp = req->outstanding_cmds[handle];
2895*4882a593Smuzhiyun 		if (!sp) {
2896*4882a593Smuzhiyun 			ql_dbg(ql_dbg_io, vha, 0x3075,
2897*4882a593Smuzhiyun 			    "%s(%ld): Already returned command for status handle (0x%x).\n",
2898*4882a593Smuzhiyun 			    __func__, vha->host_no, sts->handle);
2899*4882a593Smuzhiyun 			return;
2900*4882a593Smuzhiyun 		}
2901*4882a593Smuzhiyun 	} else {
2902*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io, vha, 0x3017,
2903*4882a593Smuzhiyun 		    "Invalid status handle, out of range (0x%x).\n",
2904*4882a593Smuzhiyun 		    sts->handle);
2905*4882a593Smuzhiyun 
2906*4882a593Smuzhiyun 		if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2907*4882a593Smuzhiyun 			if (IS_P3P_TYPE(ha))
2908*4882a593Smuzhiyun 				set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2909*4882a593Smuzhiyun 			else
2910*4882a593Smuzhiyun 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2911*4882a593Smuzhiyun 			qla2xxx_wake_dpc(vha);
2912*4882a593Smuzhiyun 		}
2913*4882a593Smuzhiyun 		return;
2914*4882a593Smuzhiyun 	}
2915*4882a593Smuzhiyun 	qla_put_iocbs(sp->qpair, &sp->iores);
2916*4882a593Smuzhiyun 
2917*4882a593Smuzhiyun 	if (sp->cmd_type != TYPE_SRB) {
2918*4882a593Smuzhiyun 		req->outstanding_cmds[handle] = NULL;
2919*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io, vha, 0x3015,
2920*4882a593Smuzhiyun 		    "Unknown sp->cmd_type %x %p).\n",
2921*4882a593Smuzhiyun 		    sp->cmd_type, sp);
2922*4882a593Smuzhiyun 		return;
2923*4882a593Smuzhiyun 	}
2924*4882a593Smuzhiyun 
2925*4882a593Smuzhiyun 	/* NVME completion. */
2926*4882a593Smuzhiyun 	if (sp->type == SRB_NVME_CMD) {
2927*4882a593Smuzhiyun 		req->outstanding_cmds[handle] = NULL;
2928*4882a593Smuzhiyun 		qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
2929*4882a593Smuzhiyun 		return;
2930*4882a593Smuzhiyun 	}
2931*4882a593Smuzhiyun 
2932*4882a593Smuzhiyun 	if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2933*4882a593Smuzhiyun 		qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2934*4882a593Smuzhiyun 		return;
2935*4882a593Smuzhiyun 	}
2936*4882a593Smuzhiyun 
2937*4882a593Smuzhiyun 	/* Task Management completion. */
2938*4882a593Smuzhiyun 	if (sp->type == SRB_TM_CMD) {
2939*4882a593Smuzhiyun 		qla24xx_tm_iocb_entry(vha, req, pkt);
2940*4882a593Smuzhiyun 		return;
2941*4882a593Smuzhiyun 	}
2942*4882a593Smuzhiyun 
2943*4882a593Smuzhiyun 	/* Fast path completion. */
2944*4882a593Smuzhiyun 	if (comp_status == CS_COMPLETE && scsi_status == 0) {
2945*4882a593Smuzhiyun 		qla2x00_process_completed_request(vha, req, handle);
2946*4882a593Smuzhiyun 
2947*4882a593Smuzhiyun 		return;
2948*4882a593Smuzhiyun 	}
2949*4882a593Smuzhiyun 
2950*4882a593Smuzhiyun 	req->outstanding_cmds[handle] = NULL;
2951*4882a593Smuzhiyun 	cp = GET_CMD_SP(sp);
2952*4882a593Smuzhiyun 	if (cp == NULL) {
2953*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io, vha, 0x3018,
2954*4882a593Smuzhiyun 		    "Command already returned (0x%x/%p).\n",
2955*4882a593Smuzhiyun 		    sts->handle, sp);
2956*4882a593Smuzhiyun 
2957*4882a593Smuzhiyun 		return;
2958*4882a593Smuzhiyun 	}
2959*4882a593Smuzhiyun 
2960*4882a593Smuzhiyun 	lscsi_status = scsi_status & STATUS_MASK;
2961*4882a593Smuzhiyun 
2962*4882a593Smuzhiyun 	fcport = sp->fcport;
2963*4882a593Smuzhiyun 
2964*4882a593Smuzhiyun 	ox_id = 0;
2965*4882a593Smuzhiyun 	sense_len = par_sense_len = rsp_info_len = resid_len =
2966*4882a593Smuzhiyun 	    fw_resid_len = 0;
2967*4882a593Smuzhiyun 	if (IS_FWI2_CAPABLE(ha)) {
2968*4882a593Smuzhiyun 		if (scsi_status & SS_SENSE_LEN_VALID)
2969*4882a593Smuzhiyun 			sense_len = le32_to_cpu(sts24->sense_len);
2970*4882a593Smuzhiyun 		if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2971*4882a593Smuzhiyun 			rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2972*4882a593Smuzhiyun 		if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2973*4882a593Smuzhiyun 			resid_len = le32_to_cpu(sts24->rsp_residual_count);
2974*4882a593Smuzhiyun 		if (comp_status == CS_DATA_UNDERRUN)
2975*4882a593Smuzhiyun 			fw_resid_len = le32_to_cpu(sts24->residual_len);
2976*4882a593Smuzhiyun 		rsp_info = sts24->data;
2977*4882a593Smuzhiyun 		sense_data = sts24->data;
2978*4882a593Smuzhiyun 		host_to_fcp_swap(sts24->data, sizeof(sts24->data));
2979*4882a593Smuzhiyun 		ox_id = le16_to_cpu(sts24->ox_id);
2980*4882a593Smuzhiyun 		par_sense_len = sizeof(sts24->data);
2981*4882a593Smuzhiyun 		sts_qual = le16_to_cpu(sts24->status_qualifier);
2982*4882a593Smuzhiyun 	} else {
2983*4882a593Smuzhiyun 		if (scsi_status & SS_SENSE_LEN_VALID)
2984*4882a593Smuzhiyun 			sense_len = le16_to_cpu(sts->req_sense_length);
2985*4882a593Smuzhiyun 		if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2986*4882a593Smuzhiyun 			rsp_info_len = le16_to_cpu(sts->rsp_info_len);
2987*4882a593Smuzhiyun 		resid_len = le32_to_cpu(sts->residual_length);
2988*4882a593Smuzhiyun 		rsp_info = sts->rsp_info;
2989*4882a593Smuzhiyun 		sense_data = sts->req_sense_data;
2990*4882a593Smuzhiyun 		par_sense_len = sizeof(sts->req_sense_data);
2991*4882a593Smuzhiyun 	}
2992*4882a593Smuzhiyun 
2993*4882a593Smuzhiyun 	/* Check for any FCP transport errors. */
2994*4882a593Smuzhiyun 	if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
2995*4882a593Smuzhiyun 		/* Sense data lies beyond any FCP RESPONSE data. */
2996*4882a593Smuzhiyun 		if (IS_FWI2_CAPABLE(ha)) {
2997*4882a593Smuzhiyun 			sense_data += rsp_info_len;
2998*4882a593Smuzhiyun 			par_sense_len -= rsp_info_len;
2999*4882a593Smuzhiyun 		}
3000*4882a593Smuzhiyun 		if (rsp_info_len > 3 && rsp_info[3]) {
3001*4882a593Smuzhiyun 			ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
3002*4882a593Smuzhiyun 			    "FCP I/O protocol failure (0x%x/0x%x).\n",
3003*4882a593Smuzhiyun 			    rsp_info_len, rsp_info[3]);
3004*4882a593Smuzhiyun 
3005*4882a593Smuzhiyun 			res = DID_BUS_BUSY << 16;
3006*4882a593Smuzhiyun 			goto out;
3007*4882a593Smuzhiyun 		}
3008*4882a593Smuzhiyun 	}
3009*4882a593Smuzhiyun 
3010*4882a593Smuzhiyun 	/* Check for overrun. */
3011*4882a593Smuzhiyun 	if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
3012*4882a593Smuzhiyun 	    scsi_status & SS_RESIDUAL_OVER)
3013*4882a593Smuzhiyun 		comp_status = CS_DATA_OVERRUN;
3014*4882a593Smuzhiyun 
3015*4882a593Smuzhiyun 	/*
3016*4882a593Smuzhiyun 	 * Check retry_delay_timer value if we receive a busy or
3017*4882a593Smuzhiyun 	 * queue full.
3018*4882a593Smuzhiyun 	 */
3019*4882a593Smuzhiyun 	if (unlikely(lscsi_status == SAM_STAT_TASK_SET_FULL ||
3020*4882a593Smuzhiyun 		     lscsi_status == SAM_STAT_BUSY))
3021*4882a593Smuzhiyun 		qla2x00_set_retry_delay_timestamp(fcport, sts_qual);
3022*4882a593Smuzhiyun 
3023*4882a593Smuzhiyun 	/*
3024*4882a593Smuzhiyun 	 * Based on Host and scsi status generate status code for Linux
3025*4882a593Smuzhiyun 	 */
3026*4882a593Smuzhiyun 	switch (comp_status) {
3027*4882a593Smuzhiyun 	case CS_COMPLETE:
3028*4882a593Smuzhiyun 	case CS_QUEUE_FULL:
3029*4882a593Smuzhiyun 		if (scsi_status == 0) {
3030*4882a593Smuzhiyun 			res = DID_OK << 16;
3031*4882a593Smuzhiyun 			break;
3032*4882a593Smuzhiyun 		}
3033*4882a593Smuzhiyun 		if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
3034*4882a593Smuzhiyun 			resid = resid_len;
3035*4882a593Smuzhiyun 			scsi_set_resid(cp, resid);
3036*4882a593Smuzhiyun 
3037*4882a593Smuzhiyun 			if (!lscsi_status &&
3038*4882a593Smuzhiyun 			    ((unsigned)(scsi_bufflen(cp) - resid) <
3039*4882a593Smuzhiyun 			     cp->underflow)) {
3040*4882a593Smuzhiyun 				ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
3041*4882a593Smuzhiyun 				    "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
3042*4882a593Smuzhiyun 				    resid, scsi_bufflen(cp));
3043*4882a593Smuzhiyun 
3044*4882a593Smuzhiyun 				res = DID_ERROR << 16;
3045*4882a593Smuzhiyun 				break;
3046*4882a593Smuzhiyun 			}
3047*4882a593Smuzhiyun 		}
3048*4882a593Smuzhiyun 		res = DID_OK << 16 | lscsi_status;
3049*4882a593Smuzhiyun 
3050*4882a593Smuzhiyun 		if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
3051*4882a593Smuzhiyun 			ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
3052*4882a593Smuzhiyun 			    "QUEUE FULL detected.\n");
3053*4882a593Smuzhiyun 			break;
3054*4882a593Smuzhiyun 		}
3055*4882a593Smuzhiyun 		logit = 0;
3056*4882a593Smuzhiyun 		if (lscsi_status != SS_CHECK_CONDITION)
3057*4882a593Smuzhiyun 			break;
3058*4882a593Smuzhiyun 
3059*4882a593Smuzhiyun 		memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
3060*4882a593Smuzhiyun 		if (!(scsi_status & SS_SENSE_LEN_VALID))
3061*4882a593Smuzhiyun 			break;
3062*4882a593Smuzhiyun 
3063*4882a593Smuzhiyun 		qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
3064*4882a593Smuzhiyun 		    rsp, res);
3065*4882a593Smuzhiyun 		break;
3066*4882a593Smuzhiyun 
3067*4882a593Smuzhiyun 	case CS_DATA_UNDERRUN:
3068*4882a593Smuzhiyun 		/* Use F/W calculated residual length. */
3069*4882a593Smuzhiyun 		resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
3070*4882a593Smuzhiyun 		scsi_set_resid(cp, resid);
3071*4882a593Smuzhiyun 		if (scsi_status & SS_RESIDUAL_UNDER) {
3072*4882a593Smuzhiyun 			if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
3073*4882a593Smuzhiyun 				ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
3074*4882a593Smuzhiyun 				    "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3075*4882a593Smuzhiyun 				    resid, scsi_bufflen(cp));
3076*4882a593Smuzhiyun 
3077*4882a593Smuzhiyun 				res = DID_ERROR << 16 | lscsi_status;
3078*4882a593Smuzhiyun 				goto check_scsi_status;
3079*4882a593Smuzhiyun 			}
3080*4882a593Smuzhiyun 
3081*4882a593Smuzhiyun 			if (!lscsi_status &&
3082*4882a593Smuzhiyun 			    ((unsigned)(scsi_bufflen(cp) - resid) <
3083*4882a593Smuzhiyun 			    cp->underflow)) {
3084*4882a593Smuzhiyun 				ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
3085*4882a593Smuzhiyun 				    "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
3086*4882a593Smuzhiyun 				    resid, scsi_bufflen(cp));
3087*4882a593Smuzhiyun 
3088*4882a593Smuzhiyun 				res = DID_ERROR << 16;
3089*4882a593Smuzhiyun 				break;
3090*4882a593Smuzhiyun 			}
3091*4882a593Smuzhiyun 		} else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
3092*4882a593Smuzhiyun 			    lscsi_status != SAM_STAT_BUSY) {
3093*4882a593Smuzhiyun 			/*
3094*4882a593Smuzhiyun 			 * scsi status of task set and busy are considered to be
3095*4882a593Smuzhiyun 			 * task not completed.
3096*4882a593Smuzhiyun 			 */
3097*4882a593Smuzhiyun 
3098*4882a593Smuzhiyun 			ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
3099*4882a593Smuzhiyun 			    "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3100*4882a593Smuzhiyun 			    resid, scsi_bufflen(cp));
3101*4882a593Smuzhiyun 
3102*4882a593Smuzhiyun 			res = DID_ERROR << 16 | lscsi_status;
3103*4882a593Smuzhiyun 			goto check_scsi_status;
3104*4882a593Smuzhiyun 		} else {
3105*4882a593Smuzhiyun 			ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
3106*4882a593Smuzhiyun 			    "scsi_status: 0x%x, lscsi_status: 0x%x\n",
3107*4882a593Smuzhiyun 			    scsi_status, lscsi_status);
3108*4882a593Smuzhiyun 		}
3109*4882a593Smuzhiyun 
3110*4882a593Smuzhiyun 		res = DID_OK << 16 | lscsi_status;
3111*4882a593Smuzhiyun 		logit = 0;
3112*4882a593Smuzhiyun 
3113*4882a593Smuzhiyun check_scsi_status:
3114*4882a593Smuzhiyun 		/*
3115*4882a593Smuzhiyun 		 * Check to see if SCSI Status is non zero. If so report SCSI
3116*4882a593Smuzhiyun 		 * Status.
3117*4882a593Smuzhiyun 		 */
3118*4882a593Smuzhiyun 		if (lscsi_status != 0) {
3119*4882a593Smuzhiyun 			if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
3120*4882a593Smuzhiyun 				ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
3121*4882a593Smuzhiyun 				    "QUEUE FULL detected.\n");
3122*4882a593Smuzhiyun 				logit = 1;
3123*4882a593Smuzhiyun 				break;
3124*4882a593Smuzhiyun 			}
3125*4882a593Smuzhiyun 			if (lscsi_status != SS_CHECK_CONDITION)
3126*4882a593Smuzhiyun 				break;
3127*4882a593Smuzhiyun 
3128*4882a593Smuzhiyun 			memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
3129*4882a593Smuzhiyun 			if (!(scsi_status & SS_SENSE_LEN_VALID))
3130*4882a593Smuzhiyun 				break;
3131*4882a593Smuzhiyun 
3132*4882a593Smuzhiyun 			qla2x00_handle_sense(sp, sense_data, par_sense_len,
3133*4882a593Smuzhiyun 			    sense_len, rsp, res);
3134*4882a593Smuzhiyun 		}
3135*4882a593Smuzhiyun 		break;
3136*4882a593Smuzhiyun 
3137*4882a593Smuzhiyun 	case CS_PORT_LOGGED_OUT:
3138*4882a593Smuzhiyun 	case CS_PORT_CONFIG_CHG:
3139*4882a593Smuzhiyun 	case CS_PORT_BUSY:
3140*4882a593Smuzhiyun 	case CS_INCOMPLETE:
3141*4882a593Smuzhiyun 	case CS_PORT_UNAVAILABLE:
3142*4882a593Smuzhiyun 	case CS_TIMEOUT:
3143*4882a593Smuzhiyun 	case CS_RESET:
3144*4882a593Smuzhiyun 
3145*4882a593Smuzhiyun 		/*
3146*4882a593Smuzhiyun 		 * We are going to have the fc class block the rport
3147*4882a593Smuzhiyun 		 * while we try to recover so instruct the mid layer
3148*4882a593Smuzhiyun 		 * to requeue until the class decides how to handle this.
3149*4882a593Smuzhiyun 		 */
3150*4882a593Smuzhiyun 		res = DID_TRANSPORT_DISRUPTED << 16;
3151*4882a593Smuzhiyun 
3152*4882a593Smuzhiyun 		if (comp_status == CS_TIMEOUT) {
3153*4882a593Smuzhiyun 			if (IS_FWI2_CAPABLE(ha))
3154*4882a593Smuzhiyun 				break;
3155*4882a593Smuzhiyun 			else if ((le16_to_cpu(sts->status_flags) &
3156*4882a593Smuzhiyun 			    SF_LOGOUT_SENT) == 0)
3157*4882a593Smuzhiyun 				break;
3158*4882a593Smuzhiyun 		}
3159*4882a593Smuzhiyun 
3160*4882a593Smuzhiyun 		if (atomic_read(&fcport->state) == FCS_ONLINE) {
3161*4882a593Smuzhiyun 			ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
3162*4882a593Smuzhiyun 				"Port to be marked lost on fcport=%02x%02x%02x, current "
3163*4882a593Smuzhiyun 				"port state= %s comp_status %x.\n", fcport->d_id.b.domain,
3164*4882a593Smuzhiyun 				fcport->d_id.b.area, fcport->d_id.b.al_pa,
3165*4882a593Smuzhiyun 				port_state_str[FCS_ONLINE],
3166*4882a593Smuzhiyun 				comp_status);
3167*4882a593Smuzhiyun 
3168*4882a593Smuzhiyun 			qlt_schedule_sess_for_deletion(fcport);
3169*4882a593Smuzhiyun 		}
3170*4882a593Smuzhiyun 
3171*4882a593Smuzhiyun 		break;
3172*4882a593Smuzhiyun 
3173*4882a593Smuzhiyun 	case CS_ABORTED:
3174*4882a593Smuzhiyun 		res = DID_RESET << 16;
3175*4882a593Smuzhiyun 		break;
3176*4882a593Smuzhiyun 
3177*4882a593Smuzhiyun 	case CS_DIF_ERROR:
3178*4882a593Smuzhiyun 		logit = qla2x00_handle_dif_error(sp, sts24);
3179*4882a593Smuzhiyun 		res = cp->result;
3180*4882a593Smuzhiyun 		break;
3181*4882a593Smuzhiyun 
3182*4882a593Smuzhiyun 	case CS_TRANSPORT:
3183*4882a593Smuzhiyun 		res = DID_ERROR << 16;
3184*4882a593Smuzhiyun 
3185*4882a593Smuzhiyun 		if (!IS_PI_SPLIT_DET_CAPABLE(ha))
3186*4882a593Smuzhiyun 			break;
3187*4882a593Smuzhiyun 
3188*4882a593Smuzhiyun 		if (state_flags & BIT_4)
3189*4882a593Smuzhiyun 			scmd_printk(KERN_WARNING, cp,
3190*4882a593Smuzhiyun 			    "Unsupported device '%s' found.\n",
3191*4882a593Smuzhiyun 			    cp->device->vendor);
3192*4882a593Smuzhiyun 		break;
3193*4882a593Smuzhiyun 
3194*4882a593Smuzhiyun 	case CS_DMA:
3195*4882a593Smuzhiyun 		ql_log(ql_log_info, fcport->vha, 0x3022,
3196*4882a593Smuzhiyun 		    "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3197*4882a593Smuzhiyun 		    comp_status, scsi_status, res, vha->host_no,
3198*4882a593Smuzhiyun 		    cp->device->id, cp->device->lun, fcport->d_id.b24,
3199*4882a593Smuzhiyun 		    ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3200*4882a593Smuzhiyun 		    resid_len, fw_resid_len, sp, cp);
3201*4882a593Smuzhiyun 		ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
3202*4882a593Smuzhiyun 		    pkt, sizeof(*sts24));
3203*4882a593Smuzhiyun 		res = DID_ERROR << 16;
3204*4882a593Smuzhiyun 		break;
3205*4882a593Smuzhiyun 	default:
3206*4882a593Smuzhiyun 		res = DID_ERROR << 16;
3207*4882a593Smuzhiyun 		break;
3208*4882a593Smuzhiyun 	}
3209*4882a593Smuzhiyun 
3210*4882a593Smuzhiyun out:
3211*4882a593Smuzhiyun 	if (logit)
3212*4882a593Smuzhiyun 		ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
3213*4882a593Smuzhiyun 		    "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
3214*4882a593Smuzhiyun 		    "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
3215*4882a593Smuzhiyun 		    "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3216*4882a593Smuzhiyun 		    comp_status, scsi_status, res, vha->host_no,
3217*4882a593Smuzhiyun 		    cp->device->id, cp->device->lun, fcport->d_id.b.domain,
3218*4882a593Smuzhiyun 		    fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
3219*4882a593Smuzhiyun 		    cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3220*4882a593Smuzhiyun 		    resid_len, fw_resid_len, sp, cp);
3221*4882a593Smuzhiyun 
3222*4882a593Smuzhiyun 	if (rsp->status_srb == NULL)
3223*4882a593Smuzhiyun 		sp->done(sp, res);
3224*4882a593Smuzhiyun }
3225*4882a593Smuzhiyun 
3226*4882a593Smuzhiyun /**
3227*4882a593Smuzhiyun  * qla2x00_status_cont_entry() - Process a Status Continuations entry.
3228*4882a593Smuzhiyun  * @rsp: response queue
3229*4882a593Smuzhiyun  * @pkt: Entry pointer
3230*4882a593Smuzhiyun  *
3231*4882a593Smuzhiyun  * Extended sense data.
3232*4882a593Smuzhiyun  */
3233*4882a593Smuzhiyun static void
qla2x00_status_cont_entry(struct rsp_que * rsp,sts_cont_entry_t * pkt)3234*4882a593Smuzhiyun qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
3235*4882a593Smuzhiyun {
3236*4882a593Smuzhiyun 	uint8_t	sense_sz = 0;
3237*4882a593Smuzhiyun 	struct qla_hw_data *ha = rsp->hw;
3238*4882a593Smuzhiyun 	struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
3239*4882a593Smuzhiyun 	srb_t *sp = rsp->status_srb;
3240*4882a593Smuzhiyun 	struct scsi_cmnd *cp;
3241*4882a593Smuzhiyun 	uint32_t sense_len;
3242*4882a593Smuzhiyun 	uint8_t *sense_ptr;
3243*4882a593Smuzhiyun 
3244*4882a593Smuzhiyun 	if (!sp || !GET_CMD_SENSE_LEN(sp))
3245*4882a593Smuzhiyun 		return;
3246*4882a593Smuzhiyun 
3247*4882a593Smuzhiyun 	sense_len = GET_CMD_SENSE_LEN(sp);
3248*4882a593Smuzhiyun 	sense_ptr = GET_CMD_SENSE_PTR(sp);
3249*4882a593Smuzhiyun 
3250*4882a593Smuzhiyun 	cp = GET_CMD_SP(sp);
3251*4882a593Smuzhiyun 	if (cp == NULL) {
3252*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x3025,
3253*4882a593Smuzhiyun 		    "cmd is NULL: already returned to OS (sp=%p).\n", sp);
3254*4882a593Smuzhiyun 
3255*4882a593Smuzhiyun 		rsp->status_srb = NULL;
3256*4882a593Smuzhiyun 		return;
3257*4882a593Smuzhiyun 	}
3258*4882a593Smuzhiyun 
3259*4882a593Smuzhiyun 	if (sense_len > sizeof(pkt->data))
3260*4882a593Smuzhiyun 		sense_sz = sizeof(pkt->data);
3261*4882a593Smuzhiyun 	else
3262*4882a593Smuzhiyun 		sense_sz = sense_len;
3263*4882a593Smuzhiyun 
3264*4882a593Smuzhiyun 	/* Move sense data. */
3265*4882a593Smuzhiyun 	if (IS_FWI2_CAPABLE(ha))
3266*4882a593Smuzhiyun 		host_to_fcp_swap(pkt->data, sizeof(pkt->data));
3267*4882a593Smuzhiyun 	memcpy(sense_ptr, pkt->data, sense_sz);
3268*4882a593Smuzhiyun 	ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
3269*4882a593Smuzhiyun 		sense_ptr, sense_sz);
3270*4882a593Smuzhiyun 
3271*4882a593Smuzhiyun 	sense_len -= sense_sz;
3272*4882a593Smuzhiyun 	sense_ptr += sense_sz;
3273*4882a593Smuzhiyun 
3274*4882a593Smuzhiyun 	SET_CMD_SENSE_PTR(sp, sense_ptr);
3275*4882a593Smuzhiyun 	SET_CMD_SENSE_LEN(sp, sense_len);
3276*4882a593Smuzhiyun 
3277*4882a593Smuzhiyun 	/* Place command on done queue. */
3278*4882a593Smuzhiyun 	if (sense_len == 0) {
3279*4882a593Smuzhiyun 		rsp->status_srb = NULL;
3280*4882a593Smuzhiyun 		sp->done(sp, cp->result);
3281*4882a593Smuzhiyun 	}
3282*4882a593Smuzhiyun }
3283*4882a593Smuzhiyun 
3284*4882a593Smuzhiyun /**
3285*4882a593Smuzhiyun  * qla2x00_error_entry() - Process an error entry.
3286*4882a593Smuzhiyun  * @vha: SCSI driver HA context
3287*4882a593Smuzhiyun  * @rsp: response queue
3288*4882a593Smuzhiyun  * @pkt: Entry pointer
3289*4882a593Smuzhiyun  * return : 1=allow further error analysis. 0=no additional error analysis.
3290*4882a593Smuzhiyun  */
3291*4882a593Smuzhiyun static int
qla2x00_error_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,sts_entry_t * pkt)3292*4882a593Smuzhiyun qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
3293*4882a593Smuzhiyun {
3294*4882a593Smuzhiyun 	srb_t *sp;
3295*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
3296*4882a593Smuzhiyun 	const char func[] = "ERROR-IOCB";
3297*4882a593Smuzhiyun 	uint16_t que = MSW(pkt->handle);
3298*4882a593Smuzhiyun 	struct req_que *req = NULL;
3299*4882a593Smuzhiyun 	int res = DID_ERROR << 16;
3300*4882a593Smuzhiyun 
3301*4882a593Smuzhiyun 	ql_dbg(ql_dbg_async, vha, 0x502a,
3302*4882a593Smuzhiyun 	    "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
3303*4882a593Smuzhiyun 	    pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
3304*4882a593Smuzhiyun 
3305*4882a593Smuzhiyun 	if (que >= ha->max_req_queues || !ha->req_q_map[que])
3306*4882a593Smuzhiyun 		goto fatal;
3307*4882a593Smuzhiyun 
3308*4882a593Smuzhiyun 	req = ha->req_q_map[que];
3309*4882a593Smuzhiyun 
3310*4882a593Smuzhiyun 	if (pkt->entry_status & RF_BUSY)
3311*4882a593Smuzhiyun 		res = DID_BUS_BUSY << 16;
3312*4882a593Smuzhiyun 
3313*4882a593Smuzhiyun 	if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
3314*4882a593Smuzhiyun 		return 0;
3315*4882a593Smuzhiyun 
3316*4882a593Smuzhiyun 	switch (pkt->entry_type) {
3317*4882a593Smuzhiyun 	case NOTIFY_ACK_TYPE:
3318*4882a593Smuzhiyun 	case STATUS_TYPE:
3319*4882a593Smuzhiyun 	case STATUS_CONT_TYPE:
3320*4882a593Smuzhiyun 	case LOGINOUT_PORT_IOCB_TYPE:
3321*4882a593Smuzhiyun 	case CT_IOCB_TYPE:
3322*4882a593Smuzhiyun 	case ELS_IOCB_TYPE:
3323*4882a593Smuzhiyun 	case ABORT_IOCB_TYPE:
3324*4882a593Smuzhiyun 	case MBX_IOCB_TYPE:
3325*4882a593Smuzhiyun 	default:
3326*4882a593Smuzhiyun 		sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3327*4882a593Smuzhiyun 		if (sp) {
3328*4882a593Smuzhiyun 			qla_put_iocbs(sp->qpair, &sp->iores);
3329*4882a593Smuzhiyun 			sp->done(sp, res);
3330*4882a593Smuzhiyun 			return 0;
3331*4882a593Smuzhiyun 		}
3332*4882a593Smuzhiyun 		break;
3333*4882a593Smuzhiyun 
3334*4882a593Smuzhiyun 	case ABTS_RESP_24XX:
3335*4882a593Smuzhiyun 	case CTIO_TYPE7:
3336*4882a593Smuzhiyun 	case CTIO_CRC2:
3337*4882a593Smuzhiyun 		return 1;
3338*4882a593Smuzhiyun 	}
3339*4882a593Smuzhiyun fatal:
3340*4882a593Smuzhiyun 	ql_log(ql_log_warn, vha, 0x5030,
3341*4882a593Smuzhiyun 	    "Error entry - invalid handle/queue (%04x).\n", que);
3342*4882a593Smuzhiyun 	return 0;
3343*4882a593Smuzhiyun }
3344*4882a593Smuzhiyun 
3345*4882a593Smuzhiyun /**
3346*4882a593Smuzhiyun  * qla24xx_mbx_completion() - Process mailbox command completions.
3347*4882a593Smuzhiyun  * @vha: SCSI driver HA context
3348*4882a593Smuzhiyun  * @mb0: Mailbox0 register
3349*4882a593Smuzhiyun  */
3350*4882a593Smuzhiyun static void
qla24xx_mbx_completion(scsi_qla_host_t * vha,uint16_t mb0)3351*4882a593Smuzhiyun qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
3352*4882a593Smuzhiyun {
3353*4882a593Smuzhiyun 	uint16_t	cnt;
3354*4882a593Smuzhiyun 	uint32_t	mboxes;
3355*4882a593Smuzhiyun 	__le16 __iomem *wptr;
3356*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
3357*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3358*4882a593Smuzhiyun 
3359*4882a593Smuzhiyun 	/* Read all mbox registers? */
3360*4882a593Smuzhiyun 	WARN_ON_ONCE(ha->mbx_count > 32);
3361*4882a593Smuzhiyun 	mboxes = (1ULL << ha->mbx_count) - 1;
3362*4882a593Smuzhiyun 	if (!ha->mcp)
3363*4882a593Smuzhiyun 		ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
3364*4882a593Smuzhiyun 	else
3365*4882a593Smuzhiyun 		mboxes = ha->mcp->in_mb;
3366*4882a593Smuzhiyun 
3367*4882a593Smuzhiyun 	/* Load return mailbox registers. */
3368*4882a593Smuzhiyun 	ha->flags.mbox_int = 1;
3369*4882a593Smuzhiyun 	ha->mailbox_out[0] = mb0;
3370*4882a593Smuzhiyun 	mboxes >>= 1;
3371*4882a593Smuzhiyun 	wptr = &reg->mailbox1;
3372*4882a593Smuzhiyun 
3373*4882a593Smuzhiyun 	for (cnt = 1; cnt < ha->mbx_count; cnt++) {
3374*4882a593Smuzhiyun 		if (mboxes & BIT_0)
3375*4882a593Smuzhiyun 			ha->mailbox_out[cnt] = rd_reg_word(wptr);
3376*4882a593Smuzhiyun 
3377*4882a593Smuzhiyun 		mboxes >>= 1;
3378*4882a593Smuzhiyun 		wptr++;
3379*4882a593Smuzhiyun 	}
3380*4882a593Smuzhiyun }
3381*4882a593Smuzhiyun 
3382*4882a593Smuzhiyun static void
qla24xx_abort_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct abort_entry_24xx * pkt)3383*4882a593Smuzhiyun qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
3384*4882a593Smuzhiyun 	struct abort_entry_24xx *pkt)
3385*4882a593Smuzhiyun {
3386*4882a593Smuzhiyun 	const char func[] = "ABT_IOCB";
3387*4882a593Smuzhiyun 	srb_t *sp;
3388*4882a593Smuzhiyun 	struct srb_iocb *abt;
3389*4882a593Smuzhiyun 
3390*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3391*4882a593Smuzhiyun 	if (!sp)
3392*4882a593Smuzhiyun 		return;
3393*4882a593Smuzhiyun 
3394*4882a593Smuzhiyun 	abt = &sp->u.iocb_cmd;
3395*4882a593Smuzhiyun 	abt->u.abt.comp_status = pkt->nport_handle;
3396*4882a593Smuzhiyun 	sp->done(sp, 0);
3397*4882a593Smuzhiyun }
3398*4882a593Smuzhiyun 
qla24xx_nvme_ls4_iocb(struct scsi_qla_host * vha,struct pt_ls4_request * pkt,struct req_que * req)3399*4882a593Smuzhiyun void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
3400*4882a593Smuzhiyun     struct pt_ls4_request *pkt, struct req_que *req)
3401*4882a593Smuzhiyun {
3402*4882a593Smuzhiyun 	srb_t *sp;
3403*4882a593Smuzhiyun 	const char func[] = "LS4_IOCB";
3404*4882a593Smuzhiyun 	uint16_t comp_status;
3405*4882a593Smuzhiyun 
3406*4882a593Smuzhiyun 	sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3407*4882a593Smuzhiyun 	if (!sp)
3408*4882a593Smuzhiyun 		return;
3409*4882a593Smuzhiyun 
3410*4882a593Smuzhiyun 	comp_status = le16_to_cpu(pkt->status);
3411*4882a593Smuzhiyun 	sp->done(sp, comp_status);
3412*4882a593Smuzhiyun }
3413*4882a593Smuzhiyun 
3414*4882a593Smuzhiyun /**
3415*4882a593Smuzhiyun  * qla24xx_process_response_queue() - Process response queue entries.
3416*4882a593Smuzhiyun  * @vha: SCSI driver HA context
3417*4882a593Smuzhiyun  * @rsp: response queue
3418*4882a593Smuzhiyun  */
qla24xx_process_response_queue(struct scsi_qla_host * vha,struct rsp_que * rsp)3419*4882a593Smuzhiyun void qla24xx_process_response_queue(struct scsi_qla_host *vha,
3420*4882a593Smuzhiyun 	struct rsp_que *rsp)
3421*4882a593Smuzhiyun {
3422*4882a593Smuzhiyun 	struct sts_entry_24xx *pkt;
3423*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
3424*4882a593Smuzhiyun 	struct purex_entry_24xx *purex_entry;
3425*4882a593Smuzhiyun 	struct purex_item *pure_item;
3426*4882a593Smuzhiyun 
3427*4882a593Smuzhiyun 	if (!ha->flags.fw_started)
3428*4882a593Smuzhiyun 		return;
3429*4882a593Smuzhiyun 
3430*4882a593Smuzhiyun 	if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) {
3431*4882a593Smuzhiyun 		rsp->qpair->rcv_intr = 1;
3432*4882a593Smuzhiyun 		qla_cpu_update(rsp->qpair, smp_processor_id());
3433*4882a593Smuzhiyun 	}
3434*4882a593Smuzhiyun 
3435*4882a593Smuzhiyun 	while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
3436*4882a593Smuzhiyun 		pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
3437*4882a593Smuzhiyun 
3438*4882a593Smuzhiyun 		rsp->ring_index++;
3439*4882a593Smuzhiyun 		if (rsp->ring_index == rsp->length) {
3440*4882a593Smuzhiyun 			rsp->ring_index = 0;
3441*4882a593Smuzhiyun 			rsp->ring_ptr = rsp->ring;
3442*4882a593Smuzhiyun 		} else {
3443*4882a593Smuzhiyun 			rsp->ring_ptr++;
3444*4882a593Smuzhiyun 		}
3445*4882a593Smuzhiyun 
3446*4882a593Smuzhiyun 		if (pkt->entry_status != 0) {
3447*4882a593Smuzhiyun 			if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
3448*4882a593Smuzhiyun 				goto process_err;
3449*4882a593Smuzhiyun 
3450*4882a593Smuzhiyun 			((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3451*4882a593Smuzhiyun 			wmb();
3452*4882a593Smuzhiyun 			continue;
3453*4882a593Smuzhiyun 		}
3454*4882a593Smuzhiyun process_err:
3455*4882a593Smuzhiyun 
3456*4882a593Smuzhiyun 		switch (pkt->entry_type) {
3457*4882a593Smuzhiyun 		case STATUS_TYPE:
3458*4882a593Smuzhiyun 			qla2x00_status_entry(vha, rsp, pkt);
3459*4882a593Smuzhiyun 			break;
3460*4882a593Smuzhiyun 		case STATUS_CONT_TYPE:
3461*4882a593Smuzhiyun 			qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
3462*4882a593Smuzhiyun 			break;
3463*4882a593Smuzhiyun 		case VP_RPT_ID_IOCB_TYPE:
3464*4882a593Smuzhiyun 			qla24xx_report_id_acquisition(vha,
3465*4882a593Smuzhiyun 			    (struct vp_rpt_id_entry_24xx *)pkt);
3466*4882a593Smuzhiyun 			break;
3467*4882a593Smuzhiyun 		case LOGINOUT_PORT_IOCB_TYPE:
3468*4882a593Smuzhiyun 			qla24xx_logio_entry(vha, rsp->req,
3469*4882a593Smuzhiyun 			    (struct logio_entry_24xx *)pkt);
3470*4882a593Smuzhiyun 			break;
3471*4882a593Smuzhiyun 		case CT_IOCB_TYPE:
3472*4882a593Smuzhiyun 			qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
3473*4882a593Smuzhiyun 			break;
3474*4882a593Smuzhiyun 		case ELS_IOCB_TYPE:
3475*4882a593Smuzhiyun 			qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3476*4882a593Smuzhiyun 			break;
3477*4882a593Smuzhiyun 		case ABTS_RECV_24XX:
3478*4882a593Smuzhiyun 			if (qla_ini_mode_enabled(vha)) {
3479*4882a593Smuzhiyun 				pure_item = qla24xx_copy_std_pkt(vha, pkt);
3480*4882a593Smuzhiyun 				if (!pure_item)
3481*4882a593Smuzhiyun 					break;
3482*4882a593Smuzhiyun 				qla24xx_queue_purex_item(vha, pure_item,
3483*4882a593Smuzhiyun 							 qla24xx_process_abts);
3484*4882a593Smuzhiyun 				break;
3485*4882a593Smuzhiyun 			}
3486*4882a593Smuzhiyun 			if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3487*4882a593Smuzhiyun 			    IS_QLA28XX(ha)) {
3488*4882a593Smuzhiyun 				/* ensure that the ATIO queue is empty */
3489*4882a593Smuzhiyun 				qlt_handle_abts_recv(vha, rsp,
3490*4882a593Smuzhiyun 				    (response_t *)pkt);
3491*4882a593Smuzhiyun 				break;
3492*4882a593Smuzhiyun 			} else {
3493*4882a593Smuzhiyun 				qlt_24xx_process_atio_queue(vha, 1);
3494*4882a593Smuzhiyun 			}
3495*4882a593Smuzhiyun 			fallthrough;
3496*4882a593Smuzhiyun 		case ABTS_RESP_24XX:
3497*4882a593Smuzhiyun 		case CTIO_TYPE7:
3498*4882a593Smuzhiyun 		case CTIO_CRC2:
3499*4882a593Smuzhiyun 			qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
3500*4882a593Smuzhiyun 			break;
3501*4882a593Smuzhiyun 		case PT_LS4_REQUEST:
3502*4882a593Smuzhiyun 			qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3503*4882a593Smuzhiyun 			    rsp->req);
3504*4882a593Smuzhiyun 			break;
3505*4882a593Smuzhiyun 		case NOTIFY_ACK_TYPE:
3506*4882a593Smuzhiyun 			if (pkt->handle == QLA_TGT_SKIP_HANDLE)
3507*4882a593Smuzhiyun 				qlt_response_pkt_all_vps(vha, rsp,
3508*4882a593Smuzhiyun 				    (response_t *)pkt);
3509*4882a593Smuzhiyun 			else
3510*4882a593Smuzhiyun 				qla24xxx_nack_iocb_entry(vha, rsp->req,
3511*4882a593Smuzhiyun 					(struct nack_to_isp *)pkt);
3512*4882a593Smuzhiyun 			break;
3513*4882a593Smuzhiyun 		case MARKER_TYPE:
3514*4882a593Smuzhiyun 			/* Do nothing in this case, this check is to prevent it
3515*4882a593Smuzhiyun 			 * from falling into default case
3516*4882a593Smuzhiyun 			 */
3517*4882a593Smuzhiyun 			break;
3518*4882a593Smuzhiyun 		case ABORT_IOCB_TYPE:
3519*4882a593Smuzhiyun 			qla24xx_abort_iocb_entry(vha, rsp->req,
3520*4882a593Smuzhiyun 			    (struct abort_entry_24xx *)pkt);
3521*4882a593Smuzhiyun 			break;
3522*4882a593Smuzhiyun 		case MBX_IOCB_TYPE:
3523*4882a593Smuzhiyun 			qla24xx_mbx_iocb_entry(vha, rsp->req,
3524*4882a593Smuzhiyun 			    (struct mbx_24xx_entry *)pkt);
3525*4882a593Smuzhiyun 			break;
3526*4882a593Smuzhiyun 		case VP_CTRL_IOCB_TYPE:
3527*4882a593Smuzhiyun 			qla_ctrlvp_completed(vha, rsp->req,
3528*4882a593Smuzhiyun 			    (struct vp_ctrl_entry_24xx *)pkt);
3529*4882a593Smuzhiyun 			break;
3530*4882a593Smuzhiyun 		case PUREX_IOCB_TYPE:
3531*4882a593Smuzhiyun 			purex_entry = (void *)pkt;
3532*4882a593Smuzhiyun 			switch (purex_entry->els_frame_payload[3]) {
3533*4882a593Smuzhiyun 			case ELS_RDP:
3534*4882a593Smuzhiyun 				pure_item = qla24xx_copy_std_pkt(vha, pkt);
3535*4882a593Smuzhiyun 				if (!pure_item)
3536*4882a593Smuzhiyun 					break;
3537*4882a593Smuzhiyun 				qla24xx_queue_purex_item(vha, pure_item,
3538*4882a593Smuzhiyun 						 qla24xx_process_purex_rdp);
3539*4882a593Smuzhiyun 				break;
3540*4882a593Smuzhiyun 			case ELS_FPIN:
3541*4882a593Smuzhiyun 				if (!vha->hw->flags.scm_enabled) {
3542*4882a593Smuzhiyun 					ql_log(ql_log_warn, vha, 0x5094,
3543*4882a593Smuzhiyun 					       "SCM not active for this port\n");
3544*4882a593Smuzhiyun 					break;
3545*4882a593Smuzhiyun 				}
3546*4882a593Smuzhiyun 				pure_item = qla27xx_copy_fpin_pkt(vha,
3547*4882a593Smuzhiyun 							  (void **)&pkt, &rsp);
3548*4882a593Smuzhiyun 				if (!pure_item)
3549*4882a593Smuzhiyun 					break;
3550*4882a593Smuzhiyun 				qla24xx_queue_purex_item(vha, pure_item,
3551*4882a593Smuzhiyun 						 qla27xx_process_purex_fpin);
3552*4882a593Smuzhiyun 				break;
3553*4882a593Smuzhiyun 
3554*4882a593Smuzhiyun 			default:
3555*4882a593Smuzhiyun 				ql_log(ql_log_warn, vha, 0x509c,
3556*4882a593Smuzhiyun 				       "Discarding ELS Request opcode 0x%x\n",
3557*4882a593Smuzhiyun 				       purex_entry->els_frame_payload[3]);
3558*4882a593Smuzhiyun 			}
3559*4882a593Smuzhiyun 			break;
3560*4882a593Smuzhiyun 		default:
3561*4882a593Smuzhiyun 			/* Type Not Supported. */
3562*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5042,
3563*4882a593Smuzhiyun 			       "Received unknown response pkt type 0x%x entry status=%x.\n",
3564*4882a593Smuzhiyun 			       pkt->entry_type, pkt->entry_status);
3565*4882a593Smuzhiyun 			break;
3566*4882a593Smuzhiyun 		}
3567*4882a593Smuzhiyun 		((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3568*4882a593Smuzhiyun 		wmb();
3569*4882a593Smuzhiyun 	}
3570*4882a593Smuzhiyun 
3571*4882a593Smuzhiyun 	/* Adjust ring index */
3572*4882a593Smuzhiyun 	if (IS_P3P_TYPE(ha)) {
3573*4882a593Smuzhiyun 		struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
3574*4882a593Smuzhiyun 
3575*4882a593Smuzhiyun 		wrt_reg_dword(&reg->rsp_q_out[0], rsp->ring_index);
3576*4882a593Smuzhiyun 	} else {
3577*4882a593Smuzhiyun 		wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index);
3578*4882a593Smuzhiyun 	}
3579*4882a593Smuzhiyun }
3580*4882a593Smuzhiyun 
3581*4882a593Smuzhiyun static void
qla2xxx_check_risc_status(scsi_qla_host_t * vha)3582*4882a593Smuzhiyun qla2xxx_check_risc_status(scsi_qla_host_t *vha)
3583*4882a593Smuzhiyun {
3584*4882a593Smuzhiyun 	int rval;
3585*4882a593Smuzhiyun 	uint32_t cnt;
3586*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
3587*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3588*4882a593Smuzhiyun 
3589*4882a593Smuzhiyun 	if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3590*4882a593Smuzhiyun 	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3591*4882a593Smuzhiyun 		return;
3592*4882a593Smuzhiyun 
3593*4882a593Smuzhiyun 	rval = QLA_SUCCESS;
3594*4882a593Smuzhiyun 	wrt_reg_dword(&reg->iobase_addr, 0x7C00);
3595*4882a593Smuzhiyun 	rd_reg_dword(&reg->iobase_addr);
3596*4882a593Smuzhiyun 	wrt_reg_dword(&reg->iobase_window, 0x0001);
3597*4882a593Smuzhiyun 	for (cnt = 10000; (rd_reg_dword(&reg->iobase_window) & BIT_0) == 0 &&
3598*4882a593Smuzhiyun 	    rval == QLA_SUCCESS; cnt--) {
3599*4882a593Smuzhiyun 		if (cnt) {
3600*4882a593Smuzhiyun 			wrt_reg_dword(&reg->iobase_window, 0x0001);
3601*4882a593Smuzhiyun 			udelay(10);
3602*4882a593Smuzhiyun 		} else
3603*4882a593Smuzhiyun 			rval = QLA_FUNCTION_TIMEOUT;
3604*4882a593Smuzhiyun 	}
3605*4882a593Smuzhiyun 	if (rval == QLA_SUCCESS)
3606*4882a593Smuzhiyun 		goto next_test;
3607*4882a593Smuzhiyun 
3608*4882a593Smuzhiyun 	rval = QLA_SUCCESS;
3609*4882a593Smuzhiyun 	wrt_reg_dword(&reg->iobase_window, 0x0003);
3610*4882a593Smuzhiyun 	for (cnt = 100; (rd_reg_dword(&reg->iobase_window) & BIT_0) == 0 &&
3611*4882a593Smuzhiyun 	    rval == QLA_SUCCESS; cnt--) {
3612*4882a593Smuzhiyun 		if (cnt) {
3613*4882a593Smuzhiyun 			wrt_reg_dword(&reg->iobase_window, 0x0003);
3614*4882a593Smuzhiyun 			udelay(10);
3615*4882a593Smuzhiyun 		} else
3616*4882a593Smuzhiyun 			rval = QLA_FUNCTION_TIMEOUT;
3617*4882a593Smuzhiyun 	}
3618*4882a593Smuzhiyun 	if (rval != QLA_SUCCESS)
3619*4882a593Smuzhiyun 		goto done;
3620*4882a593Smuzhiyun 
3621*4882a593Smuzhiyun next_test:
3622*4882a593Smuzhiyun 	if (rd_reg_dword(&reg->iobase_c8) & BIT_3)
3623*4882a593Smuzhiyun 		ql_log(ql_log_info, vha, 0x504c,
3624*4882a593Smuzhiyun 		    "Additional code -- 0x55AA.\n");
3625*4882a593Smuzhiyun 
3626*4882a593Smuzhiyun done:
3627*4882a593Smuzhiyun 	wrt_reg_dword(&reg->iobase_window, 0x0000);
3628*4882a593Smuzhiyun 	rd_reg_dword(&reg->iobase_window);
3629*4882a593Smuzhiyun }
3630*4882a593Smuzhiyun 
3631*4882a593Smuzhiyun /**
3632*4882a593Smuzhiyun  * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
3633*4882a593Smuzhiyun  * @irq: interrupt number
3634*4882a593Smuzhiyun  * @dev_id: SCSI driver HA context
3635*4882a593Smuzhiyun  *
3636*4882a593Smuzhiyun  * Called by system whenever the host adapter generates an interrupt.
3637*4882a593Smuzhiyun  *
3638*4882a593Smuzhiyun  * Returns handled flag.
3639*4882a593Smuzhiyun  */
3640*4882a593Smuzhiyun irqreturn_t
qla24xx_intr_handler(int irq,void * dev_id)3641*4882a593Smuzhiyun qla24xx_intr_handler(int irq, void *dev_id)
3642*4882a593Smuzhiyun {
3643*4882a593Smuzhiyun 	scsi_qla_host_t	*vha;
3644*4882a593Smuzhiyun 	struct qla_hw_data *ha;
3645*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg;
3646*4882a593Smuzhiyun 	int		status;
3647*4882a593Smuzhiyun 	unsigned long	iter;
3648*4882a593Smuzhiyun 	uint32_t	stat;
3649*4882a593Smuzhiyun 	uint32_t	hccr;
3650*4882a593Smuzhiyun 	uint16_t	mb[8];
3651*4882a593Smuzhiyun 	struct rsp_que *rsp;
3652*4882a593Smuzhiyun 	unsigned long	flags;
3653*4882a593Smuzhiyun 	bool process_atio = false;
3654*4882a593Smuzhiyun 
3655*4882a593Smuzhiyun 	rsp = (struct rsp_que *) dev_id;
3656*4882a593Smuzhiyun 	if (!rsp) {
3657*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x5059,
3658*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
3659*4882a593Smuzhiyun 		return IRQ_NONE;
3660*4882a593Smuzhiyun 	}
3661*4882a593Smuzhiyun 
3662*4882a593Smuzhiyun 	ha = rsp->hw;
3663*4882a593Smuzhiyun 	reg = &ha->iobase->isp24;
3664*4882a593Smuzhiyun 	status = 0;
3665*4882a593Smuzhiyun 
3666*4882a593Smuzhiyun 	if (unlikely(pci_channel_offline(ha->pdev)))
3667*4882a593Smuzhiyun 		return IRQ_HANDLED;
3668*4882a593Smuzhiyun 
3669*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->hardware_lock, flags);
3670*4882a593Smuzhiyun 	vha = pci_get_drvdata(ha->pdev);
3671*4882a593Smuzhiyun 	for (iter = 50; iter--; ) {
3672*4882a593Smuzhiyun 		stat = rd_reg_dword(&reg->host_status);
3673*4882a593Smuzhiyun 		if (qla2x00_check_reg32_for_disconnect(vha, stat))
3674*4882a593Smuzhiyun 			break;
3675*4882a593Smuzhiyun 		if (stat & HSRX_RISC_PAUSED) {
3676*4882a593Smuzhiyun 			if (unlikely(pci_channel_offline(ha->pdev)))
3677*4882a593Smuzhiyun 				break;
3678*4882a593Smuzhiyun 
3679*4882a593Smuzhiyun 			hccr = rd_reg_dword(&reg->hccr);
3680*4882a593Smuzhiyun 
3681*4882a593Smuzhiyun 			ql_log(ql_log_warn, vha, 0x504b,
3682*4882a593Smuzhiyun 			    "RISC paused -- HCCR=%x, Dumping firmware.\n",
3683*4882a593Smuzhiyun 			    hccr);
3684*4882a593Smuzhiyun 
3685*4882a593Smuzhiyun 			qla2xxx_check_risc_status(vha);
3686*4882a593Smuzhiyun 
3687*4882a593Smuzhiyun 			ha->isp_ops->fw_dump(vha);
3688*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3689*4882a593Smuzhiyun 			break;
3690*4882a593Smuzhiyun 		} else if ((stat & HSRX_RISC_INT) == 0)
3691*4882a593Smuzhiyun 			break;
3692*4882a593Smuzhiyun 
3693*4882a593Smuzhiyun 		switch (stat & 0xff) {
3694*4882a593Smuzhiyun 		case INTR_ROM_MB_SUCCESS:
3695*4882a593Smuzhiyun 		case INTR_ROM_MB_FAILED:
3696*4882a593Smuzhiyun 		case INTR_MB_SUCCESS:
3697*4882a593Smuzhiyun 		case INTR_MB_FAILED:
3698*4882a593Smuzhiyun 			qla24xx_mbx_completion(vha, MSW(stat));
3699*4882a593Smuzhiyun 			status |= MBX_INTERRUPT;
3700*4882a593Smuzhiyun 
3701*4882a593Smuzhiyun 			break;
3702*4882a593Smuzhiyun 		case INTR_ASYNC_EVENT:
3703*4882a593Smuzhiyun 			mb[0] = MSW(stat);
3704*4882a593Smuzhiyun 			mb[1] = rd_reg_word(&reg->mailbox1);
3705*4882a593Smuzhiyun 			mb[2] = rd_reg_word(&reg->mailbox2);
3706*4882a593Smuzhiyun 			mb[3] = rd_reg_word(&reg->mailbox3);
3707*4882a593Smuzhiyun 			qla2x00_async_event(vha, rsp, mb);
3708*4882a593Smuzhiyun 			break;
3709*4882a593Smuzhiyun 		case INTR_RSP_QUE_UPDATE:
3710*4882a593Smuzhiyun 		case INTR_RSP_QUE_UPDATE_83XX:
3711*4882a593Smuzhiyun 			qla24xx_process_response_queue(vha, rsp);
3712*4882a593Smuzhiyun 			break;
3713*4882a593Smuzhiyun 		case INTR_ATIO_QUE_UPDATE_27XX:
3714*4882a593Smuzhiyun 		case INTR_ATIO_QUE_UPDATE:
3715*4882a593Smuzhiyun 			process_atio = true;
3716*4882a593Smuzhiyun 			break;
3717*4882a593Smuzhiyun 		case INTR_ATIO_RSP_QUE_UPDATE:
3718*4882a593Smuzhiyun 			process_atio = true;
3719*4882a593Smuzhiyun 			qla24xx_process_response_queue(vha, rsp);
3720*4882a593Smuzhiyun 			break;
3721*4882a593Smuzhiyun 		default:
3722*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x504f,
3723*4882a593Smuzhiyun 			    "Unrecognized interrupt type (%d).\n", stat * 0xff);
3724*4882a593Smuzhiyun 			break;
3725*4882a593Smuzhiyun 		}
3726*4882a593Smuzhiyun 		wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
3727*4882a593Smuzhiyun 		rd_reg_dword_relaxed(&reg->hccr);
3728*4882a593Smuzhiyun 		if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3729*4882a593Smuzhiyun 			ndelay(3500);
3730*4882a593Smuzhiyun 	}
3731*4882a593Smuzhiyun 	qla2x00_handle_mbx_completion(ha, status);
3732*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3733*4882a593Smuzhiyun 
3734*4882a593Smuzhiyun 	if (process_atio) {
3735*4882a593Smuzhiyun 		spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3736*4882a593Smuzhiyun 		qlt_24xx_process_atio_queue(vha, 0);
3737*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3738*4882a593Smuzhiyun 	}
3739*4882a593Smuzhiyun 
3740*4882a593Smuzhiyun 	return IRQ_HANDLED;
3741*4882a593Smuzhiyun }
3742*4882a593Smuzhiyun 
3743*4882a593Smuzhiyun static irqreturn_t
qla24xx_msix_rsp_q(int irq,void * dev_id)3744*4882a593Smuzhiyun qla24xx_msix_rsp_q(int irq, void *dev_id)
3745*4882a593Smuzhiyun {
3746*4882a593Smuzhiyun 	struct qla_hw_data *ha;
3747*4882a593Smuzhiyun 	struct rsp_que *rsp;
3748*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg;
3749*4882a593Smuzhiyun 	struct scsi_qla_host *vha;
3750*4882a593Smuzhiyun 	unsigned long flags;
3751*4882a593Smuzhiyun 
3752*4882a593Smuzhiyun 	rsp = (struct rsp_que *) dev_id;
3753*4882a593Smuzhiyun 	if (!rsp) {
3754*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x505a,
3755*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
3756*4882a593Smuzhiyun 		return IRQ_NONE;
3757*4882a593Smuzhiyun 	}
3758*4882a593Smuzhiyun 	ha = rsp->hw;
3759*4882a593Smuzhiyun 	reg = &ha->iobase->isp24;
3760*4882a593Smuzhiyun 
3761*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->hardware_lock, flags);
3762*4882a593Smuzhiyun 
3763*4882a593Smuzhiyun 	vha = pci_get_drvdata(ha->pdev);
3764*4882a593Smuzhiyun 	qla24xx_process_response_queue(vha, rsp);
3765*4882a593Smuzhiyun 	if (!ha->flags.disable_msix_handshake) {
3766*4882a593Smuzhiyun 		wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
3767*4882a593Smuzhiyun 		rd_reg_dword_relaxed(&reg->hccr);
3768*4882a593Smuzhiyun 	}
3769*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3770*4882a593Smuzhiyun 
3771*4882a593Smuzhiyun 	return IRQ_HANDLED;
3772*4882a593Smuzhiyun }
3773*4882a593Smuzhiyun 
3774*4882a593Smuzhiyun static irqreturn_t
qla24xx_msix_default(int irq,void * dev_id)3775*4882a593Smuzhiyun qla24xx_msix_default(int irq, void *dev_id)
3776*4882a593Smuzhiyun {
3777*4882a593Smuzhiyun 	scsi_qla_host_t	*vha;
3778*4882a593Smuzhiyun 	struct qla_hw_data *ha;
3779*4882a593Smuzhiyun 	struct rsp_que *rsp;
3780*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg;
3781*4882a593Smuzhiyun 	int		status;
3782*4882a593Smuzhiyun 	uint32_t	stat;
3783*4882a593Smuzhiyun 	uint32_t	hccr;
3784*4882a593Smuzhiyun 	uint16_t	mb[8];
3785*4882a593Smuzhiyun 	unsigned long flags;
3786*4882a593Smuzhiyun 	bool process_atio = false;
3787*4882a593Smuzhiyun 
3788*4882a593Smuzhiyun 	rsp = (struct rsp_que *) dev_id;
3789*4882a593Smuzhiyun 	if (!rsp) {
3790*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x505c,
3791*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
3792*4882a593Smuzhiyun 		return IRQ_NONE;
3793*4882a593Smuzhiyun 	}
3794*4882a593Smuzhiyun 	ha = rsp->hw;
3795*4882a593Smuzhiyun 	reg = &ha->iobase->isp24;
3796*4882a593Smuzhiyun 	status = 0;
3797*4882a593Smuzhiyun 
3798*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->hardware_lock, flags);
3799*4882a593Smuzhiyun 	vha = pci_get_drvdata(ha->pdev);
3800*4882a593Smuzhiyun 	do {
3801*4882a593Smuzhiyun 		stat = rd_reg_dword(&reg->host_status);
3802*4882a593Smuzhiyun 		if (qla2x00_check_reg32_for_disconnect(vha, stat))
3803*4882a593Smuzhiyun 			break;
3804*4882a593Smuzhiyun 		if (stat & HSRX_RISC_PAUSED) {
3805*4882a593Smuzhiyun 			if (unlikely(pci_channel_offline(ha->pdev)))
3806*4882a593Smuzhiyun 				break;
3807*4882a593Smuzhiyun 
3808*4882a593Smuzhiyun 			hccr = rd_reg_dword(&reg->hccr);
3809*4882a593Smuzhiyun 
3810*4882a593Smuzhiyun 			ql_log(ql_log_info, vha, 0x5050,
3811*4882a593Smuzhiyun 			    "RISC paused -- HCCR=%x, Dumping firmware.\n",
3812*4882a593Smuzhiyun 			    hccr);
3813*4882a593Smuzhiyun 
3814*4882a593Smuzhiyun 			qla2xxx_check_risc_status(vha);
3815*4882a593Smuzhiyun 
3816*4882a593Smuzhiyun 			ha->isp_ops->fw_dump(vha);
3817*4882a593Smuzhiyun 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3818*4882a593Smuzhiyun 			break;
3819*4882a593Smuzhiyun 		} else if ((stat & HSRX_RISC_INT) == 0)
3820*4882a593Smuzhiyun 			break;
3821*4882a593Smuzhiyun 
3822*4882a593Smuzhiyun 		switch (stat & 0xff) {
3823*4882a593Smuzhiyun 		case INTR_ROM_MB_SUCCESS:
3824*4882a593Smuzhiyun 		case INTR_ROM_MB_FAILED:
3825*4882a593Smuzhiyun 		case INTR_MB_SUCCESS:
3826*4882a593Smuzhiyun 		case INTR_MB_FAILED:
3827*4882a593Smuzhiyun 			qla24xx_mbx_completion(vha, MSW(stat));
3828*4882a593Smuzhiyun 			status |= MBX_INTERRUPT;
3829*4882a593Smuzhiyun 
3830*4882a593Smuzhiyun 			break;
3831*4882a593Smuzhiyun 		case INTR_ASYNC_EVENT:
3832*4882a593Smuzhiyun 			mb[0] = MSW(stat);
3833*4882a593Smuzhiyun 			mb[1] = rd_reg_word(&reg->mailbox1);
3834*4882a593Smuzhiyun 			mb[2] = rd_reg_word(&reg->mailbox2);
3835*4882a593Smuzhiyun 			mb[3] = rd_reg_word(&reg->mailbox3);
3836*4882a593Smuzhiyun 			qla2x00_async_event(vha, rsp, mb);
3837*4882a593Smuzhiyun 			break;
3838*4882a593Smuzhiyun 		case INTR_RSP_QUE_UPDATE:
3839*4882a593Smuzhiyun 		case INTR_RSP_QUE_UPDATE_83XX:
3840*4882a593Smuzhiyun 			qla24xx_process_response_queue(vha, rsp);
3841*4882a593Smuzhiyun 			break;
3842*4882a593Smuzhiyun 		case INTR_ATIO_QUE_UPDATE_27XX:
3843*4882a593Smuzhiyun 		case INTR_ATIO_QUE_UPDATE:
3844*4882a593Smuzhiyun 			process_atio = true;
3845*4882a593Smuzhiyun 			break;
3846*4882a593Smuzhiyun 		case INTR_ATIO_RSP_QUE_UPDATE:
3847*4882a593Smuzhiyun 			process_atio = true;
3848*4882a593Smuzhiyun 			qla24xx_process_response_queue(vha, rsp);
3849*4882a593Smuzhiyun 			break;
3850*4882a593Smuzhiyun 		default:
3851*4882a593Smuzhiyun 			ql_dbg(ql_dbg_async, vha, 0x5051,
3852*4882a593Smuzhiyun 			    "Unrecognized interrupt type (%d).\n", stat & 0xff);
3853*4882a593Smuzhiyun 			break;
3854*4882a593Smuzhiyun 		}
3855*4882a593Smuzhiyun 		wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
3856*4882a593Smuzhiyun 	} while (0);
3857*4882a593Smuzhiyun 	qla2x00_handle_mbx_completion(ha, status);
3858*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3859*4882a593Smuzhiyun 
3860*4882a593Smuzhiyun 	if (process_atio) {
3861*4882a593Smuzhiyun 		spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3862*4882a593Smuzhiyun 		qlt_24xx_process_atio_queue(vha, 0);
3863*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3864*4882a593Smuzhiyun 	}
3865*4882a593Smuzhiyun 
3866*4882a593Smuzhiyun 	return IRQ_HANDLED;
3867*4882a593Smuzhiyun }
3868*4882a593Smuzhiyun 
3869*4882a593Smuzhiyun irqreturn_t
qla2xxx_msix_rsp_q(int irq,void * dev_id)3870*4882a593Smuzhiyun qla2xxx_msix_rsp_q(int irq, void *dev_id)
3871*4882a593Smuzhiyun {
3872*4882a593Smuzhiyun 	struct qla_hw_data *ha;
3873*4882a593Smuzhiyun 	struct qla_qpair *qpair;
3874*4882a593Smuzhiyun 
3875*4882a593Smuzhiyun 	qpair = dev_id;
3876*4882a593Smuzhiyun 	if (!qpair) {
3877*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x505b,
3878*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
3879*4882a593Smuzhiyun 		return IRQ_NONE;
3880*4882a593Smuzhiyun 	}
3881*4882a593Smuzhiyun 	ha = qpair->hw;
3882*4882a593Smuzhiyun 
3883*4882a593Smuzhiyun 	queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
3884*4882a593Smuzhiyun 
3885*4882a593Smuzhiyun 	return IRQ_HANDLED;
3886*4882a593Smuzhiyun }
3887*4882a593Smuzhiyun 
3888*4882a593Smuzhiyun irqreturn_t
qla2xxx_msix_rsp_q_hs(int irq,void * dev_id)3889*4882a593Smuzhiyun qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
3890*4882a593Smuzhiyun {
3891*4882a593Smuzhiyun 	struct qla_hw_data *ha;
3892*4882a593Smuzhiyun 	struct qla_qpair *qpair;
3893*4882a593Smuzhiyun 	struct device_reg_24xx __iomem *reg;
3894*4882a593Smuzhiyun 	unsigned long flags;
3895*4882a593Smuzhiyun 
3896*4882a593Smuzhiyun 	qpair = dev_id;
3897*4882a593Smuzhiyun 	if (!qpair) {
3898*4882a593Smuzhiyun 		ql_log(ql_log_info, NULL, 0x505b,
3899*4882a593Smuzhiyun 		    "%s: NULL response queue pointer.\n", __func__);
3900*4882a593Smuzhiyun 		return IRQ_NONE;
3901*4882a593Smuzhiyun 	}
3902*4882a593Smuzhiyun 	ha = qpair->hw;
3903*4882a593Smuzhiyun 
3904*4882a593Smuzhiyun 	reg = &ha->iobase->isp24;
3905*4882a593Smuzhiyun 	spin_lock_irqsave(&ha->hardware_lock, flags);
3906*4882a593Smuzhiyun 	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
3907*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3908*4882a593Smuzhiyun 
3909*4882a593Smuzhiyun 	queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
3910*4882a593Smuzhiyun 
3911*4882a593Smuzhiyun 	return IRQ_HANDLED;
3912*4882a593Smuzhiyun }
3913*4882a593Smuzhiyun 
3914*4882a593Smuzhiyun /* Interrupt handling helpers. */
3915*4882a593Smuzhiyun 
3916*4882a593Smuzhiyun struct qla_init_msix_entry {
3917*4882a593Smuzhiyun 	const char *name;
3918*4882a593Smuzhiyun 	irq_handler_t handler;
3919*4882a593Smuzhiyun };
3920*4882a593Smuzhiyun 
3921*4882a593Smuzhiyun static const struct qla_init_msix_entry msix_entries[] = {
3922*4882a593Smuzhiyun 	{ "default", qla24xx_msix_default },
3923*4882a593Smuzhiyun 	{ "rsp_q", qla24xx_msix_rsp_q },
3924*4882a593Smuzhiyun 	{ "atio_q", qla83xx_msix_atio_q },
3925*4882a593Smuzhiyun 	{ "qpair_multiq", qla2xxx_msix_rsp_q },
3926*4882a593Smuzhiyun 	{ "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs },
3927*4882a593Smuzhiyun };
3928*4882a593Smuzhiyun 
3929*4882a593Smuzhiyun static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
3930*4882a593Smuzhiyun 	{ "qla2xxx (default)", qla82xx_msix_default },
3931*4882a593Smuzhiyun 	{ "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3932*4882a593Smuzhiyun };
3933*4882a593Smuzhiyun 
3934*4882a593Smuzhiyun static int
qla24xx_enable_msix(struct qla_hw_data * ha,struct rsp_que * rsp)3935*4882a593Smuzhiyun qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
3936*4882a593Smuzhiyun {
3937*4882a593Smuzhiyun 	int i, ret;
3938*4882a593Smuzhiyun 	struct qla_msix_entry *qentry;
3939*4882a593Smuzhiyun 	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3940*4882a593Smuzhiyun 	int min_vecs = QLA_BASE_VECTORS;
3941*4882a593Smuzhiyun 	struct irq_affinity desc = {
3942*4882a593Smuzhiyun 		.pre_vectors = QLA_BASE_VECTORS,
3943*4882a593Smuzhiyun 	};
3944*4882a593Smuzhiyun 
3945*4882a593Smuzhiyun 	if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3946*4882a593Smuzhiyun 	    IS_ATIO_MSIX_CAPABLE(ha)) {
3947*4882a593Smuzhiyun 		desc.pre_vectors++;
3948*4882a593Smuzhiyun 		min_vecs++;
3949*4882a593Smuzhiyun 	}
3950*4882a593Smuzhiyun 
3951*4882a593Smuzhiyun 	if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
3952*4882a593Smuzhiyun 		/* user wants to control IRQ setting for target mode */
3953*4882a593Smuzhiyun 		ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3954*4882a593Smuzhiyun 		    ha->msix_count, PCI_IRQ_MSIX);
3955*4882a593Smuzhiyun 	} else
3956*4882a593Smuzhiyun 		ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3957*4882a593Smuzhiyun 		    ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3958*4882a593Smuzhiyun 		    &desc);
3959*4882a593Smuzhiyun 
3960*4882a593Smuzhiyun 	if (ret < 0) {
3961*4882a593Smuzhiyun 		ql_log(ql_log_fatal, vha, 0x00c7,
3962*4882a593Smuzhiyun 		    "MSI-X: Failed to enable support, "
3963*4882a593Smuzhiyun 		    "giving   up -- %d/%d.\n",
3964*4882a593Smuzhiyun 		    ha->msix_count, ret);
3965*4882a593Smuzhiyun 		goto msix_out;
3966*4882a593Smuzhiyun 	} else if (ret < ha->msix_count) {
3967*4882a593Smuzhiyun 		ql_log(ql_log_info, vha, 0x00c6,
3968*4882a593Smuzhiyun 		    "MSI-X: Using %d vectors\n", ret);
3969*4882a593Smuzhiyun 		ha->msix_count = ret;
3970*4882a593Smuzhiyun 		/* Recalculate queue values */
3971*4882a593Smuzhiyun 		if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
3972*4882a593Smuzhiyun 			ha->max_req_queues = ha->msix_count - 1;
3973*4882a593Smuzhiyun 
3974*4882a593Smuzhiyun 			/* ATIOQ needs 1 vector. That's 1 less QPair */
3975*4882a593Smuzhiyun 			if (QLA_TGT_MODE_ENABLED())
3976*4882a593Smuzhiyun 				ha->max_req_queues--;
3977*4882a593Smuzhiyun 
3978*4882a593Smuzhiyun 			ha->max_rsp_queues = ha->max_req_queues;
3979*4882a593Smuzhiyun 
3980*4882a593Smuzhiyun 			ha->max_qpairs = ha->max_req_queues - 1;
3981*4882a593Smuzhiyun 			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3982*4882a593Smuzhiyun 			    "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3983*4882a593Smuzhiyun 		}
3984*4882a593Smuzhiyun 	}
3985*4882a593Smuzhiyun 	vha->irq_offset = desc.pre_vectors;
3986*4882a593Smuzhiyun 	ha->msix_entries = kcalloc(ha->msix_count,
3987*4882a593Smuzhiyun 				   sizeof(struct qla_msix_entry),
3988*4882a593Smuzhiyun 				   GFP_KERNEL);
3989*4882a593Smuzhiyun 	if (!ha->msix_entries) {
3990*4882a593Smuzhiyun 		ql_log(ql_log_fatal, vha, 0x00c8,
3991*4882a593Smuzhiyun 		    "Failed to allocate memory for ha->msix_entries.\n");
3992*4882a593Smuzhiyun 		ret = -ENOMEM;
3993*4882a593Smuzhiyun 		goto free_irqs;
3994*4882a593Smuzhiyun 	}
3995*4882a593Smuzhiyun 	ha->flags.msix_enabled = 1;
3996*4882a593Smuzhiyun 
3997*4882a593Smuzhiyun 	for (i = 0; i < ha->msix_count; i++) {
3998*4882a593Smuzhiyun 		qentry = &ha->msix_entries[i];
3999*4882a593Smuzhiyun 		qentry->vector = pci_irq_vector(ha->pdev, i);
4000*4882a593Smuzhiyun 		qentry->entry = i;
4001*4882a593Smuzhiyun 		qentry->have_irq = 0;
4002*4882a593Smuzhiyun 		qentry->in_use = 0;
4003*4882a593Smuzhiyun 		qentry->handle = NULL;
4004*4882a593Smuzhiyun 	}
4005*4882a593Smuzhiyun 
4006*4882a593Smuzhiyun 	/* Enable MSI-X vectors for the base queue */
4007*4882a593Smuzhiyun 	for (i = 0; i < QLA_BASE_VECTORS; i++) {
4008*4882a593Smuzhiyun 		qentry = &ha->msix_entries[i];
4009*4882a593Smuzhiyun 		qentry->handle = rsp;
4010*4882a593Smuzhiyun 		rsp->msix = qentry;
4011*4882a593Smuzhiyun 		scnprintf(qentry->name, sizeof(qentry->name),
4012*4882a593Smuzhiyun 		    "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
4013*4882a593Smuzhiyun 		if (IS_P3P_TYPE(ha))
4014*4882a593Smuzhiyun 			ret = request_irq(qentry->vector,
4015*4882a593Smuzhiyun 				qla82xx_msix_entries[i].handler,
4016*4882a593Smuzhiyun 				0, qla82xx_msix_entries[i].name, rsp);
4017*4882a593Smuzhiyun 		else
4018*4882a593Smuzhiyun 			ret = request_irq(qentry->vector,
4019*4882a593Smuzhiyun 				msix_entries[i].handler,
4020*4882a593Smuzhiyun 				0, qentry->name, rsp);
4021*4882a593Smuzhiyun 		if (ret)
4022*4882a593Smuzhiyun 			goto msix_register_fail;
4023*4882a593Smuzhiyun 		qentry->have_irq = 1;
4024*4882a593Smuzhiyun 		qentry->in_use = 1;
4025*4882a593Smuzhiyun 	}
4026*4882a593Smuzhiyun 
4027*4882a593Smuzhiyun 	/*
4028*4882a593Smuzhiyun 	 * If target mode is enable, also request the vector for the ATIO
4029*4882a593Smuzhiyun 	 * queue.
4030*4882a593Smuzhiyun 	 */
4031*4882a593Smuzhiyun 	if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
4032*4882a593Smuzhiyun 	    IS_ATIO_MSIX_CAPABLE(ha)) {
4033*4882a593Smuzhiyun 		qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
4034*4882a593Smuzhiyun 		rsp->msix = qentry;
4035*4882a593Smuzhiyun 		qentry->handle = rsp;
4036*4882a593Smuzhiyun 		scnprintf(qentry->name, sizeof(qentry->name),
4037*4882a593Smuzhiyun 		    "qla2xxx%lu_%s", vha->host_no,
4038*4882a593Smuzhiyun 		    msix_entries[QLA_ATIO_VECTOR].name);
4039*4882a593Smuzhiyun 		qentry->in_use = 1;
4040*4882a593Smuzhiyun 		ret = request_irq(qentry->vector,
4041*4882a593Smuzhiyun 			msix_entries[QLA_ATIO_VECTOR].handler,
4042*4882a593Smuzhiyun 			0, qentry->name, rsp);
4043*4882a593Smuzhiyun 		qentry->have_irq = 1;
4044*4882a593Smuzhiyun 	}
4045*4882a593Smuzhiyun 
4046*4882a593Smuzhiyun msix_register_fail:
4047*4882a593Smuzhiyun 	if (ret) {
4048*4882a593Smuzhiyun 		ql_log(ql_log_fatal, vha, 0x00cb,
4049*4882a593Smuzhiyun 		    "MSI-X: unable to register handler -- %x/%d.\n",
4050*4882a593Smuzhiyun 		    qentry->vector, ret);
4051*4882a593Smuzhiyun 		qla2x00_free_irqs(vha);
4052*4882a593Smuzhiyun 		ha->mqenable = 0;
4053*4882a593Smuzhiyun 		goto msix_out;
4054*4882a593Smuzhiyun 	}
4055*4882a593Smuzhiyun 
4056*4882a593Smuzhiyun 	/* Enable MSI-X vector for response queue update for queue 0 */
4057*4882a593Smuzhiyun 	if (IS_MQUE_CAPABLE(ha) &&
4058*4882a593Smuzhiyun 	    (ha->msixbase && ha->mqiobase && ha->max_qpairs))
4059*4882a593Smuzhiyun 		ha->mqenable = 1;
4060*4882a593Smuzhiyun 	else
4061*4882a593Smuzhiyun 		ha->mqenable = 0;
4062*4882a593Smuzhiyun 
4063*4882a593Smuzhiyun 	ql_dbg(ql_dbg_multiq, vha, 0xc005,
4064*4882a593Smuzhiyun 	    "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4065*4882a593Smuzhiyun 	    ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4066*4882a593Smuzhiyun 	ql_dbg(ql_dbg_init, vha, 0x0055,
4067*4882a593Smuzhiyun 	    "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4068*4882a593Smuzhiyun 	    ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4069*4882a593Smuzhiyun 
4070*4882a593Smuzhiyun msix_out:
4071*4882a593Smuzhiyun 	return ret;
4072*4882a593Smuzhiyun 
4073*4882a593Smuzhiyun free_irqs:
4074*4882a593Smuzhiyun 	pci_free_irq_vectors(ha->pdev);
4075*4882a593Smuzhiyun 	goto msix_out;
4076*4882a593Smuzhiyun }
4077*4882a593Smuzhiyun 
4078*4882a593Smuzhiyun int
qla2x00_request_irqs(struct qla_hw_data * ha,struct rsp_que * rsp)4079*4882a593Smuzhiyun qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
4080*4882a593Smuzhiyun {
4081*4882a593Smuzhiyun 	int ret = QLA_FUNCTION_FAILED;
4082*4882a593Smuzhiyun 	device_reg_t *reg = ha->iobase;
4083*4882a593Smuzhiyun 	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
4084*4882a593Smuzhiyun 
4085*4882a593Smuzhiyun 	/* If possible, enable MSI-X. */
4086*4882a593Smuzhiyun 	if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
4087*4882a593Smuzhiyun 	    !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
4088*4882a593Smuzhiyun 	    !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
4089*4882a593Smuzhiyun 		goto skip_msi;
4090*4882a593Smuzhiyun 
4091*4882a593Smuzhiyun 	if (ql2xenablemsix == 2)
4092*4882a593Smuzhiyun 		goto skip_msix;
4093*4882a593Smuzhiyun 
4094*4882a593Smuzhiyun 	if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4095*4882a593Smuzhiyun 		(ha->pdev->subsystem_device == 0x7040 ||
4096*4882a593Smuzhiyun 		ha->pdev->subsystem_device == 0x7041 ||
4097*4882a593Smuzhiyun 		ha->pdev->subsystem_device == 0x1705)) {
4098*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x0034,
4099*4882a593Smuzhiyun 		    "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
4100*4882a593Smuzhiyun 			ha->pdev->subsystem_vendor,
4101*4882a593Smuzhiyun 			ha->pdev->subsystem_device);
4102*4882a593Smuzhiyun 		goto skip_msi;
4103*4882a593Smuzhiyun 	}
4104*4882a593Smuzhiyun 
4105*4882a593Smuzhiyun 	if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
4106*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x0035,
4107*4882a593Smuzhiyun 		    "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
4108*4882a593Smuzhiyun 		    ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
4109*4882a593Smuzhiyun 		goto skip_msix;
4110*4882a593Smuzhiyun 	}
4111*4882a593Smuzhiyun 
4112*4882a593Smuzhiyun 	ret = qla24xx_enable_msix(ha, rsp);
4113*4882a593Smuzhiyun 	if (!ret) {
4114*4882a593Smuzhiyun 		ql_dbg(ql_dbg_init, vha, 0x0036,
4115*4882a593Smuzhiyun 		    "MSI-X: Enabled (0x%X, 0x%X).\n",
4116*4882a593Smuzhiyun 		    ha->chip_revision, ha->fw_attributes);
4117*4882a593Smuzhiyun 		goto clear_risc_ints;
4118*4882a593Smuzhiyun 	}
4119*4882a593Smuzhiyun 
4120*4882a593Smuzhiyun skip_msix:
4121*4882a593Smuzhiyun 
4122*4882a593Smuzhiyun 	ql_log(ql_log_info, vha, 0x0037,
4123*4882a593Smuzhiyun 	    "Falling back-to MSI mode -- ret=%d.\n", ret);
4124*4882a593Smuzhiyun 
4125*4882a593Smuzhiyun 	if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
4126*4882a593Smuzhiyun 	    !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
4127*4882a593Smuzhiyun 	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4128*4882a593Smuzhiyun 		goto skip_msi;
4129*4882a593Smuzhiyun 
4130*4882a593Smuzhiyun 	ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
4131*4882a593Smuzhiyun 	if (ret > 0) {
4132*4882a593Smuzhiyun 		ql_dbg(ql_dbg_init, vha, 0x0038,
4133*4882a593Smuzhiyun 		    "MSI: Enabled.\n");
4134*4882a593Smuzhiyun 		ha->flags.msi_enabled = 1;
4135*4882a593Smuzhiyun 	} else
4136*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x0039,
4137*4882a593Smuzhiyun 		    "Falling back-to INTa mode -- ret=%d.\n", ret);
4138*4882a593Smuzhiyun skip_msi:
4139*4882a593Smuzhiyun 
4140*4882a593Smuzhiyun 	/* Skip INTx on ISP82xx. */
4141*4882a593Smuzhiyun 	if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
4142*4882a593Smuzhiyun 		return QLA_FUNCTION_FAILED;
4143*4882a593Smuzhiyun 
4144*4882a593Smuzhiyun 	ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
4145*4882a593Smuzhiyun 	    ha->flags.msi_enabled ? 0 : IRQF_SHARED,
4146*4882a593Smuzhiyun 	    QLA2XXX_DRIVER_NAME, rsp);
4147*4882a593Smuzhiyun 	if (ret) {
4148*4882a593Smuzhiyun 		ql_log(ql_log_warn, vha, 0x003a,
4149*4882a593Smuzhiyun 		    "Failed to reserve interrupt %d already in use.\n",
4150*4882a593Smuzhiyun 		    ha->pdev->irq);
4151*4882a593Smuzhiyun 		goto fail;
4152*4882a593Smuzhiyun 	} else if (!ha->flags.msi_enabled) {
4153*4882a593Smuzhiyun 		ql_dbg(ql_dbg_init, vha, 0x0125,
4154*4882a593Smuzhiyun 		    "INTa mode: Enabled.\n");
4155*4882a593Smuzhiyun 		ha->flags.mr_intr_valid = 1;
4156*4882a593Smuzhiyun 		/* Set max_qpair to 0, as MSI-X and MSI in not enabled */
4157*4882a593Smuzhiyun 		ha->max_qpairs = 0;
4158*4882a593Smuzhiyun 	}
4159*4882a593Smuzhiyun 
4160*4882a593Smuzhiyun clear_risc_ints:
4161*4882a593Smuzhiyun 	if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
4162*4882a593Smuzhiyun 		goto fail;
4163*4882a593Smuzhiyun 
4164*4882a593Smuzhiyun 	spin_lock_irq(&ha->hardware_lock);
4165*4882a593Smuzhiyun 	wrt_reg_word(&reg->isp.semaphore, 0);
4166*4882a593Smuzhiyun 	spin_unlock_irq(&ha->hardware_lock);
4167*4882a593Smuzhiyun 
4168*4882a593Smuzhiyun fail:
4169*4882a593Smuzhiyun 	return ret;
4170*4882a593Smuzhiyun }
4171*4882a593Smuzhiyun 
4172*4882a593Smuzhiyun void
qla2x00_free_irqs(scsi_qla_host_t * vha)4173*4882a593Smuzhiyun qla2x00_free_irqs(scsi_qla_host_t *vha)
4174*4882a593Smuzhiyun {
4175*4882a593Smuzhiyun 	struct qla_hw_data *ha = vha->hw;
4176*4882a593Smuzhiyun 	struct rsp_que *rsp;
4177*4882a593Smuzhiyun 	struct qla_msix_entry *qentry;
4178*4882a593Smuzhiyun 	int i;
4179*4882a593Smuzhiyun 
4180*4882a593Smuzhiyun 	/*
4181*4882a593Smuzhiyun 	 * We need to check that ha->rsp_q_map is valid in case we are called
4182*4882a593Smuzhiyun 	 * from a probe failure context.
4183*4882a593Smuzhiyun 	 */
4184*4882a593Smuzhiyun 	if (!ha->rsp_q_map || !ha->rsp_q_map[0])
4185*4882a593Smuzhiyun 		goto free_irqs;
4186*4882a593Smuzhiyun 	rsp = ha->rsp_q_map[0];
4187*4882a593Smuzhiyun 
4188*4882a593Smuzhiyun 	if (ha->flags.msix_enabled) {
4189*4882a593Smuzhiyun 		for (i = 0; i < ha->msix_count; i++) {
4190*4882a593Smuzhiyun 			qentry = &ha->msix_entries[i];
4191*4882a593Smuzhiyun 			if (qentry->have_irq) {
4192*4882a593Smuzhiyun 				irq_set_affinity_notifier(qentry->vector, NULL);
4193*4882a593Smuzhiyun 				free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
4194*4882a593Smuzhiyun 			}
4195*4882a593Smuzhiyun 		}
4196*4882a593Smuzhiyun 		kfree(ha->msix_entries);
4197*4882a593Smuzhiyun 		ha->msix_entries = NULL;
4198*4882a593Smuzhiyun 		ha->flags.msix_enabled = 0;
4199*4882a593Smuzhiyun 		ql_dbg(ql_dbg_init, vha, 0x0042,
4200*4882a593Smuzhiyun 			"Disabled MSI-X.\n");
4201*4882a593Smuzhiyun 	} else {
4202*4882a593Smuzhiyun 		free_irq(pci_irq_vector(ha->pdev, 0), rsp);
4203*4882a593Smuzhiyun 	}
4204*4882a593Smuzhiyun 
4205*4882a593Smuzhiyun free_irqs:
4206*4882a593Smuzhiyun 	pci_free_irq_vectors(ha->pdev);
4207*4882a593Smuzhiyun }
4208*4882a593Smuzhiyun 
qla25xx_request_irq(struct qla_hw_data * ha,struct qla_qpair * qpair,struct qla_msix_entry * msix,int vector_type)4209*4882a593Smuzhiyun int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
4210*4882a593Smuzhiyun 	struct qla_msix_entry *msix, int vector_type)
4211*4882a593Smuzhiyun {
4212*4882a593Smuzhiyun 	const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
4213*4882a593Smuzhiyun 	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
4214*4882a593Smuzhiyun 	int ret;
4215*4882a593Smuzhiyun 
4216*4882a593Smuzhiyun 	scnprintf(msix->name, sizeof(msix->name),
4217*4882a593Smuzhiyun 	    "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
4218*4882a593Smuzhiyun 	ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
4219*4882a593Smuzhiyun 	if (ret) {
4220*4882a593Smuzhiyun 		ql_log(ql_log_fatal, vha, 0x00e6,
4221*4882a593Smuzhiyun 		    "MSI-X: Unable to register handler -- %x/%d.\n",
4222*4882a593Smuzhiyun 		    msix->vector, ret);
4223*4882a593Smuzhiyun 		return ret;
4224*4882a593Smuzhiyun 	}
4225*4882a593Smuzhiyun 	msix->have_irq = 1;
4226*4882a593Smuzhiyun 	msix->handle = qpair;
4227*4882a593Smuzhiyun 	return ret;
4228*4882a593Smuzhiyun }
4229