| /OK3568_Linux_fs/kernel/arch/m68k/include/asm/ |
| H A D | MC68328.h | 586 #define PG(x) (1 << (x)) macro
588 #define PG_UART_TXD PG(0) /* Use UART_TXD as PG(0) */
589 #define PG_UART_RXD PG(1) /* Use UART_RXD as PG(1) */
590 #define PG_PWMOUT PG(2) /* Use PWMOUT as PG(2) */
591 #define PG_TOUT2 PG(3) /* Use TOUT2 as PG(3) */
592 #define PG_TIN2 PG(4) /* Use TIN2 as PG(4) */
593 #define PG_TOUT1 PG(5) /* Use TOUT1 as PG(5) */
594 #define PG_TIN1 PG(6) /* Use TIN1 as PG(6) */
595 #define PG_RTCOUT PG(7) /* Use RTCOUT as PG(7) */
|
| H A D | MC68EZ328.h | 497 #define PG(x) (1 << (x)) macro
|
| H A D | MC68VZ328.h | 506 #define PG(x) (1 << (x)) macro
|
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/supply/ |
| H A D | bq24257.txt | 17 - pg-gpios: GPIO used for connecting the bq2425x device PG (Power Good) pin.
19 possible as this is the recommended way to obtain the charger's input PG
20 state. If this pin is not specified a software-based approach for PG
|
| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | am335x-boneblack.dts | 18 * All PG 2.0 silicon may not support 1GHz but some of the early
19 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
20 * to support 1GHz OPP so enable it for PG 2.0 on this board.
|
| H A D | dra76x-mmc-iodelay.dtsi | 18 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
19 * 'rev20' for PG 2.0 and so on.
|
| H A D | dra72x-mmc-iodelay.dtsi | 28 * a revision tag to both the new and old entry. Use 'rev10' for PG 1.0,
29 * 'rev20' for PG 2.0 and so on.
|
| H A D | sun7i-a20-bananapi.dts | 235 /* PG */
|
| H A D | dra74x-mmc-iodelay.dtsi | 28 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
29 * 'rev20' for PG 2.0 and so on.
|
| /OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/include/iq_parser_v2/ |
| H A D | adpcc_head.h | 102 CalibDb_Dpcc_set_PG_V20_t PG; member
145 CalibDb_Dpcc_set_PG_V20_t PG; member
|
| /OK3568_Linux_fs/kernel/include/linux/ceph/ |
| H A D | rados.h | 317 f(PGLS, __CEPH_OSD_OP(RD, PG, 1), "pgls") \
318 f(PGLS_FILTER, __CEPH_OSD_OP(RD, PG, 2), "pgls-filter") \
319 f(PG_HITSET_LS, __CEPH_OSD_OP(RD, PG, 3), "pg-hitset-ls") \
320 f(PG_HITSET_GET, __CEPH_OSD_OP(RD, PG, 4), "pg-hitset-get")
|
| /OK3568_Linux_fs/yocto/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/ |
| H A D | uk-RidgeHill | 3 # <http://www.digitaluk.co.uk/coveragechecker/main/tradeexport/HR8�2PG/NA/0/>
|
| /OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/algos/adpcc/ |
| H A D | rk_aiq_adpcc_algo.cpp | 481 … pBasic->arBasic[i].pg_red_blue1_enable = pCalib->DpccTuningPara.Expert_Mode.set1.PG.PG_enable[i]; in dpcc_expert_mode_basic_params_init()
487 … pBasic->arBasic[i].pg_green1_enable = pCalib->DpccTuningPara.Expert_Mode.set1.PG.PG_enable[i]; in dpcc_expert_mode_basic_params_init()
495 … pBasic->arBasic[i].pg_red_blue2_enable = pCalib->DpccTuningPara.Expert_Mode.set2.PG.PG_enable[i]; in dpcc_expert_mode_basic_params_init()
501 … pBasic->arBasic[i].pg_green2_enable = pCalib->DpccTuningPara.Expert_Mode.set2.PG.PG_enable[i]; in dpcc_expert_mode_basic_params_init()
509 … pBasic->arBasic[i].pg_red_blue3_enable = pCalib->DpccTuningPara.Expert_Mode.set3.PG.PG_enable[i]; in dpcc_expert_mode_basic_params_init()
515 … pBasic->arBasic[i].pg_green3_enable = pCalib->DpccTuningPara.Expert_Mode.set3.PG.PG_enable[i]; in dpcc_expert_mode_basic_params_init()
530 pBasic->arBasic[i].pg_fac_1_rb = pCalib->DpccTuningPara.Expert_Mode.set1.PG.rb_pg_fac[i]; in dpcc_expert_mode_basic_params_init()
531 pBasic->arBasic[i].pg_fac_1_g = pCalib->DpccTuningPara.Expert_Mode.set1.PG.g_pg_fac[i]; in dpcc_expert_mode_basic_params_init()
555 pBasic->arBasic[i].pg_fac_2_rb = pCalib->DpccTuningPara.Expert_Mode.set2.PG.rb_pg_fac[i]; in dpcc_expert_mode_basic_params_init()
556 pBasic->arBasic[i].pg_fac_2_g = pCalib->DpccTuningPara.Expert_Mode.set2.PG.g_pg_fac[i]; in dpcc_expert_mode_basic_params_init()
[all …]
|
| /OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/tools/iqConverTer/src/ |
| H A D | iqconverter.cpp | 206 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set1.PG.PG_enable[j] = calibv1_dpcc->expert.set[0]… in convert()
207 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set1.PG.g_pg_fac[j] = calibv1_dpcc->expert.set[0].… in convert()
208 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set1.PG.rb_pg_fac[j] = calibv1_dpcc->expert.set[0]… in convert()
236 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set2.PG.PG_enable[j] = calibv1_dpcc->expert.set[1]… in convert()
237 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set2.PG.g_pg_fac[j] = calibv1_dpcc->expert.set[1].… in convert()
238 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set2.PG.rb_pg_fac[j] = calibv1_dpcc->expert.set[1]… in convert()
266 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set3.PG.PG_enable[j] = calibv1_dpcc->expert.set[2]… in convert()
267 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set3.PG.g_pg_fac[j] = calibv1_dpcc->expert.set[2].… in convert()
268 …calibv2_adpcc_calib->DpccTuningPara.Expert_Mode.set3.PG.rb_pg_fac[j] = calibv1_dpcc->expert.set[2]… in convert()
|
| /OK3568_Linux_fs/kernel/drivers/iio/temperature/ |
| H A D | mlx90632.c | 708 s32 PT, PR, PG, PO; in mlx90632_calc_ambient_dsp105() local
715 ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_G, &PG); in mlx90632_calc_ambient_dsp105()
734 PT, PR, PG, PO, Gb); in mlx90632_calc_ambient_dsp105()
|
| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/share/i18n/locales/ |
| H A D | yuw_PG | 133 country_ab2 "PG"
|
| H A D | tpi_PG | 181 country_ab2 "PG"
|
| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/share/i18n/locales/ |
| H A D | yuw_PG | 133 country_ab2 "PG"
|
| H A D | tpi_PG | 181 country_ab2 "PG"
|
| /OK3568_Linux_fs/kernel/drivers/net/ethernet/qlogic/ |
| H A D | Kconfig | 55 mode of DCB is supported. PG and PFC values are related only
|
| /OK3568_Linux_fs/u-boot/arch/powerpc/include/asm/ |
| H A D | cpm_85xx.h | 69 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument
70 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
|
| /OK3568_Linux_fs/kernel/arch/powerpc/include/asm/ |
| H A D | cpm2.h | 76 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument
77 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
|
| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.power-framework | 87 The PG, MUIC and CHRG above are regarded to be in the same level in the
|
| /OK3568_Linux_fs/kernel/arch/x86/kernel/ |
| H A D | head_32.S | 306 andl $0x80000011,%eax # Save PG,PE,ET
|
| /OK3568_Linux_fs/kernel/drivers/staging/comedi/ |
| H A D | Kconfig | 167 Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
168 ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
169 A-822PGH/PGL, A-823PGH/PGL, A-826PG and ICP DAS ISO-813 ISA cards
|