1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * mlx90632.c - Melexis MLX90632 contactless IR temperature sensor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2017 Melexis <cmo@melexis.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Driver for the Melexis MLX90632 I2C 16-bit IR thermopile sensor
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/iopoll.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/limits.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/math64.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/pm_runtime.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <linux/iio/iio.h>
23*4882a593Smuzhiyun #include <linux/iio/sysfs.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* Memory sections addresses */
26*4882a593Smuzhiyun #define MLX90632_ADDR_RAM 0x4000 /* Start address of ram */
27*4882a593Smuzhiyun #define MLX90632_ADDR_EEPROM 0x2480 /* Start address of user eeprom */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* EEPROM addresses - used at startup */
30*4882a593Smuzhiyun #define MLX90632_EE_CTRL 0x24d4 /* Control register initial value */
31*4882a593Smuzhiyun #define MLX90632_EE_I2C_ADDR 0x24d5 /* I2C address register initial value */
32*4882a593Smuzhiyun #define MLX90632_EE_VERSION 0x240b /* EEPROM version reg address */
33*4882a593Smuzhiyun #define MLX90632_EE_P_R 0x240c /* P_R calibration register 32bit */
34*4882a593Smuzhiyun #define MLX90632_EE_P_G 0x240e /* P_G calibration register 32bit */
35*4882a593Smuzhiyun #define MLX90632_EE_P_T 0x2410 /* P_T calibration register 32bit */
36*4882a593Smuzhiyun #define MLX90632_EE_P_O 0x2412 /* P_O calibration register 32bit */
37*4882a593Smuzhiyun #define MLX90632_EE_Aa 0x2414 /* Aa calibration register 32bit */
38*4882a593Smuzhiyun #define MLX90632_EE_Ab 0x2416 /* Ab calibration register 32bit */
39*4882a593Smuzhiyun #define MLX90632_EE_Ba 0x2418 /* Ba calibration register 32bit */
40*4882a593Smuzhiyun #define MLX90632_EE_Bb 0x241a /* Bb calibration register 32bit */
41*4882a593Smuzhiyun #define MLX90632_EE_Ca 0x241c /* Ca calibration register 32bit */
42*4882a593Smuzhiyun #define MLX90632_EE_Cb 0x241e /* Cb calibration register 32bit */
43*4882a593Smuzhiyun #define MLX90632_EE_Da 0x2420 /* Da calibration register 32bit */
44*4882a593Smuzhiyun #define MLX90632_EE_Db 0x2422 /* Db calibration register 32bit */
45*4882a593Smuzhiyun #define MLX90632_EE_Ea 0x2424 /* Ea calibration register 32bit */
46*4882a593Smuzhiyun #define MLX90632_EE_Eb 0x2426 /* Eb calibration register 32bit */
47*4882a593Smuzhiyun #define MLX90632_EE_Fa 0x2428 /* Fa calibration register 32bit */
48*4882a593Smuzhiyun #define MLX90632_EE_Fb 0x242a /* Fb calibration register 32bit */
49*4882a593Smuzhiyun #define MLX90632_EE_Ga 0x242c /* Ga calibration register 32bit */
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define MLX90632_EE_Gb 0x242e /* Gb calibration register 16bit */
52*4882a593Smuzhiyun #define MLX90632_EE_Ka 0x242f /* Ka calibration register 16bit */
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define MLX90632_EE_Ha 0x2481 /* Ha customer calib value reg 16bit */
55*4882a593Smuzhiyun #define MLX90632_EE_Hb 0x2482 /* Hb customer calib value reg 16bit */
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* Register addresses - volatile */
58*4882a593Smuzhiyun #define MLX90632_REG_I2C_ADDR 0x3000 /* Chip I2C address register */
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Control register address - volatile */
61*4882a593Smuzhiyun #define MLX90632_REG_CONTROL 0x3001 /* Control Register address */
62*4882a593Smuzhiyun #define MLX90632_CFG_PWR_MASK GENMASK(2, 1) /* PowerMode Mask */
63*4882a593Smuzhiyun #define MLX90632_CFG_MTYP_MASK GENMASK(8, 4) /* Meas select Mask */
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* PowerModes statuses */
66*4882a593Smuzhiyun #define MLX90632_PWR_STATUS(ctrl_val) (ctrl_val << 1)
67*4882a593Smuzhiyun #define MLX90632_PWR_STATUS_HALT MLX90632_PWR_STATUS(0) /* hold */
68*4882a593Smuzhiyun #define MLX90632_PWR_STATUS_SLEEP_STEP MLX90632_PWR_STATUS(1) /* sleep step*/
69*4882a593Smuzhiyun #define MLX90632_PWR_STATUS_STEP MLX90632_PWR_STATUS(2) /* step */
70*4882a593Smuzhiyun #define MLX90632_PWR_STATUS_CONTINUOUS MLX90632_PWR_STATUS(3) /* continuous*/
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* Measurement types */
73*4882a593Smuzhiyun #define MLX90632_MTYP_MEDICAL 0
74*4882a593Smuzhiyun #define MLX90632_MTYP_EXTENDED 17
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* Measurement type select*/
77*4882a593Smuzhiyun #define MLX90632_MTYP_STATUS(ctrl_val) (ctrl_val << 4)
78*4882a593Smuzhiyun #define MLX90632_MTYP_STATUS_MEDICAL MLX90632_MTYP_STATUS(MLX90632_MTYP_MEDICAL)
79*4882a593Smuzhiyun #define MLX90632_MTYP_STATUS_EXTENDED MLX90632_MTYP_STATUS(MLX90632_MTYP_EXTENDED)
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* I2C command register - volatile */
82*4882a593Smuzhiyun #define MLX90632_REG_I2C_CMD 0x3005 /* I2C command Register address */
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* Device status register - volatile */
85*4882a593Smuzhiyun #define MLX90632_REG_STATUS 0x3fff /* Device status register */
86*4882a593Smuzhiyun #define MLX90632_STAT_BUSY BIT(10) /* Device busy indicator */
87*4882a593Smuzhiyun #define MLX90632_STAT_EE_BUSY BIT(9) /* EEPROM busy indicator */
88*4882a593Smuzhiyun #define MLX90632_STAT_BRST BIT(8) /* Brown out reset indicator */
89*4882a593Smuzhiyun #define MLX90632_STAT_CYCLE_POS GENMASK(6, 2) /* Data position */
90*4882a593Smuzhiyun #define MLX90632_STAT_DATA_RDY BIT(0) /* Data ready indicator */
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* RAM_MEAS address-es for each channel */
93*4882a593Smuzhiyun #define MLX90632_RAM_1(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num)
94*4882a593Smuzhiyun #define MLX90632_RAM_2(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num + 1)
95*4882a593Smuzhiyun #define MLX90632_RAM_3(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num + 2)
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* Name important RAM_MEAS channels */
98*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_AMBIENT_1 MLX90632_RAM_3(17)
99*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_AMBIENT_2 MLX90632_RAM_3(18)
100*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_OBJECT_1 MLX90632_RAM_1(17)
101*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_OBJECT_2 MLX90632_RAM_2(17)
102*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_OBJECT_3 MLX90632_RAM_1(18)
103*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_OBJECT_4 MLX90632_RAM_2(18)
104*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_OBJECT_5 MLX90632_RAM_1(19)
105*4882a593Smuzhiyun #define MLX90632_RAM_DSP5_EXTENDED_OBJECT_6 MLX90632_RAM_2(19)
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Magic constants */
108*4882a593Smuzhiyun #define MLX90632_ID_MEDICAL 0x0105 /* EEPROM DSPv5 Medical device id */
109*4882a593Smuzhiyun #define MLX90632_ID_CONSUMER 0x0205 /* EEPROM DSPv5 Consumer device id */
110*4882a593Smuzhiyun #define MLX90632_ID_EXTENDED 0x0505 /* EEPROM DSPv5 Extended range device id */
111*4882a593Smuzhiyun #define MLX90632_ID_MASK GENMASK(14, 0) /* DSP version and device ID in EE_VERSION */
112*4882a593Smuzhiyun #define MLX90632_DSP_VERSION 5 /* DSP version */
113*4882a593Smuzhiyun #define MLX90632_DSP_MASK GENMASK(7, 0) /* DSP version in EE_VERSION */
114*4882a593Smuzhiyun #define MLX90632_RESET_CMD 0x0006 /* Reset sensor (address or global) */
115*4882a593Smuzhiyun #define MLX90632_REF_12 12LL /* ResCtrlRef value of Ch 1 or Ch 2 */
116*4882a593Smuzhiyun #define MLX90632_REF_3 12LL /* ResCtrlRef value of Channel 3 */
117*4882a593Smuzhiyun #define MLX90632_MAX_MEAS_NUM 31 /* Maximum measurements in list */
118*4882a593Smuzhiyun #define MLX90632_SLEEP_DELAY_MS 3000 /* Autosleep delay */
119*4882a593Smuzhiyun #define MLX90632_EXTENDED_LIMIT 27000 /* Extended mode raw value limit */
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /**
122*4882a593Smuzhiyun * struct mlx90632_data - private data for the MLX90632 device
123*4882a593Smuzhiyun * @client: I2C client of the device
124*4882a593Smuzhiyun * @lock: Internal mutex for multiple reads for single measurement
125*4882a593Smuzhiyun * @regmap: Regmap of the device
126*4882a593Smuzhiyun * @emissivity: Object emissivity from 0 to 1000 where 1000 = 1.
127*4882a593Smuzhiyun * @mtyp: Measurement type physical sensor configuration for extended range
128*4882a593Smuzhiyun * calculations
129*4882a593Smuzhiyun * @object_ambient_temperature: Ambient temperature at object (might differ of
130*4882a593Smuzhiyun * the ambient temperature of sensor.
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun struct mlx90632_data {
133*4882a593Smuzhiyun struct i2c_client *client;
134*4882a593Smuzhiyun struct mutex lock;
135*4882a593Smuzhiyun struct regmap *regmap;
136*4882a593Smuzhiyun u16 emissivity;
137*4882a593Smuzhiyun u8 mtyp;
138*4882a593Smuzhiyun u32 object_ambient_temperature;
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun static const struct regmap_range mlx90632_volatile_reg_range[] = {
142*4882a593Smuzhiyun regmap_reg_range(MLX90632_REG_I2C_ADDR, MLX90632_REG_CONTROL),
143*4882a593Smuzhiyun regmap_reg_range(MLX90632_REG_I2C_CMD, MLX90632_REG_I2C_CMD),
144*4882a593Smuzhiyun regmap_reg_range(MLX90632_REG_STATUS, MLX90632_REG_STATUS),
145*4882a593Smuzhiyun regmap_reg_range(MLX90632_RAM_1(0),
146*4882a593Smuzhiyun MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun static const struct regmap_access_table mlx90632_volatile_regs_tbl = {
150*4882a593Smuzhiyun .yes_ranges = mlx90632_volatile_reg_range,
151*4882a593Smuzhiyun .n_yes_ranges = ARRAY_SIZE(mlx90632_volatile_reg_range),
152*4882a593Smuzhiyun };
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun static const struct regmap_range mlx90632_read_reg_range[] = {
155*4882a593Smuzhiyun regmap_reg_range(MLX90632_EE_VERSION, MLX90632_EE_Ka),
156*4882a593Smuzhiyun regmap_reg_range(MLX90632_EE_CTRL, MLX90632_EE_I2C_ADDR),
157*4882a593Smuzhiyun regmap_reg_range(MLX90632_EE_Ha, MLX90632_EE_Hb),
158*4882a593Smuzhiyun regmap_reg_range(MLX90632_REG_I2C_ADDR, MLX90632_REG_CONTROL),
159*4882a593Smuzhiyun regmap_reg_range(MLX90632_REG_I2C_CMD, MLX90632_REG_I2C_CMD),
160*4882a593Smuzhiyun regmap_reg_range(MLX90632_REG_STATUS, MLX90632_REG_STATUS),
161*4882a593Smuzhiyun regmap_reg_range(MLX90632_RAM_1(0),
162*4882a593Smuzhiyun MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun static const struct regmap_access_table mlx90632_readable_regs_tbl = {
166*4882a593Smuzhiyun .yes_ranges = mlx90632_read_reg_range,
167*4882a593Smuzhiyun .n_yes_ranges = ARRAY_SIZE(mlx90632_read_reg_range),
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun static const struct regmap_range mlx90632_no_write_reg_range[] = {
171*4882a593Smuzhiyun regmap_reg_range(MLX90632_EE_VERSION, MLX90632_EE_Ka),
172*4882a593Smuzhiyun regmap_reg_range(MLX90632_RAM_1(0),
173*4882a593Smuzhiyun MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun static const struct regmap_access_table mlx90632_writeable_regs_tbl = {
177*4882a593Smuzhiyun .no_ranges = mlx90632_no_write_reg_range,
178*4882a593Smuzhiyun .n_no_ranges = ARRAY_SIZE(mlx90632_no_write_reg_range),
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static const struct regmap_config mlx90632_regmap = {
182*4882a593Smuzhiyun .reg_bits = 16,
183*4882a593Smuzhiyun .val_bits = 16,
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun .volatile_table = &mlx90632_volatile_regs_tbl,
186*4882a593Smuzhiyun .rd_table = &mlx90632_readable_regs_tbl,
187*4882a593Smuzhiyun .wr_table = &mlx90632_writeable_regs_tbl,
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun .use_single_read = true,
190*4882a593Smuzhiyun .use_single_write = true,
191*4882a593Smuzhiyun .reg_format_endian = REGMAP_ENDIAN_BIG,
192*4882a593Smuzhiyun .val_format_endian = REGMAP_ENDIAN_BIG,
193*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
mlx90632_pwr_set_sleep_step(struct regmap * regmap)196*4882a593Smuzhiyun static s32 mlx90632_pwr_set_sleep_step(struct regmap *regmap)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun return regmap_update_bits(regmap, MLX90632_REG_CONTROL,
199*4882a593Smuzhiyun MLX90632_CFG_PWR_MASK,
200*4882a593Smuzhiyun MLX90632_PWR_STATUS_SLEEP_STEP);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
mlx90632_pwr_continuous(struct regmap * regmap)203*4882a593Smuzhiyun static s32 mlx90632_pwr_continuous(struct regmap *regmap)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun return regmap_update_bits(regmap, MLX90632_REG_CONTROL,
206*4882a593Smuzhiyun MLX90632_CFG_PWR_MASK,
207*4882a593Smuzhiyun MLX90632_PWR_STATUS_CONTINUOUS);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /**
211*4882a593Smuzhiyun * mlx90632_perform_measurement() - Trigger and retrieve current measurement cycle
212*4882a593Smuzhiyun * @data: pointer to mlx90632_data object containing regmap information
213*4882a593Smuzhiyun *
214*4882a593Smuzhiyun * Perform a measurement and return latest measurement cycle position reported
215*4882a593Smuzhiyun * by sensor. This is a blocking function for 500ms, as that is default sensor
216*4882a593Smuzhiyun * refresh rate.
217*4882a593Smuzhiyun */
mlx90632_perform_measurement(struct mlx90632_data * data)218*4882a593Smuzhiyun static int mlx90632_perform_measurement(struct mlx90632_data *data)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun unsigned int reg_status;
221*4882a593Smuzhiyun int ret;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun ret = regmap_update_bits(data->regmap, MLX90632_REG_STATUS,
224*4882a593Smuzhiyun MLX90632_STAT_DATA_RDY, 0);
225*4882a593Smuzhiyun if (ret < 0)
226*4882a593Smuzhiyun return ret;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun ret = regmap_read_poll_timeout(data->regmap, MLX90632_REG_STATUS, reg_status,
229*4882a593Smuzhiyun !(reg_status & MLX90632_STAT_DATA_RDY), 10000,
230*4882a593Smuzhiyun 100 * 10000);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (ret < 0) {
233*4882a593Smuzhiyun dev_err(&data->client->dev, "data not ready");
234*4882a593Smuzhiyun return -ETIMEDOUT;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun return (reg_status & MLX90632_STAT_CYCLE_POS) >> 2;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
mlx90632_set_meas_type(struct regmap * regmap,u8 type)240*4882a593Smuzhiyun static int mlx90632_set_meas_type(struct regmap *regmap, u8 type)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun int ret;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun if ((type != MLX90632_MTYP_MEDICAL) && (type != MLX90632_MTYP_EXTENDED))
245*4882a593Smuzhiyun return -EINVAL;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun ret = regmap_write(regmap, MLX90632_REG_I2C_CMD, MLX90632_RESET_CMD);
248*4882a593Smuzhiyun if (ret < 0)
249*4882a593Smuzhiyun return ret;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun * Give the mlx90632 some time to reset properly before sending a new I2C command
253*4882a593Smuzhiyun * if this is not done, the following I2C command(s) will not be accepted.
254*4882a593Smuzhiyun */
255*4882a593Smuzhiyun usleep_range(150, 200);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun ret = regmap_write_bits(regmap, MLX90632_REG_CONTROL,
258*4882a593Smuzhiyun (MLX90632_CFG_MTYP_MASK | MLX90632_CFG_PWR_MASK),
259*4882a593Smuzhiyun (MLX90632_MTYP_STATUS(type) | MLX90632_PWR_STATUS_HALT));
260*4882a593Smuzhiyun if (ret < 0)
261*4882a593Smuzhiyun return ret;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun return mlx90632_pwr_continuous(regmap);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
mlx90632_channel_new_select(int perform_ret,uint8_t * channel_new,uint8_t * channel_old)266*4882a593Smuzhiyun static int mlx90632_channel_new_select(int perform_ret, uint8_t *channel_new,
267*4882a593Smuzhiyun uint8_t *channel_old)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun switch (perform_ret) {
270*4882a593Smuzhiyun case 1:
271*4882a593Smuzhiyun *channel_new = 1;
272*4882a593Smuzhiyun *channel_old = 2;
273*4882a593Smuzhiyun break;
274*4882a593Smuzhiyun case 2:
275*4882a593Smuzhiyun *channel_new = 2;
276*4882a593Smuzhiyun *channel_old = 1;
277*4882a593Smuzhiyun break;
278*4882a593Smuzhiyun default:
279*4882a593Smuzhiyun return -EINVAL;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
mlx90632_read_ambient_raw(struct regmap * regmap,s16 * ambient_new_raw,s16 * ambient_old_raw)285*4882a593Smuzhiyun static int mlx90632_read_ambient_raw(struct regmap *regmap,
286*4882a593Smuzhiyun s16 *ambient_new_raw, s16 *ambient_old_raw)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun int ret;
289*4882a593Smuzhiyun unsigned int read_tmp;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_3(1), &read_tmp);
292*4882a593Smuzhiyun if (ret < 0)
293*4882a593Smuzhiyun return ret;
294*4882a593Smuzhiyun *ambient_new_raw = (s16)read_tmp;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_3(2), &read_tmp);
297*4882a593Smuzhiyun if (ret < 0)
298*4882a593Smuzhiyun return ret;
299*4882a593Smuzhiyun *ambient_old_raw = (s16)read_tmp;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun return ret;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
mlx90632_read_object_raw(struct regmap * regmap,int perform_measurement_ret,s16 * object_new_raw,s16 * object_old_raw)304*4882a593Smuzhiyun static int mlx90632_read_object_raw(struct regmap *regmap,
305*4882a593Smuzhiyun int perform_measurement_ret,
306*4882a593Smuzhiyun s16 *object_new_raw, s16 *object_old_raw)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun int ret;
309*4882a593Smuzhiyun unsigned int read_tmp;
310*4882a593Smuzhiyun s16 read;
311*4882a593Smuzhiyun u8 channel = 0;
312*4882a593Smuzhiyun u8 channel_old = 0;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun ret = mlx90632_channel_new_select(perform_measurement_ret, &channel,
315*4882a593Smuzhiyun &channel_old);
316*4882a593Smuzhiyun if (ret != 0)
317*4882a593Smuzhiyun return ret;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_2(channel), &read_tmp);
320*4882a593Smuzhiyun if (ret < 0)
321*4882a593Smuzhiyun return ret;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun read = (s16)read_tmp;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_1(channel), &read_tmp);
326*4882a593Smuzhiyun if (ret < 0)
327*4882a593Smuzhiyun return ret;
328*4882a593Smuzhiyun *object_new_raw = (read + (s16)read_tmp) / 2;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_2(channel_old), &read_tmp);
331*4882a593Smuzhiyun if (ret < 0)
332*4882a593Smuzhiyun return ret;
333*4882a593Smuzhiyun read = (s16)read_tmp;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_1(channel_old), &read_tmp);
336*4882a593Smuzhiyun if (ret < 0)
337*4882a593Smuzhiyun return ret;
338*4882a593Smuzhiyun *object_old_raw = (read + (s16)read_tmp) / 2;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun return ret;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
mlx90632_read_all_channel(struct mlx90632_data * data,s16 * ambient_new_raw,s16 * ambient_old_raw,s16 * object_new_raw,s16 * object_old_raw)343*4882a593Smuzhiyun static int mlx90632_read_all_channel(struct mlx90632_data *data,
344*4882a593Smuzhiyun s16 *ambient_new_raw, s16 *ambient_old_raw,
345*4882a593Smuzhiyun s16 *object_new_raw, s16 *object_old_raw)
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun s32 ret, measurement;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun mutex_lock(&data->lock);
350*4882a593Smuzhiyun measurement = mlx90632_perform_measurement(data);
351*4882a593Smuzhiyun if (measurement < 0) {
352*4882a593Smuzhiyun ret = measurement;
353*4882a593Smuzhiyun goto read_unlock;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun ret = mlx90632_read_ambient_raw(data->regmap, ambient_new_raw,
356*4882a593Smuzhiyun ambient_old_raw);
357*4882a593Smuzhiyun if (ret < 0)
358*4882a593Smuzhiyun goto read_unlock;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun ret = mlx90632_read_object_raw(data->regmap, measurement,
361*4882a593Smuzhiyun object_new_raw, object_old_raw);
362*4882a593Smuzhiyun read_unlock:
363*4882a593Smuzhiyun mutex_unlock(&data->lock);
364*4882a593Smuzhiyun return ret;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
mlx90632_read_ambient_raw_extended(struct regmap * regmap,s16 * ambient_new_raw,s16 * ambient_old_raw)367*4882a593Smuzhiyun static int mlx90632_read_ambient_raw_extended(struct regmap *regmap,
368*4882a593Smuzhiyun s16 *ambient_new_raw, s16 *ambient_old_raw)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun unsigned int read_tmp;
371*4882a593Smuzhiyun int ret;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_AMBIENT_1, &read_tmp);
374*4882a593Smuzhiyun if (ret < 0)
375*4882a593Smuzhiyun return ret;
376*4882a593Smuzhiyun *ambient_new_raw = (s16)read_tmp;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_AMBIENT_2, &read_tmp);
379*4882a593Smuzhiyun if (ret < 0)
380*4882a593Smuzhiyun return ret;
381*4882a593Smuzhiyun *ambient_old_raw = (s16)read_tmp;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun return 0;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
mlx90632_read_object_raw_extended(struct regmap * regmap,s16 * object_new_raw)386*4882a593Smuzhiyun static int mlx90632_read_object_raw_extended(struct regmap *regmap, s16 *object_new_raw)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun unsigned int read_tmp;
389*4882a593Smuzhiyun s32 read;
390*4882a593Smuzhiyun int ret;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_1, &read_tmp);
393*4882a593Smuzhiyun if (ret < 0)
394*4882a593Smuzhiyun return ret;
395*4882a593Smuzhiyun read = (s16)read_tmp;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_2, &read_tmp);
398*4882a593Smuzhiyun if (ret < 0)
399*4882a593Smuzhiyun return ret;
400*4882a593Smuzhiyun read = read - (s16)read_tmp;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_3, &read_tmp);
403*4882a593Smuzhiyun if (ret < 0)
404*4882a593Smuzhiyun return ret;
405*4882a593Smuzhiyun read = read - (s16)read_tmp;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_4, &read_tmp);
408*4882a593Smuzhiyun if (ret < 0)
409*4882a593Smuzhiyun return ret;
410*4882a593Smuzhiyun read = (read + (s16)read_tmp) / 2;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_5, &read_tmp);
413*4882a593Smuzhiyun if (ret < 0)
414*4882a593Smuzhiyun return ret;
415*4882a593Smuzhiyun read = read + (s16)read_tmp;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_6, &read_tmp);
418*4882a593Smuzhiyun if (ret < 0)
419*4882a593Smuzhiyun return ret;
420*4882a593Smuzhiyun read = read + (s16)read_tmp;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun if (read > S16_MAX || read < S16_MIN)
423*4882a593Smuzhiyun return -ERANGE;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun *object_new_raw = read;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun return 0;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun
mlx90632_read_all_channel_extended(struct mlx90632_data * data,s16 * object_new_raw,s16 * ambient_new_raw,s16 * ambient_old_raw)430*4882a593Smuzhiyun static int mlx90632_read_all_channel_extended(struct mlx90632_data *data, s16 *object_new_raw,
431*4882a593Smuzhiyun s16 *ambient_new_raw, s16 *ambient_old_raw)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun s32 ret, meas;
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun mutex_lock(&data->lock);
436*4882a593Smuzhiyun ret = mlx90632_set_meas_type(data->regmap, MLX90632_MTYP_EXTENDED);
437*4882a593Smuzhiyun if (ret < 0)
438*4882a593Smuzhiyun goto read_unlock;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun ret = read_poll_timeout(mlx90632_perform_measurement, meas, meas == 19,
441*4882a593Smuzhiyun 50000, 800000, false, data);
442*4882a593Smuzhiyun if (ret != 0)
443*4882a593Smuzhiyun goto read_unlock;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun ret = mlx90632_read_object_raw_extended(data->regmap, object_new_raw);
446*4882a593Smuzhiyun if (ret < 0)
447*4882a593Smuzhiyun goto read_unlock;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun ret = mlx90632_read_ambient_raw_extended(data->regmap, ambient_new_raw, ambient_old_raw);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun read_unlock:
452*4882a593Smuzhiyun (void) mlx90632_set_meas_type(data->regmap, MLX90632_MTYP_MEDICAL);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun mutex_unlock(&data->lock);
455*4882a593Smuzhiyun return ret;
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun
mlx90632_read_ee_register(struct regmap * regmap,u16 reg_lsb,s32 * reg_value)458*4882a593Smuzhiyun static int mlx90632_read_ee_register(struct regmap *regmap, u16 reg_lsb,
459*4882a593Smuzhiyun s32 *reg_value)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun s32 ret;
462*4882a593Smuzhiyun unsigned int read;
463*4882a593Smuzhiyun u32 value;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun ret = regmap_read(regmap, reg_lsb, &read);
466*4882a593Smuzhiyun if (ret < 0)
467*4882a593Smuzhiyun return ret;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun value = read;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun ret = regmap_read(regmap, reg_lsb + 1, &read);
472*4882a593Smuzhiyun if (ret < 0)
473*4882a593Smuzhiyun return ret;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun *reg_value = (read << 16) | (value & 0xffff);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun return 0;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
mlx90632_preprocess_temp_amb(s16 ambient_new_raw,s16 ambient_old_raw,s16 Gb)480*4882a593Smuzhiyun static s64 mlx90632_preprocess_temp_amb(s16 ambient_new_raw,
481*4882a593Smuzhiyun s16 ambient_old_raw, s16 Gb)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun s64 VR_Ta, kGb, tmp;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun kGb = ((s64)Gb * 1000LL) >> 10ULL;
486*4882a593Smuzhiyun VR_Ta = (s64)ambient_old_raw * 1000000LL +
487*4882a593Smuzhiyun kGb * div64_s64(((s64)ambient_new_raw * 1000LL),
488*4882a593Smuzhiyun (MLX90632_REF_3));
489*4882a593Smuzhiyun tmp = div64_s64(
490*4882a593Smuzhiyun div64_s64(((s64)ambient_new_raw * 1000000000000LL),
491*4882a593Smuzhiyun (MLX90632_REF_3)), VR_Ta);
492*4882a593Smuzhiyun return div64_s64(tmp << 19ULL, 1000LL);
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
mlx90632_preprocess_temp_obj(s16 object_new_raw,s16 object_old_raw,s16 ambient_new_raw,s16 ambient_old_raw,s16 Ka)495*4882a593Smuzhiyun static s64 mlx90632_preprocess_temp_obj(s16 object_new_raw, s16 object_old_raw,
496*4882a593Smuzhiyun s16 ambient_new_raw,
497*4882a593Smuzhiyun s16 ambient_old_raw, s16 Ka)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun s64 VR_IR, kKa, tmp;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun kKa = ((s64)Ka * 1000LL) >> 10ULL;
502*4882a593Smuzhiyun VR_IR = (s64)ambient_old_raw * 1000000LL +
503*4882a593Smuzhiyun kKa * div64_s64(((s64)ambient_new_raw * 1000LL),
504*4882a593Smuzhiyun (MLX90632_REF_3));
505*4882a593Smuzhiyun tmp = div64_s64(
506*4882a593Smuzhiyun div64_s64(((s64)((object_new_raw + object_old_raw) / 2)
507*4882a593Smuzhiyun * 1000000000000LL), (MLX90632_REF_12)),
508*4882a593Smuzhiyun VR_IR);
509*4882a593Smuzhiyun return div64_s64((tmp << 19ULL), 1000LL);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun
mlx90632_preprocess_temp_obj_extended(s16 object_new_raw,s16 ambient_new_raw,s16 ambient_old_raw,s16 Ka)512*4882a593Smuzhiyun static s64 mlx90632_preprocess_temp_obj_extended(s16 object_new_raw, s16 ambient_new_raw,
513*4882a593Smuzhiyun s16 ambient_old_raw, s16 Ka)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun s64 VR_IR, kKa, tmp;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun kKa = ((s64)Ka * 1000LL) >> 10ULL;
518*4882a593Smuzhiyun VR_IR = (s64)ambient_old_raw * 1000000LL +
519*4882a593Smuzhiyun kKa * div64_s64((s64)ambient_new_raw * 1000LL,
520*4882a593Smuzhiyun MLX90632_REF_3);
521*4882a593Smuzhiyun tmp = div64_s64(
522*4882a593Smuzhiyun div64_s64((s64) object_new_raw * 1000000000000LL, MLX90632_REF_12),
523*4882a593Smuzhiyun VR_IR);
524*4882a593Smuzhiyun return div64_s64(tmp << 19ULL, 1000LL);
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
mlx90632_calc_temp_ambient(s16 ambient_new_raw,s16 ambient_old_raw,s32 P_T,s32 P_R,s32 P_G,s32 P_O,s16 Gb)527*4882a593Smuzhiyun static s32 mlx90632_calc_temp_ambient(s16 ambient_new_raw, s16 ambient_old_raw,
528*4882a593Smuzhiyun s32 P_T, s32 P_R, s32 P_G, s32 P_O, s16 Gb)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun s64 Asub, Bsub, Ablock, Bblock, Cblock, AMB, sum;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun AMB = mlx90632_preprocess_temp_amb(ambient_new_raw, ambient_old_raw,
533*4882a593Smuzhiyun Gb);
534*4882a593Smuzhiyun Asub = ((s64)P_T * 10000000000LL) >> 44ULL;
535*4882a593Smuzhiyun Bsub = AMB - (((s64)P_R * 1000LL) >> 8ULL);
536*4882a593Smuzhiyun Ablock = Asub * (Bsub * Bsub);
537*4882a593Smuzhiyun Bblock = (div64_s64(Bsub * 10000000LL, P_G)) << 20ULL;
538*4882a593Smuzhiyun Cblock = ((s64)P_O * 10000000000LL) >> 8ULL;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun sum = div64_s64(Ablock, 1000000LL) + Bblock + Cblock;
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun return div64_s64(sum, 10000000LL);
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun
mlx90632_calc_temp_object_iteration(s32 prev_object_temp,s64 object,s64 TAdut,s64 TAdut4,s32 Fa,s32 Fb,s32 Ga,s16 Ha,s16 Hb,u16 emissivity)545*4882a593Smuzhiyun static s32 mlx90632_calc_temp_object_iteration(s32 prev_object_temp, s64 object,
546*4882a593Smuzhiyun s64 TAdut, s64 TAdut4, s32 Fa, s32 Fb,
547*4882a593Smuzhiyun s32 Ga, s16 Ha, s16 Hb,
548*4882a593Smuzhiyun u16 emissivity)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun s64 calcedKsTO, calcedKsTA, ir_Alpha, Alpha_corr;
551*4882a593Smuzhiyun s64 Ha_customer, Hb_customer;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun Ha_customer = ((s64)Ha * 1000000LL) >> 14ULL;
554*4882a593Smuzhiyun Hb_customer = ((s64)Hb * 100) >> 10ULL;
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun calcedKsTO = ((s64)((s64)Ga * (prev_object_temp - 25 * 1000LL)
557*4882a593Smuzhiyun * 1000LL)) >> 36LL;
558*4882a593Smuzhiyun calcedKsTA = ((s64)(Fb * (TAdut - 25 * 1000000LL))) >> 36LL;
559*4882a593Smuzhiyun Alpha_corr = div64_s64((((s64)(Fa * 10000000000LL) >> 46LL)
560*4882a593Smuzhiyun * Ha_customer), 1000LL);
561*4882a593Smuzhiyun Alpha_corr *= ((s64)(1 * 1000000LL + calcedKsTO + calcedKsTA));
562*4882a593Smuzhiyun Alpha_corr = emissivity * div64_s64(Alpha_corr, 100000LL);
563*4882a593Smuzhiyun Alpha_corr = div64_s64(Alpha_corr, 1000LL);
564*4882a593Smuzhiyun ir_Alpha = div64_s64((s64)object * 10000000LL, Alpha_corr);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun return (int_sqrt64(int_sqrt64(ir_Alpha * 1000000000000LL + TAdut4))
567*4882a593Smuzhiyun - 27315 - Hb_customer) * 10;
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
mlx90632_calc_ta4(s64 TAdut,s64 scale)570*4882a593Smuzhiyun static s64 mlx90632_calc_ta4(s64 TAdut, s64 scale)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun return (div64_s64(TAdut, scale) + 27315) *
573*4882a593Smuzhiyun (div64_s64(TAdut, scale) + 27315) *
574*4882a593Smuzhiyun (div64_s64(TAdut, scale) + 27315) *
575*4882a593Smuzhiyun (div64_s64(TAdut, scale) + 27315);
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
mlx90632_calc_temp_object(s64 object,s64 ambient,s32 Ea,s32 Eb,s32 Fa,s32 Fb,s32 Ga,s16 Ha,s16 Hb,u16 tmp_emi)578*4882a593Smuzhiyun static s32 mlx90632_calc_temp_object(s64 object, s64 ambient, s32 Ea, s32 Eb,
579*4882a593Smuzhiyun s32 Fa, s32 Fb, s32 Ga, s16 Ha, s16 Hb,
580*4882a593Smuzhiyun u16 tmp_emi)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun s64 kTA, kTA0, TAdut, TAdut4;
583*4882a593Smuzhiyun s64 temp = 25000;
584*4882a593Smuzhiyun s8 i;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun kTA = (Ea * 1000LL) >> 16LL;
587*4882a593Smuzhiyun kTA0 = (Eb * 1000LL) >> 8LL;
588*4882a593Smuzhiyun TAdut = div64_s64(((ambient - kTA0) * 1000000LL), kTA) + 25 * 1000000LL;
589*4882a593Smuzhiyun TAdut4 = mlx90632_calc_ta4(TAdut, 10000LL);
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun /* Iterations of calculation as described in datasheet */
592*4882a593Smuzhiyun for (i = 0; i < 5; ++i) {
593*4882a593Smuzhiyun temp = mlx90632_calc_temp_object_iteration(temp, object, TAdut, TAdut4,
594*4882a593Smuzhiyun Fa, Fb, Ga, Ha, Hb,
595*4882a593Smuzhiyun tmp_emi);
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun return temp;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
mlx90632_calc_temp_object_extended(s64 object,s64 ambient,s64 reflected,s32 Ea,s32 Eb,s32 Fa,s32 Fb,s32 Ga,s16 Ha,s16 Hb,u16 tmp_emi)600*4882a593Smuzhiyun static s32 mlx90632_calc_temp_object_extended(s64 object, s64 ambient, s64 reflected,
601*4882a593Smuzhiyun s32 Ea, s32 Eb, s32 Fa, s32 Fb, s32 Ga,
602*4882a593Smuzhiyun s16 Ha, s16 Hb, u16 tmp_emi)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun s64 kTA, kTA0, TAdut, TAdut4, Tr4, TaTr4;
605*4882a593Smuzhiyun s64 temp = 25000;
606*4882a593Smuzhiyun s8 i;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun kTA = (Ea * 1000LL) >> 16LL;
609*4882a593Smuzhiyun kTA0 = (Eb * 1000LL) >> 8LL;
610*4882a593Smuzhiyun TAdut = div64_s64((ambient - kTA0) * 1000000LL, kTA) + 25 * 1000000LL;
611*4882a593Smuzhiyun Tr4 = mlx90632_calc_ta4(reflected, 10);
612*4882a593Smuzhiyun TAdut4 = mlx90632_calc_ta4(TAdut, 10000LL);
613*4882a593Smuzhiyun TaTr4 = Tr4 - div64_s64(Tr4 - TAdut4, tmp_emi) * 1000;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun /* Iterations of calculation as described in datasheet */
616*4882a593Smuzhiyun for (i = 0; i < 5; ++i) {
617*4882a593Smuzhiyun temp = mlx90632_calc_temp_object_iteration(temp, object, TAdut, TaTr4,
618*4882a593Smuzhiyun Fa / 2, Fb, Ga, Ha, Hb,
619*4882a593Smuzhiyun tmp_emi);
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun return temp;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
mlx90632_calc_object_dsp105(struct mlx90632_data * data,int * val)625*4882a593Smuzhiyun static int mlx90632_calc_object_dsp105(struct mlx90632_data *data, int *val)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun s32 ret;
628*4882a593Smuzhiyun s32 Ea, Eb, Fa, Fb, Ga;
629*4882a593Smuzhiyun unsigned int read_tmp;
630*4882a593Smuzhiyun s16 Ha, Hb, Gb, Ka;
631*4882a593Smuzhiyun s16 ambient_new_raw, ambient_old_raw, object_new_raw, object_old_raw;
632*4882a593Smuzhiyun s64 object, ambient;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_Ea, &Ea);
635*4882a593Smuzhiyun if (ret < 0)
636*4882a593Smuzhiyun return ret;
637*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_Eb, &Eb);
638*4882a593Smuzhiyun if (ret < 0)
639*4882a593Smuzhiyun return ret;
640*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_Fa, &Fa);
641*4882a593Smuzhiyun if (ret < 0)
642*4882a593Smuzhiyun return ret;
643*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_Fb, &Fb);
644*4882a593Smuzhiyun if (ret < 0)
645*4882a593Smuzhiyun return ret;
646*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_Ga, &Ga);
647*4882a593Smuzhiyun if (ret < 0)
648*4882a593Smuzhiyun return ret;
649*4882a593Smuzhiyun ret = regmap_read(data->regmap, MLX90632_EE_Ha, &read_tmp);
650*4882a593Smuzhiyun if (ret < 0)
651*4882a593Smuzhiyun return ret;
652*4882a593Smuzhiyun Ha = (s16)read_tmp;
653*4882a593Smuzhiyun ret = regmap_read(data->regmap, MLX90632_EE_Hb, &read_tmp);
654*4882a593Smuzhiyun if (ret < 0)
655*4882a593Smuzhiyun return ret;
656*4882a593Smuzhiyun Hb = (s16)read_tmp;
657*4882a593Smuzhiyun ret = regmap_read(data->regmap, MLX90632_EE_Gb, &read_tmp);
658*4882a593Smuzhiyun if (ret < 0)
659*4882a593Smuzhiyun return ret;
660*4882a593Smuzhiyun Gb = (s16)read_tmp;
661*4882a593Smuzhiyun ret = regmap_read(data->regmap, MLX90632_EE_Ka, &read_tmp);
662*4882a593Smuzhiyun if (ret < 0)
663*4882a593Smuzhiyun return ret;
664*4882a593Smuzhiyun Ka = (s16)read_tmp;
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun ret = mlx90632_read_all_channel(data,
667*4882a593Smuzhiyun &ambient_new_raw, &ambient_old_raw,
668*4882a593Smuzhiyun &object_new_raw, &object_old_raw);
669*4882a593Smuzhiyun if (ret < 0)
670*4882a593Smuzhiyun return ret;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun if (object_new_raw > MLX90632_EXTENDED_LIMIT &&
673*4882a593Smuzhiyun data->mtyp == MLX90632_MTYP_EXTENDED) {
674*4882a593Smuzhiyun ret = mlx90632_read_all_channel_extended(data, &object_new_raw,
675*4882a593Smuzhiyun &ambient_new_raw, &ambient_old_raw);
676*4882a593Smuzhiyun if (ret < 0)
677*4882a593Smuzhiyun return ret;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun /* Use extended mode calculations */
680*4882a593Smuzhiyun ambient = mlx90632_preprocess_temp_amb(ambient_new_raw,
681*4882a593Smuzhiyun ambient_old_raw, Gb);
682*4882a593Smuzhiyun object = mlx90632_preprocess_temp_obj_extended(object_new_raw,
683*4882a593Smuzhiyun ambient_new_raw,
684*4882a593Smuzhiyun ambient_old_raw, Ka);
685*4882a593Smuzhiyun *val = mlx90632_calc_temp_object_extended(object, ambient,
686*4882a593Smuzhiyun data->object_ambient_temperature,
687*4882a593Smuzhiyun Ea, Eb, Fa, Fb, Ga,
688*4882a593Smuzhiyun Ha, Hb, data->emissivity);
689*4882a593Smuzhiyun return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun ambient = mlx90632_preprocess_temp_amb(ambient_new_raw,
693*4882a593Smuzhiyun ambient_old_raw, Gb);
694*4882a593Smuzhiyun object = mlx90632_preprocess_temp_obj(object_new_raw,
695*4882a593Smuzhiyun object_old_raw,
696*4882a593Smuzhiyun ambient_new_raw,
697*4882a593Smuzhiyun ambient_old_raw, Ka);
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun *val = mlx90632_calc_temp_object(object, ambient, Ea, Eb, Fa, Fb, Ga,
700*4882a593Smuzhiyun Ha, Hb, data->emissivity);
701*4882a593Smuzhiyun return 0;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
mlx90632_calc_ambient_dsp105(struct mlx90632_data * data,int * val)704*4882a593Smuzhiyun static int mlx90632_calc_ambient_dsp105(struct mlx90632_data *data, int *val)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun s32 ret;
707*4882a593Smuzhiyun unsigned int read_tmp;
708*4882a593Smuzhiyun s32 PT, PR, PG, PO;
709*4882a593Smuzhiyun s16 Gb;
710*4882a593Smuzhiyun s16 ambient_new_raw, ambient_old_raw;
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_R, &PR);
713*4882a593Smuzhiyun if (ret < 0)
714*4882a593Smuzhiyun return ret;
715*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_G, &PG);
716*4882a593Smuzhiyun if (ret < 0)
717*4882a593Smuzhiyun return ret;
718*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_T, &PT);
719*4882a593Smuzhiyun if (ret < 0)
720*4882a593Smuzhiyun return ret;
721*4882a593Smuzhiyun ret = mlx90632_read_ee_register(data->regmap, MLX90632_EE_P_O, &PO);
722*4882a593Smuzhiyun if (ret < 0)
723*4882a593Smuzhiyun return ret;
724*4882a593Smuzhiyun ret = regmap_read(data->regmap, MLX90632_EE_Gb, &read_tmp);
725*4882a593Smuzhiyun if (ret < 0)
726*4882a593Smuzhiyun return ret;
727*4882a593Smuzhiyun Gb = (s16)read_tmp;
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun ret = mlx90632_read_ambient_raw(data->regmap, &ambient_new_raw,
730*4882a593Smuzhiyun &ambient_old_raw);
731*4882a593Smuzhiyun if (ret < 0)
732*4882a593Smuzhiyun return ret;
733*4882a593Smuzhiyun *val = mlx90632_calc_temp_ambient(ambient_new_raw, ambient_old_raw,
734*4882a593Smuzhiyun PT, PR, PG, PO, Gb);
735*4882a593Smuzhiyun return ret;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
mlx90632_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * channel,int * val,int * val2,long mask)738*4882a593Smuzhiyun static int mlx90632_read_raw(struct iio_dev *indio_dev,
739*4882a593Smuzhiyun struct iio_chan_spec const *channel, int *val,
740*4882a593Smuzhiyun int *val2, long mask)
741*4882a593Smuzhiyun {
742*4882a593Smuzhiyun struct mlx90632_data *data = iio_priv(indio_dev);
743*4882a593Smuzhiyun int ret;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun switch (mask) {
746*4882a593Smuzhiyun case IIO_CHAN_INFO_PROCESSED:
747*4882a593Smuzhiyun switch (channel->channel2) {
748*4882a593Smuzhiyun case IIO_MOD_TEMP_AMBIENT:
749*4882a593Smuzhiyun ret = mlx90632_calc_ambient_dsp105(data, val);
750*4882a593Smuzhiyun if (ret < 0)
751*4882a593Smuzhiyun return ret;
752*4882a593Smuzhiyun return IIO_VAL_INT;
753*4882a593Smuzhiyun case IIO_MOD_TEMP_OBJECT:
754*4882a593Smuzhiyun ret = mlx90632_calc_object_dsp105(data, val);
755*4882a593Smuzhiyun if (ret < 0)
756*4882a593Smuzhiyun return ret;
757*4882a593Smuzhiyun return IIO_VAL_INT;
758*4882a593Smuzhiyun default:
759*4882a593Smuzhiyun return -EINVAL;
760*4882a593Smuzhiyun }
761*4882a593Smuzhiyun case IIO_CHAN_INFO_CALIBEMISSIVITY:
762*4882a593Smuzhiyun if (data->emissivity == 1000) {
763*4882a593Smuzhiyun *val = 1;
764*4882a593Smuzhiyun *val2 = 0;
765*4882a593Smuzhiyun } else {
766*4882a593Smuzhiyun *val = 0;
767*4882a593Smuzhiyun *val2 = data->emissivity * 1000;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun return IIO_VAL_INT_PLUS_MICRO;
770*4882a593Smuzhiyun case IIO_CHAN_INFO_CALIBAMBIENT:
771*4882a593Smuzhiyun *val = data->object_ambient_temperature;
772*4882a593Smuzhiyun return IIO_VAL_INT;
773*4882a593Smuzhiyun default:
774*4882a593Smuzhiyun return -EINVAL;
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun
mlx90632_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * channel,int val,int val2,long mask)778*4882a593Smuzhiyun static int mlx90632_write_raw(struct iio_dev *indio_dev,
779*4882a593Smuzhiyun struct iio_chan_spec const *channel, int val,
780*4882a593Smuzhiyun int val2, long mask)
781*4882a593Smuzhiyun {
782*4882a593Smuzhiyun struct mlx90632_data *data = iio_priv(indio_dev);
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun switch (mask) {
785*4882a593Smuzhiyun case IIO_CHAN_INFO_CALIBEMISSIVITY:
786*4882a593Smuzhiyun /* Confirm we are within 0 and 1.0 */
787*4882a593Smuzhiyun if (val < 0 || val2 < 0 || val > 1 ||
788*4882a593Smuzhiyun (val == 1 && val2 != 0))
789*4882a593Smuzhiyun return -EINVAL;
790*4882a593Smuzhiyun data->emissivity = val * 1000 + val2 / 1000;
791*4882a593Smuzhiyun return 0;
792*4882a593Smuzhiyun case IIO_CHAN_INFO_CALIBAMBIENT:
793*4882a593Smuzhiyun data->object_ambient_temperature = val;
794*4882a593Smuzhiyun return 0;
795*4882a593Smuzhiyun default:
796*4882a593Smuzhiyun return -EINVAL;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun }
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun static const struct iio_chan_spec mlx90632_channels[] = {
801*4882a593Smuzhiyun {
802*4882a593Smuzhiyun .type = IIO_TEMP,
803*4882a593Smuzhiyun .modified = 1,
804*4882a593Smuzhiyun .channel2 = IIO_MOD_TEMP_AMBIENT,
805*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
806*4882a593Smuzhiyun },
807*4882a593Smuzhiyun {
808*4882a593Smuzhiyun .type = IIO_TEMP,
809*4882a593Smuzhiyun .modified = 1,
810*4882a593Smuzhiyun .channel2 = IIO_MOD_TEMP_OBJECT,
811*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
812*4882a593Smuzhiyun BIT(IIO_CHAN_INFO_CALIBEMISSIVITY) | BIT(IIO_CHAN_INFO_CALIBAMBIENT),
813*4882a593Smuzhiyun },
814*4882a593Smuzhiyun };
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun static const struct iio_info mlx90632_info = {
817*4882a593Smuzhiyun .read_raw = mlx90632_read_raw,
818*4882a593Smuzhiyun .write_raw = mlx90632_write_raw,
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun
mlx90632_sleep(struct mlx90632_data * data)821*4882a593Smuzhiyun static int mlx90632_sleep(struct mlx90632_data *data)
822*4882a593Smuzhiyun {
823*4882a593Smuzhiyun regcache_mark_dirty(data->regmap);
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun dev_dbg(&data->client->dev, "Requesting sleep");
826*4882a593Smuzhiyun return mlx90632_pwr_set_sleep_step(data->regmap);
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun
mlx90632_wakeup(struct mlx90632_data * data)829*4882a593Smuzhiyun static int mlx90632_wakeup(struct mlx90632_data *data)
830*4882a593Smuzhiyun {
831*4882a593Smuzhiyun int ret;
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun ret = regcache_sync(data->regmap);
834*4882a593Smuzhiyun if (ret < 0) {
835*4882a593Smuzhiyun dev_err(&data->client->dev,
836*4882a593Smuzhiyun "Failed to sync regmap registers: %d\n", ret);
837*4882a593Smuzhiyun return ret;
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun dev_dbg(&data->client->dev, "Requesting wake-up\n");
841*4882a593Smuzhiyun return mlx90632_pwr_continuous(data->regmap);
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
mlx90632_probe(struct i2c_client * client,const struct i2c_device_id * id)844*4882a593Smuzhiyun static int mlx90632_probe(struct i2c_client *client,
845*4882a593Smuzhiyun const struct i2c_device_id *id)
846*4882a593Smuzhiyun {
847*4882a593Smuzhiyun struct iio_dev *indio_dev;
848*4882a593Smuzhiyun struct mlx90632_data *mlx90632;
849*4882a593Smuzhiyun struct regmap *regmap;
850*4882a593Smuzhiyun int ret;
851*4882a593Smuzhiyun unsigned int read;
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*mlx90632));
854*4882a593Smuzhiyun if (!indio_dev) {
855*4882a593Smuzhiyun dev_err(&client->dev, "Failed to allocate device\n");
856*4882a593Smuzhiyun return -ENOMEM;
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun regmap = devm_regmap_init_i2c(client, &mlx90632_regmap);
860*4882a593Smuzhiyun if (IS_ERR(regmap)) {
861*4882a593Smuzhiyun ret = PTR_ERR(regmap);
862*4882a593Smuzhiyun dev_err(&client->dev, "Failed to allocate regmap: %d\n", ret);
863*4882a593Smuzhiyun return ret;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun mlx90632 = iio_priv(indio_dev);
867*4882a593Smuzhiyun i2c_set_clientdata(client, indio_dev);
868*4882a593Smuzhiyun mlx90632->client = client;
869*4882a593Smuzhiyun mlx90632->regmap = regmap;
870*4882a593Smuzhiyun mlx90632->mtyp = MLX90632_MTYP_MEDICAL;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun mutex_init(&mlx90632->lock);
873*4882a593Smuzhiyun indio_dev->name = id->name;
874*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
875*4882a593Smuzhiyun indio_dev->info = &mlx90632_info;
876*4882a593Smuzhiyun indio_dev->channels = mlx90632_channels;
877*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(mlx90632_channels);
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun ret = mlx90632_wakeup(mlx90632);
880*4882a593Smuzhiyun if (ret < 0) {
881*4882a593Smuzhiyun dev_err(&client->dev, "Wakeup failed: %d\n", ret);
882*4882a593Smuzhiyun return ret;
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun ret = regmap_read(mlx90632->regmap, MLX90632_EE_VERSION, &read);
886*4882a593Smuzhiyun if (ret < 0) {
887*4882a593Smuzhiyun dev_err(&client->dev, "read of version failed: %d\n", ret);
888*4882a593Smuzhiyun return ret;
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun read = read & MLX90632_ID_MASK;
891*4882a593Smuzhiyun if (read == MLX90632_ID_MEDICAL) {
892*4882a593Smuzhiyun dev_dbg(&client->dev,
893*4882a593Smuzhiyun "Detected Medical EEPROM calibration %x\n", read);
894*4882a593Smuzhiyun } else if (read == MLX90632_ID_CONSUMER) {
895*4882a593Smuzhiyun dev_dbg(&client->dev,
896*4882a593Smuzhiyun "Detected Consumer EEPROM calibration %x\n", read);
897*4882a593Smuzhiyun } else if (read == MLX90632_ID_EXTENDED) {
898*4882a593Smuzhiyun dev_dbg(&client->dev,
899*4882a593Smuzhiyun "Detected Extended range EEPROM calibration %x\n", read);
900*4882a593Smuzhiyun mlx90632->mtyp = MLX90632_MTYP_EXTENDED;
901*4882a593Smuzhiyun } else if ((read & MLX90632_DSP_MASK) == MLX90632_DSP_VERSION) {
902*4882a593Smuzhiyun dev_dbg(&client->dev,
903*4882a593Smuzhiyun "Detected Unknown EEPROM calibration %x\n", read);
904*4882a593Smuzhiyun } else {
905*4882a593Smuzhiyun dev_err(&client->dev,
906*4882a593Smuzhiyun "Wrong DSP version %x (expected %x)\n",
907*4882a593Smuzhiyun read, MLX90632_DSP_VERSION);
908*4882a593Smuzhiyun return -EPROTONOSUPPORT;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun mlx90632->emissivity = 1000;
912*4882a593Smuzhiyun mlx90632->object_ambient_temperature = 25000; /* 25 degrees milliCelsius */
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
915*4882a593Smuzhiyun ret = pm_runtime_set_active(&client->dev);
916*4882a593Smuzhiyun if (ret < 0) {
917*4882a593Smuzhiyun mlx90632_sleep(mlx90632);
918*4882a593Smuzhiyun return ret;
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun pm_runtime_enable(&client->dev);
921*4882a593Smuzhiyun pm_runtime_set_autosuspend_delay(&client->dev, MLX90632_SLEEP_DELAY_MS);
922*4882a593Smuzhiyun pm_runtime_use_autosuspend(&client->dev);
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun return iio_device_register(indio_dev);
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun
mlx90632_remove(struct i2c_client * client)927*4882a593Smuzhiyun static int mlx90632_remove(struct i2c_client *client)
928*4882a593Smuzhiyun {
929*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(client);
930*4882a593Smuzhiyun struct mlx90632_data *data = iio_priv(indio_dev);
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun iio_device_unregister(indio_dev);
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
935*4882a593Smuzhiyun pm_runtime_set_suspended(&client->dev);
936*4882a593Smuzhiyun pm_runtime_put_noidle(&client->dev);
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun mlx90632_sleep(data);
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun return 0;
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun static const struct i2c_device_id mlx90632_id[] = {
944*4882a593Smuzhiyun { "mlx90632", 0 },
945*4882a593Smuzhiyun { }
946*4882a593Smuzhiyun };
947*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, mlx90632_id);
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun static const struct of_device_id mlx90632_of_match[] = {
950*4882a593Smuzhiyun { .compatible = "melexis,mlx90632" },
951*4882a593Smuzhiyun { }
952*4882a593Smuzhiyun };
953*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mlx90632_of_match);
954*4882a593Smuzhiyun
mlx90632_pm_suspend(struct device * dev)955*4882a593Smuzhiyun static int __maybe_unused mlx90632_pm_suspend(struct device *dev)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
958*4882a593Smuzhiyun struct mlx90632_data *data = iio_priv(indio_dev);
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun return mlx90632_sleep(data);
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun
mlx90632_pm_resume(struct device * dev)963*4882a593Smuzhiyun static int __maybe_unused mlx90632_pm_resume(struct device *dev)
964*4882a593Smuzhiyun {
965*4882a593Smuzhiyun struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
966*4882a593Smuzhiyun struct mlx90632_data *data = iio_priv(indio_dev);
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun return mlx90632_wakeup(data);
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun static UNIVERSAL_DEV_PM_OPS(mlx90632_pm_ops, mlx90632_pm_suspend,
972*4882a593Smuzhiyun mlx90632_pm_resume, NULL);
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun static struct i2c_driver mlx90632_driver = {
975*4882a593Smuzhiyun .driver = {
976*4882a593Smuzhiyun .name = "mlx90632",
977*4882a593Smuzhiyun .of_match_table = mlx90632_of_match,
978*4882a593Smuzhiyun .pm = &mlx90632_pm_ops,
979*4882a593Smuzhiyun },
980*4882a593Smuzhiyun .probe = mlx90632_probe,
981*4882a593Smuzhiyun .remove = mlx90632_remove,
982*4882a593Smuzhiyun .id_table = mlx90632_id,
983*4882a593Smuzhiyun };
984*4882a593Smuzhiyun module_i2c_driver(mlx90632_driver);
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun MODULE_AUTHOR("Crt Mori <cmo@melexis.com>");
987*4882a593Smuzhiyun MODULE_DESCRIPTION("Melexis MLX90632 contactless Infra Red temperature sensor driver");
988*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
989