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Searched refs:MUXTBL (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3399.c342 MUXTBL(SCLK_UART0, "clk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,
346 MUXTBL(SCLK_UART1, "clk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
350 MUXTBL(SCLK_UART2, "clk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,
354 MUXTBL(SCLK_UART3, "clk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
358 MUXTBL(SCLK_UART4_PMU, "clk_uart4_pmu", mux_uart4_pmu_p, CLK_SET_RATE_PARENT,
H A Dclk.h1005 #define MUXTBL(_id, cname, pnames, f, o, s, w, mf, mt) \ macro
H A Dclk-rv1126.c1126 MUXTBL(RGMII_MODE_CLK, "rgmii_mode_clk", mux_rgmii_clk_p, CLK_SET_RATE_PARENT,