Home
last modified time | relevance | path

Searched refs:KHz (Results 1 – 25 of 153) sorted by relevance

1234567

/OK3568_Linux_fs/kernel/arch/arm/plat-omap/
H A DKconfig72 timer provides more intra-tick resolution than the 32KHz timer,
76 bool "Use 32KHz timer"
80 Select this option if you want to enable the OMAP 32KHz timer.
82 support for no tick during idle. The 32KHz timer provides less
83 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/
H A Drockchip-cpu-avs.txt14 - min-freq: The minimum frequency in KHz. If an opp's frequency is bigger
31 min-freq = <408000>; /* KHz */
42 min-freq = <408000>; /* KHz */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dclk-pvtm.txt1 ROCKCHIP PVTM 32KHz clocks *
3 ROCKCHIP device has two clock sources for 32KHz, external 32k osc and internal pvtm 32k.
H A Dclk-palmas-clk32kg-clocks.txt1 * Palmas 32KHz clocks *
3 Palmas device has two clock output pins for 32KHz, KG and KG_AUDIO.
/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Dsysfs-class-rtc-rtc0-device-rtc_calibration7 calibrate the AB8500.s 32KHz Real Time Clock.
12 30.5 micro-seconds (half-parts-per-million of the 32KHz clock)
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/i2c/
H A Di2c-ocores.txt21 Defaults to 100 KHz when the property is not specified
33 frequency is fixed at 100 KHz.
65 clock-frequency = <400000>; /* i2c bus frequency 400 KHz */
H A Di2c-xlp9xx.txt10 Defaults to 100 KHz when the property is not specified
/OK3568_Linux_fs/rkbin/doc/release/
H A DRK3528_CN.md286 | 1 | 重要 | 解决矩阵时钟频率不符合预期的问题 | clk_200m：396000 KHz、clk_300m：594000 KHz、clk_339m：264000 KHz，对…
H A DRK3528_EN.md287 …mportant | Fix matrix clk rate error | clk_200m：396000 KHz、clk_300m：594000 KHz、clk_339m：264000 KHz…
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-rockchip.txt26 min-pvtm: minimum frequency count in KHz.
27 max-pvtm: maximum frequency count in KHz.
30 - rockchip,pvtm-freq: Clock frequency in KHz, which is used to set the cpu clock
58 - rockchip,threshold-freq: Clock frequency in KHz, it's used to reduce power
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Dscmi-cpufreq.c97 scmi_get_cpu_power(unsigned long *power, unsigned long *KHz, in scmi_get_cpu_power() argument
108 Hz = *KHz * 1000; in scmi_get_cpu_power()
114 *KHz = Hz / 1000; in scmi_get_cpu_power()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3399.h79 #define KHz 1000 macro
95 #define PERIHP_PCLK_HZ (37500 * KHz)
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Ds5h1411.c376 static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1411_set_if_freq() argument
380 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1411_set_if_freq()
382 switch (KHz) { in s5h1411_set_if_freq()
400 __func__, KHz); in s5h1411_set_if_freq()
410 state->if_freq = KHz; in s5h1411_set_if_freq()
H A Ds5h1409.c353 static int s5h1409_set_if_freq(struct dvb_frontend *fe, int KHz) in s5h1409_set_if_freq() argument
357 dprintk("%s(%d KHz)\n", __func__, KHz); in s5h1409_set_if_freq()
359 switch (KHz) { in s5h1409_set_if_freq()
373 state->if_freq = KHz; in s5h1409_set_if_freq()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dmax77620.txt36 with internal regulators. 32KHz clock can be programmed to be part of a
46 Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
54 When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
58 and 32KHz clock get disabled at
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun5i-reference-design-tablet.dtsi87 * The gsl1680 is rated at 400KHz and it will not work reliable at
88 * 100KHz, this has been confirmed on multiple different q8 tablets.
89 * All other devices on this bus are also rated for 400KHz.
/OK3568_Linux_fs/kernel/Documentation/power/
H A Denergy-model.rst120 01 static int est_power(unsigned long *mW, unsigned long *KHz,
126 07 freq = foo_get_freq_ceil(dev, *KHz);
137 18 *KHz = freq;
/OK3568_Linux_fs/kernel/drivers/clk/pxa/
H A Dclk-pxa27x.c21 #define KHz 1000 macro
122 return (unsigned int)clks[0] / KHz; in pxa27x_get_clk_frequency_khz()
316 32768 * KHz)); in pxa27x_register_plls()
H A Dclk-pxa25x.c23 #define KHz 1000 macro
118 return (unsigned int)clks[0] / KHz; in pxa25x_get_clk_frequency_khz()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Dgtm601.txt6 "broadmobi,bm818" = 48KHz stereo
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c314 #define VCO_MAX_KHZ (3200 * (MHz / KHz))
315 #define VCO_MIN_KHZ (800 * (MHz / KHz))
316 #define OUTPUT_MAX_KHZ (3200 * (MHz / KHz))
317 #define OUTPUT_MIN_KHZ (16 * (MHz / KHz))
447 u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0; in pll_para_config()
454 u32 freq_khz = freq_hz / KHz; in pll_para_config()
500 if (best_diff_khz > 4 * (MHz/KHz)) { in pll_para_config()
503 best_diff_khz * KHz); in pll_para_config()
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk1808k.dtsi15 /*system status freq(KHz)*/
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/i2c/
H A Di2c-gpio.txt18 It not defined, then default is 5us (~50KHz).
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Dspreadtrum,sprd-timer.txt12 - clocks: The phandle to the source clock (usually a 32.768 KHz fixed clock).
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dexynos4210-universal_c210.dts216 regulator-name = "32KHz AP";
221 regulator-name = "32KHz CP";

1234567