| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra114/ |
| H A D | clock.c | 665 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()
666 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ); in clock_early_init()
675 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
680 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
685 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
699 writel(0x00561600, &clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_out[1]); in clock_early_init()
702 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()
703 setbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, (1 << pllinfo->lock_ena)); in clock_early_init()
743 { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
|
| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/ |
| H A D | clock.c | 690 pll_rate[CLOCK_ID_CGENERAL] = clock_get_rate(CLOCK_ID_CGENERAL); in clock_init()
702 debug("PLLC = %d\n", pll_rate[CLOCK_ID_CGENERAL]); in clock_init()
767 clock_set_rate(CLOCK_ID_CGENERAL, 456, 12, 1, 8); in tegra30_set_up_pllp()
772 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in tegra30_set_up_pllp()
777 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in tegra30_set_up_pllp()
|
| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra124/ |
| H A D | clock.c | 845 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()
846 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ); in clock_early_init()
855 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
860 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
865 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
879 writel(0x00561600, &clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_out[1]); in clock_early_init()
882 pllinfo = &tegra_pll_info_table[CLOCK_ID_CGENERAL]; in clock_early_init()
883 setbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, (1 << pllinfo->lock_ena)); in clock_early_init()
1169 { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
|
| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra210/ |
| H A D | clock.c | 985 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
990 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
995 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
999 clock_set_rate(CLOCK_ID_CGENERAL, 125, 4, 0, 0); in clock_early_init()
1003 clock_set_rate(CLOCK_ID_CGENERAL, 125, 8, 0, 0); in clock_early_init()
1016 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, in clock_early_init()
1024 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_out[1], in clock_early_init()
1269 { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
|
| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/ |
| H A D | clock.c | 590 clock_set_rate(CLOCK_ID_CGENERAL, 600, 12, 0, 8); in clock_early_init()
595 clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); in clock_early_init()
600 clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); in clock_early_init()
760 { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
|
| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra20/ |
| H A D | clock-tables.h | 16 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, enumerator
|
| /OK3568_Linux_fs/u-boot/drivers/video/ |
| H A D | tegra.c | 133 rate = clock_get_periph_rate(PERIPH_ID_DISP1, CLOCK_ID_CGENERAL); in update_display_mode()
280 clock_start_periph_pll(PERIPH_ID_DISP1, CLOCK_ID_CGENERAL, in tegra_display_probe()
|
| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra114/ |
| H A D | clock-tables.h | 15 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, enumerator
|
| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra30/ |
| H A D | clock-tables.h | 15 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, enumerator
|
| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra124/ |
| H A D | clock-tables.h | 16 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, enumerator
|
| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra210/ |
| H A D | clock-tables.h | 16 CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, enumerator
|
| /OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra30/ |
| H A D | clock.c | 807 { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
|