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Searched refs:CLK_TOP_AUD_ENGEN1_SEL (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8516-clk.h178 #define CLK_TOP_AUD_ENGEN1_SEL 146 macro
H A Dmt6765-clk.h149 #define CLK_TOP_AUD_ENGEN1_SEL 114 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8516.c397 MUX(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel", aud_engen1_parents,
H A Dclk-mt8167.c587 MUX(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel", aud_engen1_parents,
H A Dclk-mt6765.c425 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_ENGEN1_SEL, "aud_engen1_sel",