Searched refs:CLK_PCIEPHY0_REF (Results 1 – 6 of 6) sorted by relevance
29 clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>;
44 #define CLK_PCIEPHY0_REF 31 macro
1573 MUX(CLK_PCIEPHY0_REF, "clk_pciephy0_ref", clk_pciephy0_ref_p, CLK_SET_RATE_PARENT,
2636 clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>;2638 assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
3468 clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>,3471 assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;