Home
last modified time | relevance | path

Searched refs:CGU_CLK_MUX (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/ingenic/
H A Djz4780-cgu.c329 "sclk_a", CGU_CLK_MUX,
336 "cpumux", CGU_CLK_MUX,
355 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
363 "ahb2_apb_mux", CGU_CLK_MUX,
382 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
389 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
398 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV,
405 "i2s", CGU_CLK_MUX,
411 "lcd0pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
419 "lcd1pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
[all …]
H A Djz4770-cgu.c205 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
212 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
219 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
226 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
233 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
240 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
247 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
254 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
261 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
271 "ssi_mux", CGU_CLK_DIV | CGU_CLK_MUX,
[all …]
H A Dx1000-cgu.c241 "sclk_a", CGU_CLK_MUX,
247 "cpu_mux", CGU_CLK_MUX,
266 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
273 "ahb2_apb_mux", CGU_CLK_MUX,
292 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
300 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
308 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
316 "msc_mux", CGU_CLK_MUX,
336 "otg", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
345 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
[all …]
H A Dx1830-cgu.c215 "sclk_a", CGU_CLK_MUX,
221 "cpu_mux", CGU_CLK_MUX,
240 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
247 "ahb2_apb_mux", CGU_CLK_MUX,
266 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
274 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
283 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
292 "msc_mux", CGU_CLK_MUX,
313 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
327 "ssi_mux", CGU_CLK_MUX,
[all …]
H A Djz4725b-cgu.c142 "i2s", CGU_CLK_MUX | CGU_CLK_DIV,
149 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
163 "udc", CGU_CLK_MUX | CGU_CLK_DIV,
234 "rtc", CGU_CLK_MUX,
H A Djz4740-cgu.c156 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
164 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
186 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
H A Dcgu.c299 if (clk_info->type & CGU_CLK_MUX) { in ingenic_clk_get_parent()
326 if (clk_info->type & CGU_CLK_MUX) { in ingenic_clk_set_parent()
647 if (caps & (CGU_CLK_MUX | CGU_CLK_CUSTOM)) { in ingenic_register_clock()
650 if (caps & CGU_CLK_MUX) in ingenic_register_clock()
701 if (caps & CGU_CLK_MUX) { in ingenic_register_clock()
705 caps &= ~(CGU_CLK_MUX | CGU_CLK_MUX_GLITCHFREE); in ingenic_register_clock()
H A Dcgu.h153 CGU_CLK_MUX = BIT(3), enumerator