| /OK3568_Linux_fs/kernel/drivers/s390/char/ |
| H A D | defkeymap.c | 15 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 16 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 17 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 18 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 19 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 20 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 21 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 22 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 0xf000, 23 0xf020, 0xf000, 0xf0e2, 0xf0e4, 0xf0e0, 0xf0e1, 0xf0e3, 0xf0e5, 24 0xf0e7, 0xf0f1, 0xf0a2, 0xf02e, 0xf03c, 0xf028, 0xf02b, 0xf07c, [all …]
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| /OK3568_Linux_fs/kernel/sound/soc/codecs/ |
| H A D | wm5102.c | 41 static DECLARE_TLV_DB_SCALE(ana_tlv, 0, 100, 0); 42 static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 43 static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); 44 static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); 45 static DECLARE_TLV_DB_SCALE(ng_tlv, -10200, 600, 0); 48 { .type = WMFW_ADSP2_PM, .base = 0x100000 }, 49 { .type = WMFW_ADSP2_ZM, .base = 0x180000 }, 50 { .type = WMFW_ADSP2_XM, .base = 0x190000 }, 51 { .type = WMFW_ADSP2_YM, .base = 0x1a8000 }, 55 { 0x3000, 0x2225 }, [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/netlogic/xlr/ |
| H A D | xlr.h | 46 return ((prid & 0xf000) == 0x4000); in nlm_chip_is_xls_b() 50 /* The XLS product line has chip versions 0x[48c]? */ 55 return ((prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000 || in nlm_chip_is_xls() 56 (prid & 0xf000) == 0xc000); in nlm_chip_is_xls()
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| /OK3568_Linux_fs/kernel/arch/s390/kernel/ |
| H A D | relocate_kernel.S | 25 * 0xf000 is a page_mask 30 basr %r13,0 # base address 34 lg %r5,0(%r2) # read another word for indirection page 36 tml %r5,0x1 # is it a destination page? 39 nill %r6,0xf000 # mask it out and... 42 tml %r5,0x2 # is it a indirection page? 44 nill %r5,0xf000 # YES, mask out, 48 tml %r5,0x4 # is it the done indicator? 52 tml %r5,0x8 # it should be a source indicator... 55 nill %r8,0xf000 # masking [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-ux500/ |
| H A D | db8500-regs.h | 10 #define U8500_ESRAM_BASE 0x40000000 11 #define U8500_ESRAM_BANK_SIZE 0x00020000 21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 28 #define U8500_PER3_BASE 0x80000000 29 #define U8500_STM_BASE 0x80100000 30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) 31 #define U8500_PER2_BASE 0x80110000 32 #define U8500_PER1_BASE 0x80120000 33 #define U8500_B2R2_BASE 0x80130000 34 #define U8500_HSEM_BASE 0x80140000 [all …]
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| /OK3568_Linux_fs/kernel/fs/cifs/ |
| H A D | cifs_unicode.h | 32 #define UNI_ASTERISK (__u16) ('*' + 0xF000) 33 #define UNI_QUESTION (__u16) ('?' + 0xF000) 34 #define UNI_COLON (__u16) (':' + 0xF000) 35 #define UNI_GRTRTHAN (__u16) ('>' + 0xF000) 36 #define UNI_LESSTHAN (__u16) ('<' + 0xF000) 37 #define UNI_PIPE (__u16) ('|' + 0xF000) 38 #define UNI_SLASH (__u16) ('\\' + 0xF000) 45 #define SFM_DOUBLEQUOTE ((__u16) 0xF020) 46 #define SFM_ASTERISK ((__u16) 0xF021) 47 #define SFM_QUESTION ((__u16) 0xF025) [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-s3c/ |
| H A D | mach-crag6410-module.c | 45 [0] = { 48 .bus_num = 0, 49 .chip_select = 0, 58 [0] = { 61 .bus_num = 0, 62 .chip_select = 0, 84 { WM5100_MICDET_MICBIAS3, 0, 0 }, 89 0, 90 0, 91 0, [all …]
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| /OK3568_Linux_fs/kernel/drivers/staging/rtl8723bs/hal/ |
| H A D | odm_DynamicBBPowerSaving.c | 19 pDM_PSTable->Rssi_val_min = 0; in odm_DynamicBBPowerSavingInit() 20 pDM_PSTable->initialize = 0; in odm_DynamicBBPowerSavingInit() 35 if (pDM_PSTable->initialize == 0) { in ODM_RF_Saving() 37 pDM_PSTable->Reg874 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x874, bMaskDWord)&0x1CC000)>>14; in ODM_RF_Saving() 38 pDM_PSTable->RegC70 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xc70, bMaskDWord)&BIT3)>>3; in ODM_RF_Saving() 39 pDM_PSTable->Reg85C = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; in ODM_RF_Saving() 40 pDM_PSTable->RegA74 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xa74, bMaskDWord)&0xF000)>>12; in ODM_RF_Saving() 41 /* Reg818 = PHY_QueryBBReg(padapter, 0x818, bMaskDWord); */ in ODM_RF_Saving() 46 if (pDM_Odm->RSSI_Min != 0xFF) { in ODM_RF_Saving() 65 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ in ODM_RF_Saving() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/ |
| H A D | phydm_dynamicbbpowersaving.c | 39 pDM_PSTable->Rssi_val_min = 0; in odm_DynamicBBPowerSavingInit() 40 pDM_PSTable->initialize = 0; in odm_DynamicBBPowerSavingInit() 61 if(pDM_PSTable->initialize == 0){ in ODM_RF_Saving() 63 pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; in ODM_RF_Saving() 64 pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; in ODM_RF_Saving() 65 pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; in ODM_RF_Saving() 66 pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; in ODM_RF_Saving() 67 //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); in ODM_RF_Saving() 73 if(pDM_Odm->RSSI_Min != 0xFF) in ODM_RF_Saving() 101 ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 in ODM_RF_Saving() [all …]
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| /OK3568_Linux_fs/kernel/drivers/mfd/ |
| H A D | cs47l90-tables.c | 18 { 0x8A, 0x5555 }, 19 { 0x8A, 0xAAAA }, 20 { 0x4CF, 0x0700 }, 21 { 0x171, 0x0003 }, 22 { 0x101, 0x0444 }, 23 { 0x159, 0x0002 }, 24 { 0x120, 0x0444 }, 25 { 0x1D1, 0x0004 }, 26 { 0x1E0, 0xC084 }, 27 { 0x159, 0x0000 }, [all …]
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| H A D | cs47l35-tables.c | 18 { 0x460, 0x0c40 }, 19 { 0x461, 0xcd1a }, 20 { 0x462, 0x0c40 }, 21 { 0x463, 0xb53b }, 22 { 0x464, 0x0c40 }, 23 { 0x465, 0x7503 }, 24 { 0x466, 0x0c40 }, 25 { 0x467, 0x4a41 }, 26 { 0x468, 0x0041 }, 27 { 0x469, 0x3491 }, [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| H A D | gmc_7_1_sh_mask.h | 27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1 28 #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0 29 #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2 30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1 31 #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4 32 #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2 33 #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8 34 #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3 35 #define MC_CONFIG__MCDS_WR_ENABLE_MASK 0x10 36 #define MC_CONFIG__MCDS_WR_ENABLE__SHIFT 0x4 [all …]
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| H A D | gmc_8_1_sh_mask.h | 27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1 28 #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0 29 #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2 30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1 31 #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4 32 #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2 33 #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8 34 #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3 35 #define MC_CONFIG__MCDS_WR_ENABLE_MASK 0x10 36 #define MC_CONFIG__MCDS_WR_ENABLE__SHIFT 0x4 [all …]
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| /OK3568_Linux_fs/external/libmali/overlay/ |
| HD | px3seBase | ... --> Parameter partition switch Done, reboot needed 0xff00 0xFF00 reboot mode: ROCKUSB 0xf000 0 ... |
| /OK3568_Linux_fs/kernel/drivers/net/ethernet/realtek/ |
| H A D | r8169_phy_config.c | 23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage() 25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage() 28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage() 34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param() 36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param() 37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param() 39 phy_restore_page(phydev, oldpage, 0); in r8168d_phy_param() 45 int oldpage = phy_select_page(phydev, 0x0a43); in r8168g_phy_param() 47 __phy_write(phydev, 0x13, parm); in r8168g_phy_param() 48 __phy_modify(phydev, 0x14, mask, val); in r8168g_phy_param() [all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852bs/phl/hal_g6/phy/bb/halbb_8852b/ |
| H A D | halbb_cr_info_8852b.h | 29 #define DIS_UPD_5MHZ_SYNC_EN_C 0x0000 30 #define DIS_UPD_5MHZ_SYNC_EN_C_M 0x1 31 #define UPD_5MHZ_CNT_EN_C 0x0000 32 #define UPD_5MHZ_CNT_EN_C_M 0x2 33 #define CLK_640M_EN_C 0x0000 34 #define CLK_640M_EN_C_M 0x4 35 #define RFC_CK_PHASE_SEL_C 0x0000 36 #define RFC_CK_PHASE_SEL_C_M 0x8 37 #define RFC_CKEN_C 0x0000 38 #define RFC_CKEN_C_M 0x10 [all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/phy/bb/halbb_8852b/ |
| H A D | halbb_cr_info_8852b.h | 29 #define DIS_UPD_5MHZ_SYNC_EN_C 0x0000 30 #define DIS_UPD_5MHZ_SYNC_EN_C_M 0x1 31 #define UPD_5MHZ_CNT_EN_C 0x0000 32 #define UPD_5MHZ_CNT_EN_C_M 0x2 33 #define CLK_640M_EN_C 0x0000 34 #define CLK_640M_EN_C_M 0x4 35 #define RFC_CK_PHASE_SEL_C 0x0000 36 #define RFC_CK_PHASE_SEL_C_M 0x8 37 #define RFC_CKEN_C 0x0000 38 #define RFC_CKEN_C_M 0x10 [all …]
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| /OK3568_Linux_fs/kernel/include/linux/mfd/wm8350/ |
| H A D | gpio.h | 16 #define WM8350_GPIO_DEBOUNCE 0x80 17 #define WM8350_GPIO_PIN_PULL_UP_CONTROL 0x81 18 #define WM8350_GPIO_PULL_DOWN_CONTROL 0x82 19 #define WM8350_GPIO_INT_MODE 0x83 20 #define WM8350_GPIO_CONTROL 0x85 21 #define WM8350_GPIO_CONFIGURATION_I_O 0x86 22 #define WM8350_GPIO_PIN_POLARITY_TYPE 0x87 23 #define WM8350_GPIO_FUNCTION_SELECT_1 0x8C 24 #define WM8350_GPIO_FUNCTION_SELECT_2 0x8D 25 #define WM8350_GPIO_FUNCTION_SELECT_3 0x8E [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/ |
| H A D | cik_sdma.c | 79 return (rptr & 0x3fffc) >> 2; in cik_sdma_get_rptr() 100 return (RREG32(reg) & 0x3fffc) >> 2; in cik_sdma_get_wptr() 121 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cik_sdma_set_wptr() 137 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute() 144 radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); in cik_sdma_ring_ib_execute() 145 radeon_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc); in cik_sdma_ring_ib_execute() 153 radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0)); in cik_sdma_ring_ib_execute() 154 radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_INDIRECT_BUFFER, 0, extra_bits)); in cik_sdma_ring_ib_execute() 155 radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_ib_execute() 182 radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits)); in cik_sdma_hdp_flush_ring_emit() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/ |
| H A D | phydm_dynamicbbpowersaving.c | 39 pDM_PSTable->Rssi_val_min = 0; in odm_DynamicBBPowerSavingInit() 40 pDM_PSTable->initialize = 0; in odm_DynamicBBPowerSavingInit() 84 if(pDM_Odm->RSSI_Min!= 0xFF) in odm_1R_CCA() 112 ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); in odm_1R_CCA() 113 //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); in odm_1R_CCA() 117 ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); in odm_1R_CCA() 118 //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 in odm_1R_CCA() 123 ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); in odm_1R_CCA() 124 //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); in odm_1R_CCA() 148 if(pDM_PSTable->initialize == 0){ in ODM_RF_Saving() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/phydm/ |
| H A D | phydm_dynamicbbpowersaving.c | 39 pDM_PSTable->Rssi_val_min = 0; in odm_DynamicBBPowerSavingInit() 40 pDM_PSTable->initialize = 0; in odm_DynamicBBPowerSavingInit() 84 if(pDM_Odm->RSSI_Min!= 0xFF) in odm_1R_CCA() 112 ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); in odm_1R_CCA() 113 //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); in odm_1R_CCA() 117 ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); in odm_1R_CCA() 118 //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 in odm_1R_CCA() 123 ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); in odm_1R_CCA() 124 //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); in odm_1R_CCA() 148 if(pDM_PSTable->initialize == 0){ in ODM_RF_Saving() [all …]
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| /OK3568_Linux_fs/kernel/drivers/media/usb/zr364xx/ |
| H A D | zr364xx.c | 42 #define BUFFER_SIZE 0x1000 46 #define ZR364XX_READ_IDLE 0 55 } while (0) 66 #define METHOD0 0 81 MODULE_PARM_DESC(mode, "0 = 320x240, 1 = 160x120, 2 = 640x480"); 87 {USB_DEVICE(0x08ca, 0x0109), .driver_info = METHOD0 }, 88 {USB_DEVICE(0x041e, 0x4024), .driver_info = METHOD0 }, 89 {USB_DEVICE(0x0d64, 0x0108), .driver_info = METHOD0 }, 90 {USB_DEVICE(0x0546, 0x3187), .driver_info = METHOD0 }, 91 {USB_DEVICE(0x0d64, 0x3108), .driver_info = METHOD0 }, [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/dsa/mv88e6xxx/ |
| H A D | hwtstamp.h | 19 /* Offset 0x00: PTP EtherType */ 20 #define MV88E6XXX_PTP_ETHERTYPE 0x00 22 /* Offset 0x01: Message Type Timestamp Enables */ 23 #define MV88E6XXX_PTP_MSGTYPE 0x01 24 #define MV88E6XXX_PTP_MSGTYPE_SYNC 0x0001 25 #define MV88E6XXX_PTP_MSGTYPE_DELAY_REQ 0x0002 26 #define MV88E6XXX_PTP_MSGTYPE_PDLAY_REQ 0x0004 27 #define MV88E6XXX_PTP_MSGTYPE_PDLAY_RES 0x0008 28 #define MV88E6XXX_PTP_MSGTYPE_ALL_EVENT 0x000f 30 /* Offset 0x02: Timestamp Arrival Capture Pointers */ [all …]
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| H A D | global1.h | 16 /* Offset 0x00: Switch Global Status Register */ 17 #define MV88E6XXX_G1_STS 0x00 18 #define MV88E6352_G1_STS_PPU_STATE 0x8000 19 #define MV88E6185_G1_STS_PPU_STATE_MASK 0xc000 20 #define MV88E6185_G1_STS_PPU_STATE_DISABLED_RST 0x0000 21 #define MV88E6185_G1_STS_PPU_STATE_INITIALIZING 0x4000 22 #define MV88E6185_G1_STS_PPU_STATE_DISABLED 0x8000 23 #define MV88E6185_G1_STS_PPU_STATE_POLLING 0xc000 24 #define MV88E6XXX_G1_STS_INIT_READY 0x0800 33 #define MV88E6XXX_G1_STS_IRQ_EEPROM_DONE 0 [all …]
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| /OK3568_Linux_fs/u-boot/arch/m68k/cpu/mcf547x_8x/ |
| H A D | cpu_init.c | 36 out_be32(&xlbarb->adrto, 0x2000); in cpu_init_f() 37 out_be32(&xlbarb->datto, 0x2500); in cpu_init_f() 38 out_be32(&xlbarb->busto, 0x3000); in cpu_init_f() 43 out_be32(&xlbarb->prien, 0xff); in cpu_init_f() 44 out_be32(&xlbarb->pri, 0); in cpu_init_f() 99 return (0); in cpu_init_r() 105 u8 *pscsicr = (u8 *) (CONFIG_SYS_UART_BASE + 0x40); in uart_port_conf() 109 case 0: in uart_port_conf() 123 clrbits_8(pscsicr, 0x07); in uart_port_conf() 134 setbits_be16(&gpio->par_feci2cirq, 0xf000); in fecpin_setclear() [all …]
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