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Searched refs:dSYNCLK (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/
H A DhalHDMITx.c2956 double dSYNCLK = 1; in MHal_HDMITx_EnableSSC() local
2977 dSYNCLK = (double) ((ub432MHz*ub2x19times)/ubSYNSet); in MHal_HDMITx_EnableSSC()
2979 dSSC_Span = dSYNCLK * 1000 / (ubSSCClk * 4); //Span = SYN_CLK / (SSC_CLK * 4) in MHal_HDMITx_EnableSSC()
2982 …printf("ubSYNSet=%x, dSYNCLK=%f, dSSC_Span=%f, dSSC_Step=%f\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dS… in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/
H A DhalHDMITx.c2941 double dSYNCLK = 1; in MHal_HDMITx_EnableSSC()
2962 dSYNCLK = (double) ((ub432MHz*ub2x19times)/ubSYNSet); in MHal_HDMITx_EnableSSC()
2964 dSSC_Span = dSYNCLK * 1000 / (ubSSCClk * 4); //Span = SYN_CLK / (SSC_CLK * 4) in MHal_HDMITx_EnableSSC()
2967 …printf("ubSYNSet=%x, dSYNCLK=%f, dSSC_Span=%f, dSSC_Step=%f\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dS… in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/
H A DhalHDMITx.c3044 MS_U32 dSYNCLK = 1; in MHal_HDMITx_EnableSSC()
3065 dSYNCLK = ((ub432MHz*ub2x19times)/ubSYNSet); in MHal_HDMITx_EnableSSC()
3068 dSSC_Span = (dSYNCLK * 250) / (ubSSCClk); //Span = SYN_CLK_KHz / (SSC_CLK_KHz * 4) in MHal_HDMITx_EnableSSC()
3073 …printf("ubSYNSet=%x, dSYNCLK=%d, dSSC_Span=%d, dSSC_Step=%d\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dS… in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/
H A DhalHDMITx.c3006 MS_U32 dSYNCLK = 1; in MHal_HDMITx_EnableSSC()
3027 dSYNCLK = ((ub432MHz*ub2x19times)/ubSYNSet); in MHal_HDMITx_EnableSSC()
3030 dSSC_Span = (dSYNCLK * 250) / (ubSSCClk); //Span = SYN_CLK_KHz / (SSC_CLK_KHz * 4) in MHal_HDMITx_EnableSSC()
3035 …printf("ubSYNSet=%x, dSYNCLK=%d, dSSC_Span=%d, dSSC_Step=%d\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dS… in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/
H A DhalHDMITx.c3329 double dSYNCLK = 1; in MHal_HDMITx_EnableSSC()
3350 dSYNCLK = (double) ((ub432MHz*ub2x19times)/ubSYNSet); in MHal_HDMITx_EnableSSC()
3352 dSSC_Span = dSYNCLK * 1000 / (ubSSCClk * 4); //Span = SYN_CLK / (SSC_CLK * 4) in MHal_HDMITx_EnableSSC()
3355 …printf("ubSYNSet=%x, dSYNCLK=%f, dSSC_Span=%f, dSSC_Step=%f\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dS… in MHal_HDMITx_EnableSSC()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/
H A DhalHDMITx.c3445 MS_U32 dSYNCLK = 1; in MHal_HDMITx_EnableSSC()
3466 dSYNCLK = ((ub432MHz*ub2x19times)/ubSYNSet); in MHal_HDMITx_EnableSSC()
3469 dSSC_Span = (dSYNCLK * 250) / (ubSSCClk); //Span = SYN_CLK_KHz / (SSC_CLK_KHz * 4) in MHal_HDMITx_EnableSSC()
3474 …printf("ubSYNSet=%x, dSYNCLK=%d, dSSC_Span=%d, dSSC_Step=%d\r\n", ubSYNSet, dSYNCLK, dSSC_Span, dS… in MHal_HDMITx_EnableSSC()