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Searched refs:bPGAEnable (Results 1 – 25 of 142) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_common.c764 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
772 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
783 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
791 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
803 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
805 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
806 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
809 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
811 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
812 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_common.c764 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
772 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
783 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
791 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
803 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
805 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
806 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
809 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
811 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
812 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/
H A DhalDMD_INTERN_common.c764 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
772 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
783 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
791 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
803 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
805 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
806 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
809 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
811 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
812 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_common.c764 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
772 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
783 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
791 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
803 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
805 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
806 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
809 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
811 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
812 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_common.c764 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
772 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
783 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
791 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
803 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
805 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
806 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
809 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
811 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
812 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_common.c764 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
772 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
783 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
791 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
803 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
805 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
806 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
809 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
811 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
812 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
H A DhalDMD_INTERN_common.h156 MS_BOOL HAL_DMD_ADC_IQ_Switch(MS_U8 u8ADCIQMode, MS_U8 u8PadSel, MS_BOOL bPGAEnable, MS_U8 u8PGAGai…
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_common.c826 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
834 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
845 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
853 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
865 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
867 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
868 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
871 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
873 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
874 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_common.c828 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
836 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
847 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
855 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
867 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
869 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
870 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
873 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
875 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
876 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
H A DhalDMD_INTERN_common.h174 MS_BOOL HAL_DMD_ADC_IQ_Switch(MS_U8 u8ADCIQMode, MS_U8 u8PadSel, MS_BOOL bPGAEnable, MS_U8 u8PGAGai…
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
H A DhalDMD_INTERN_common.h173 MS_BOOL HAL_DMD_ADC_IQ_Switch(MS_U8 u8ADCIQMode, MS_U8 u8PadSel, MS_BOOL bPGAEnable, MS_U8 u8PGAGai…
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_common.c827 static void HAL_DMD_ADC_IMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_IMUX_Sel() argument
835 if (bPGAEnable) in HAL_DMD_ADC_IMUX_Sel()
846 static void HAL_DMD_ADC_QMUX_Sel(MS_U8 u8PadSel, MS_BOOL bPGAEnable) in HAL_DMD_ADC_QMUX_Sel() argument
854 if (bPGAEnable) in HAL_DMD_ADC_QMUX_Sel()
866 static void HAL_DMD_SIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_SIF_PGA_Ctl() argument
868 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(5)); // enable SIF PGA in HAL_DMD_SIF_PGA_Ctl()
869 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(2)); // disable IMUX clamping in HAL_DMD_SIF_PGA_Ctl()
872 static void HAL_DMD_VIF_PGA_Ctl(MS_BOOL bPGAEnable) in HAL_DMD_VIF_PGA_Ctl() argument
874 HAL_DMD_RIU_WriteRegBit(0x112840, bPGAEnable, BIT_(6)); // enable VIF PGA in HAL_DMD_VIF_PGA_Ctl()
875 HAL_DMD_RIU_WriteRegBit(0x112802, bPGAEnable, BIT_(3)); // disable IMUX clamping in HAL_DMD_VIF_PGA_Ctl()
[all …]
H A DhalDMD_INTERN_common.h173 MS_BOOL HAL_DMD_ADC_IQ_Switch(MS_U8 u8ADCIQMode, MS_U8 u8PadSel, MS_BOOL bPGAEnable, MS_U8 u8PGAGai…
/utopia/UTPA2-700.0.x/modules/demodulator/drv/demod/
H A DdrvDMD_INTERN_DVBT_v2.c332 MS_U8 u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBT_Init() local
415 … bPGAEnable = _sDMD_DVBT_InitData.u8DMD_DVBT_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in DMD_DVBT_Init()
496 …T_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, _sDM… in DMD_DVBT_Init()
505 …INTERN_DVBT_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGA… in DMD_DVBT_Init()
519 MS_U8 u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBT_Init() local
609 … bPGAEnable = _sDMD_DVBT_InitData.u8DMD_DVBT_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in DMD_DVBT_Init()
690 …T_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, _sDM… in DMD_DVBT_Init()
699 …INTERN_DVBT_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGA… in DMD_DVBT_Init()
H A DdrvDMD_INTERN_DVBT.c432 MS_U8 u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in MDrv_DMD_DVBT_Init() local
515 bPGAEnable = _sDMD_DVBT_InitData.u8DMD_DVBT_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in MDrv_DMD_DVBT_Init()
596 …INTERN_DVBT_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGA… in MDrv_DMD_DVBT_Init()
605 …INTERN_DVBT_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGA… in MDrv_DMD_DVBT_Init()
H A DdrvDMD_INTERN_DVBT2_v2.c279 MS_U8 u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBT2_Init() local
364 … bPGAEnable = _sDMD_DVBT2_InitData.u8DMD_DVBT2_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in DMD_DVBT2_Init()
424 …2_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, _sDM… in DMD_DVBT2_Init()
433 …2_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, NUL… in DMD_DVBT2_Init()
H A DdrvDMD_INTERN_DVBT2.c281 MS_U8 u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in MDrv_DMD_DVBT2_Init()
364 … bPGAEnable = _sDMD_DVBT2_InitData.u8DMD_DVBT2_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in MDrv_DMD_DVBT2_Init()
424 …2_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, _sDM… in MDrv_DMD_DVBT2_Init()
433 …2_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, NUL… in MDrv_DMD_DVBT2_Init()
H A DdrvDMD_INTERN_DVBC_v2.c496 MS_U8 u8IQSwap = 0, u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBC_Init() local
607 … bPGAEnable = _sDMD_DVBC_InitData.u8DMD_DVBC_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in DMD_DVBC_Init()
690 …C_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, _sDM… in DMD_DVBC_Init()
700 …INTERN_DVBC_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGA… in DMD_DVBC_Init()
H A DdrvDMD_INTERN_DVBS_v2.c480 MS_U8 u8IQSwap=0, u8ADCIQMode = 0, u8PadSel = 0, bPGAEnable = 0, u8PGAGain = 5; in DMD_DVBS_Init() local
563 … bPGAEnable = _sDMD_DVBS_InitData.u8DMD_DVBS_InitExt[15]; // bPGAEnable : 0=disable, 1=enable in DMD_DVBS_Init()
625 …S_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGAGain, _sDM… in DMD_DVBS_Init()
634 …INTERN_DVBS_Power_On_Initialization(bRFAGCTristateEnable, u8ADCIQMode, u8PadSel, bPGAEnable, u8PGA… in DMD_DVBS_Init()

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