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Searched refs:_TSOCtrl2 (Results 1 – 8 of 8) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DhalTSO.c128 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
360 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_virtTSORegBase+ REG_CTRL_BASE_TSO2); in HAL_TSO_SetBank()
420 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
421 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
834 *pbExtSync = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_EXTSYNC; in HAL_TSO_GetInputTSIF_Status()
835 *pbParl = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_PARL; in HAL_TSO_GetInputTSIF_Status()
1438 pReg = &(_TSOCtrl2->TSO_CFG_21); in HAL_TSO_ChIf_Enable()
1479 pReg = &(_TSOCtrl2->TSO_CFG_20); in HAL_TSO_ChIf_Cfg()
1855 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLUSH… in HAL_TSO_PVR_WaitFlush()
1856 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLU… in HAL_TSO_PVR_WaitFlush()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DhalTSO.c128 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
369 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_virtTSORegBase+ REG_CTRL_BASE_TSO2); in HAL_TSO_SetBank()
429 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
430 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
855 *pbExtSync = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_EXTSYNC; in HAL_TSO_GetInputTSIF_Status()
856 *pbParl = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_PARL; in HAL_TSO_GetInputTSIF_Status()
1463 pReg = &(_TSOCtrl2->TSO_CFG_21); in HAL_TSO_ChIf_Enable()
1504 pReg = &(_TSOCtrl2->TSO_CFG_20); in HAL_TSO_ChIf_Cfg()
1880 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLUSH… in HAL_TSO_PVR_WaitFlush()
1881 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLU… in HAL_TSO_PVR_WaitFlush()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DhalTSO.c128 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
369 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_virtTSORegBase+ REG_CTRL_BASE_TSO2); in HAL_TSO_SetBank()
429 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
430 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
855 *pbExtSync = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_EXTSYNC; in HAL_TSO_GetInputTSIF_Status()
856 *pbParl = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_PARL; in HAL_TSO_GetInputTSIF_Status()
1463 pReg = &(_TSOCtrl2->TSO_CFG_21); in HAL_TSO_ChIf_Enable()
1504 pReg = &(_TSOCtrl2->TSO_CFG_20); in HAL_TSO_ChIf_Cfg()
1880 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLUSH… in HAL_TSO_PVR_WaitFlush()
1881 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLU… in HAL_TSO_PVR_WaitFlush()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DhalTSO.c128 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
360 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_virtTSORegBase+ REG_CTRL_BASE_TSO2); in HAL_TSO_SetBank()
420 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT_S… in HAL_TSO_Init()
421 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_21), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_21)), TSO_MMT… in HAL_TSO_Init()
834 *pbExtSync = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_EXTSYNC; in HAL_TSO_GetInputTSIF_Status()
835 *pbParl = _HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)) & TSO_MMT_PARL; in HAL_TSO_GetInputTSIF_Status()
1438 pReg = &(_TSOCtrl2->TSO_CFG_21); in HAL_TSO_ChIf_Enable()
1479 pReg = &(_TSOCtrl2->TSO_CFG_20); in HAL_TSO_ChIf_Cfg()
1855 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), SET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLUSH… in HAL_TSO_PVR_WaitFlush()
1856 …_HAL_REG16_W(&(_TSOCtrl2->TSO_CFG_0D), RESET_FLAG1(_HAL_REG16_R(&(_TSOCtrl2->TSO_CFG_0D)), TSP_FLU… in HAL_TSO_PVR_WaitFlush()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c46 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
228 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_u32TSORegBase+ REG_CTRL_BASE_TSO2); // 0x1539 in HAL_TSO_SetBank()
2191 …_HAL_REG16_W(&(_TSOCtrl2->REG_TSO2_PIDFLT_PCR_CFG32_37[u8ChIf]), (TSO2_REG_PIDFLT_PCR_ENPCR | (TSO… in HAL_TSO_PcrFlt_Enable()
2195 …_HAL_REG16_W(&(_TSOCtrl2->REG_TSO2_PIDFLT_PCR_CFG32_37[u8ChIf]), (~TSO2_REG_PIDFLT_PCR_ENPCR | TSO… in HAL_TSO_PcrFlt_Enable()
2206 _REG16_SET(&(_TSOCtrl2->REG_TSO2_PCR_CFG30),TSO2_REG_PCR1_READ); in HAL_TSO_Pcr_Get()
2207 *pu32Pcr = _HAL_REG32_R(&(_TSOCtrl2->REG_TSO2_PCR1_LOW32_CFG38_39)); in HAL_TSO_Pcr_Get()
2208 *pu32Pcr_H = _HAL_REG16_R(&(_TSOCtrl2->REG_TSO2_PCR1_VAILD_CFG3A)) & 0x1; in HAL_TSO_Pcr_Get()
2209 _REG16_CLR(&(_TSOCtrl2->REG_TSO2_PCR_CFG30),TSO2_REG_PCR1_READ); in HAL_TSO_Pcr_Get()
2213 _REG16_SET(&(_TSOCtrl2->REG_TSO2_PCR_CFG30),TSO2_REG_PCR2_READ); in HAL_TSO_Pcr_Get()
2214 *pu32Pcr = _HAL_REG32_R(&(_TSOCtrl2->REG_TSO2_PCR2_LOW32_CFG3B_3C)); in HAL_TSO_Pcr_Get()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c46 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
229 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_u32TSORegBase+ REG_CTRL_BASE_TSO2); // 0x1539 in HAL_TSO_SetBank()
2183 …_HAL_REG16_W(&(_TSOCtrl2->REG_TSO2_PIDFLT_PCR_CFG32_37[u8ChIf]), (TSO2_REG_PIDFLT_PCR_ENPCR | (TSO… in HAL_TSO_PcrFlt_Enable()
2187 …_HAL_REG16_W(&(_TSOCtrl2->REG_TSO2_PIDFLT_PCR_CFG32_37[u8ChIf]), (~TSO2_REG_PIDFLT_PCR_ENPCR | TSO… in HAL_TSO_PcrFlt_Enable()
2198 _REG16_SET(&(_TSOCtrl2->REG_TSO2_PCR_CFG30),TSO2_REG_PCR1_READ); in HAL_TSO_Pcr_Get()
2199 *pu32Pcr = _HAL_REG32_R(&(_TSOCtrl2->REG_TSO2_PCR1_LOW32_CFG38_39)); in HAL_TSO_Pcr_Get()
2200 *pu32Pcr_H = _HAL_REG16_R(&(_TSOCtrl2->REG_TSO2_PCR1_VAILD_CFG3A)) & 0x1; in HAL_TSO_Pcr_Get()
2201 _REG16_CLR(&(_TSOCtrl2->REG_TSO2_PCR_CFG30),TSO2_REG_PCR1_READ); in HAL_TSO_Pcr_Get()
2205 _REG16_SET(&(_TSOCtrl2->REG_TSO2_PCR_CFG30),TSO2_REG_PCR2_READ); in HAL_TSO_Pcr_Get()
2206 *pu32Pcr = _HAL_REG32_R(&(_TSOCtrl2->REG_TSO2_PCR2_LOW32_CFG3B_3C)); in HAL_TSO_Pcr_Get()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsio/
H A DhalTSIO.c40 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
479 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_u32TSIORegBase+ REG_CTRL_BASE_TSO2); // 0x1539 in HAL_TSIO_SetBank()
868 u16PidFltEnableBit[0] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[0])); in HAL_TSIO_SGDMAIN_PidFltEnable()
869 u16PidFltEnableBit[1] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[1])); in HAL_TSIO_SGDMAIN_PidFltEnable()
870 u16PidFltEnableBit[2] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[2])); in HAL_TSIO_SGDMAIN_PidFltEnable()
871 u16PidFltEnableBit[3] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[3])); in HAL_TSIO_SGDMAIN_PidFltEnable()
893 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[0]), u16PidFltEnableBit[0]); in HAL_TSIO_SGDMAIN_PidFltEnable()
894 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[1]), u16PidFltEnableBit[1]); in HAL_TSIO_SGDMAIN_PidFltEnable()
895 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[2]), u16PidFltEnableBit[2]); in HAL_TSIO_SGDMAIN_PidFltEnable()
896 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[3]), u16PidFltEnableBit[3]); in HAL_TSIO_SGDMAIN_PidFltEnable()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsio/
H A DhalTSIO.c40 static REG_Ctrl_TSO2* _TSOCtrl2 = NULL; variable
479 _TSOCtrl2 = (REG_Ctrl_TSO2*)(_u32TSIORegBase+ REG_CTRL_BASE_TSO2); // 0x1539 in HAL_TSIO_SetBank()
868 u16PidFltEnableBit[0] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[0])); in HAL_TSIO_SGDMAIN_PidFltEnable()
869 u16PidFltEnableBit[1] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[1])); in HAL_TSIO_SGDMAIN_PidFltEnable()
870 u16PidFltEnableBit[2] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[2])); in HAL_TSIO_SGDMAIN_PidFltEnable()
871 u16PidFltEnableBit[3] = _HAL_REG16_R(&(_TSOCtrl2->SG_PDFLT_SVID_EN[3])); in HAL_TSIO_SGDMAIN_PidFltEnable()
893 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[0]), u16PidFltEnableBit[0]); in HAL_TSIO_SGDMAIN_PidFltEnable()
894 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[1]), u16PidFltEnableBit[1]); in HAL_TSIO_SGDMAIN_PidFltEnable()
895 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[2]), u16PidFltEnableBit[2]); in HAL_TSIO_SGDMAIN_PidFltEnable()
896 _HAL_REG16_W(&(_TSOCtrl2->SG_PDFLT_SVID_EN[3]), u16PidFltEnableBit[3]); in HAL_TSIO_SGDMAIN_PidFltEnable()
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