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Searched refs:_SET_ (Results 1 – 25 of 41) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/
H A DhalFQ.c166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
182 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fig_config3), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fig_config… in HAL_FQ_Read_Enable()
208 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
216 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config1), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Bypass()
228 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config1), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_BypassFilein()
244 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
252 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
262 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
270 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DhalFQ.c167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
171 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
205 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
213 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
231 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
247 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
252 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DhalFQ.c166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
180 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
188 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
204 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
212 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
222 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
230 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
251 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
[all …]
H A DhalFQ.h103 #define _SET_(flag, bit) ((flag) | (bit) ) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DhalFQ.c166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
180 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
188 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
204 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
212 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
222 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
230 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
251 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/otv/
H A DhalOTV.c190 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
194 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
217 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
235 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
250 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
268 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
282 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
295 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32EventWaterLevel<<OTV_INT_EVENT_WAT… in HAL_OTV_INT_SetEventWaterLevel()
303 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32TimerWaterLevel<<OTV_INT_TIME_WATE… in HAL_OTV_INT_SetTimerWaterLevel()
433 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_EventQ_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/
H A DhalFQ.c189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
203 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
211 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
227 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
245 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
253 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
269 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
274 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/otv/
H A DhalOTV.c198 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
202 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
225 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
243 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
258 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
276 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
290 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
303 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32EventWaterLevel<<OTV_INT_EVENT_WAT… in HAL_OTV_INT_SetEventWaterLevel()
311 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32TimerWaterLevel<<OTV_INT_TIME_WATE… in HAL_OTV_INT_SetTimerWaterLevel()
441 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_EventQ_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/otv/
H A DhalOTV.c198 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
202 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
225 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
243 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
258 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
276 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
290 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
303 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32EventWaterLevel<<OTV_INT_EVENT_WAT… in HAL_OTV_INT_SetEventWaterLevel()
311 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32TimerWaterLevel<<OTV_INT_TIME_WATE… in HAL_OTV_INT_SetTimerWaterLevel()
441 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_EventQ_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/otv/
H A DhalOTV.c198 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
202 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
225 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
243 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
258 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
276 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
290 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
303 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32EventWaterLevel<<OTV_INT_EVENT_WAT… in HAL_OTV_INT_SetEventWaterLevel()
311 …_SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2),(u32TimerWaterLevel<<OTV_INT_TIME_WATE… in HAL_OTV_INT_SetTimerWaterLevel()
441 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _SET_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_EventQ_Enable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/
H A DhalFQ.c209 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
224 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
234 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
242 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
258 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
266 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
276 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
283 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
361 …FQ16_W(&(_REGFIQ[0].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[0].Reg_fiq_config0)), FIQ_CFG0_… in HAL_FQ_SaveRegs()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/
H A DhalFQ.c209 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
224 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
234 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
242 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
258 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
266 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
276 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
283 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
361 …FQ16_W(&(_REGFIQ[0].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[0].Reg_fiq_config0)), FIQ_CFG0_… in HAL_FQ_SaveRegs()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/
H A DhalFQ.c210 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
225 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
243 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
259 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
267 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
277 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
284 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
361 …FQ16_W(&(_REGFIQ[0].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[0].Reg_fiq_config0)), FIQ_CFG0_… in HAL_FQ_SaveRegs()
[all …]
H A DhalFQ.h103 #define _SET_(flag, bit) ((flag) | (bit) ) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/
H A DhalFQ.c210 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
225 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
243 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
259 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
267 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
277 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
284 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
361 …FQ16_W(&(_REGFIQ[0].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[0].Reg_fiq_config0)), FIQ_CFG0_… in HAL_FQ_SaveRegs()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/
H A DhalFQ.c180 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
184 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
194 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
202 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
218 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
226 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
236 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
243 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
258 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
263 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
H A DhalFQ.h103 #define _SET_(flag, bit) ((flag) | (bit) ) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/
H A DhalFQ.c177 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
191 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
199 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
215 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
254 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
259 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
H A DhalFQ.h103 #define _SET_(flag, bit) ((flag) | (bit) ) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c116 #define _SET_(flag, bit) ((flag) | (bit) ) macro
119 #define REG16_SET(reg, value) REG16_W(reg, _SET_(REG16_R(reg), value))
120 #define REG32_SET(reg, value) REG32_W(reg, _SET_(REG32_R(reg), value))
600 …TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
603 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
604 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
605 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
606 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
607 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC4_CLK) = _SET_(TSP_CLKGEN1_REG(REG_CLKGEN1_STC4_CLK),(REG_CLKGEN1… in HAL_TSP_Power()
608 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC5_CLK) = _SET_(TSP_CLKGEN1_REG(REG_CLKGEN1_STC5_CLK),(REG_CLKGEN1… in HAL_TSP_Power()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c108 #define _SET_(flag, bit) ((flag) | (bit) ) macro
111 #define REG16_SET(reg, value) REG16_W(reg, _SET_(REG16_R(reg), value))
112 #define REG32_SET(reg, value) REG32_W(reg, _SET_(REG32_R(reg), value))
483 …TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
487 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
489 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
492 …TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
495 …TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK),(REG_CLKGE… in HAL_TSP_Power()
499 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
501 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c133 #define _SET_(flag, bit) ((flag) | (bit) ) macro
136 #define REG16_SET(reg, value) REG16_W(reg, _SET_(REG16_R(reg), value))
137 #define REG32_SET(reg, value) REG32_W(reg, _SET_(REG32_R(reg), value))
710 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
712 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
714 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC2_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
716 …TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK) = _SET_(TSP_CLKGEN2_REG(REG_CLKGEN2_STC3_CLK),(REG_CLKGEN2… in HAL_TSP_Power()
719 …TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
722 …TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK),(REG_CLKGE… in HAL_TSP_Power()
726 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c136 #define _SET_(flag, bit) ((flag) | (bit) ) macro
139 #define REG16_SET(reg, value) REG16_W(reg, _SET_(REG16_R(reg), value))
140 #define REG32_SET(reg, value) REG32_W(reg, _SET_(REG32_R(reg), value))
691 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
693 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
696 …TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
699 …TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK),(REG_CLKGE… in HAL_TSP_Power()
703 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
705 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
707 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c115 #define _SET_(flag, bit) ((flag) | (bit) ) macro
118 #define REG16_SET(reg, value) REG16_W(reg, _SET_(REG16_R(reg), value))
119 #define REG32_SET(reg, value) REG32_W(reg, _SET_(REG32_R(reg), value))
615 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC0_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
617 …TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STC1_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
620 …TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_STAMP_CLK),(REG_CLKGEN0… in HAL_TSP_Power()
623 …TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_PARSER_CLK),(REG_CLKGE… in HAL_TSP_Power()
627 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS0_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
629 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS1_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
631 …TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK) = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS2_CLK),(REG_CLKGEN0_T… in HAL_TSP_Power()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/multi_pvr/
H A DhalMultiPVR.c145 #define _SET_(flag, bit) ((flag) | (bit)) macro
148 #define REG16_SET(reg, value) REG16_W(reg, _SET_(REG16_R(reg), value))
149 #define REG32_SET(reg, value) REG32_W(reg, _SET_(REG32_R(reg), value))

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