| /utopia/UTPA2-700.0.x/modules/graphic/hal/mustang/gop/ |
| H A D | regGOP.h | 133 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
151 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/maldives/gop/ |
| H A D | regGOP.h | 133 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
148 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/messi/gop/ |
| H A D | regGOP.h | 134 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
155 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/mainz/gop/ |
| H A D | regGOP.h | 134 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
155 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/mooney/gop/ |
| H A D | regGOP.h | 133 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
152 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/macan/gop/ |
| H A D | regGOP.h | 135 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
158 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/manhattan/gop/ |
| H A D | regGOP.h | 136 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
162 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/M7621/gop/ |
| H A D | regGOP.h | 137 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
170 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/maxim/gop/ |
| H A D | regGOP.h | 137 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
170 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/k6/gop/ |
| H A D | regGOP.h | 144 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
179 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/M7821/gop/ |
| H A D | regGOP.h | 138 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
169 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/k6lite/gop/ |
| H A D | regGOP.h | 144 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
179 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/maserati/gop/ |
| H A D | regGOP.h | 138 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
169 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/curry/gop/ |
| H A D | regGOP.h | 143 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
177 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/kano/gop/ |
| H A D | regGOP.h | 143 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
177 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/gop/ |
| H A D | regGOP.h | 142 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22) macro
175 #define GOP_SC_OCMIXER REG_SC_BK37_22_L
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_sc.c | 5771 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
5779 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
5787 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
5795 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
5904 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
5914 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
5924 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
5934 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_sc.c | 6414 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
6422 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
6430 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
6438 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
6547 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
6557 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
6567 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
6577 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_sc.c | 6494 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
6502 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
6510 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
6518 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
6627 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
6637 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
6647 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
6657 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_sc.c | 6941 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
6949 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
6957 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
6965 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
7074 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
7084 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
7094 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
7104 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_sc.c | 6961 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
6969 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
6977 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
6985 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
7094 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
7104 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
7114 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
7124 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_sc.c | 7239 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
7247 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
7255 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
7263 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
7372 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
7382 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
7392 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
7402 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_sc.c | 7239 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(0):0x00, BIT(0)); in MHAL_SC_set_osdc_mixer_bypass_enable()
7247 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(1):0x00, BIT(1)); in MHAL_SC_set_osdc_mixer_inv_alpha_enable()
7255 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(2):0x00, BIT(2)); in MHAL_SC_set_osdc_mixer_hs_n_vfde_enable()
7263 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, bEnable?BIT(3):0x00, BIT(3)); in MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable()
7372 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(0))); in MHAL_SC_get_osdc_mixer_bypass_status()
7382 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(1))>>1); in MHAL_SC_get_osdc_mixer_inv_alpha_status()
7392 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(2))>>2); in MHAL_SC_get_osdc_mixer_hs_n_vfde_status()
7402 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK37_22_L, BIT(3))>>3); in MHAL_SC_get_osdc_mixer_hfde_n_vfde_status()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/pnl/include/ |
| H A D | pnl_hwreg_utility2.h | 835 #define REG_SC_BK37_22_L _PK_L_(0x37, 0x22) macro
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_sc.h | 11360 #define REG_SC_BK37_22_L _PK_L_(0x37, 0x22) macro
|