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Searched refs:REG_MIU_SEL_SVQTX5_MASK (Results 1 – 5 of 5) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DregTSO.h862 #define REG_MIU_SEL_SVQTX5_MASK 0x0300 macro
H A DhalTSO.c1864 …Ctrl1->REG_TSO_MIU_SEL_1) & (~REG_MIU_SEL_SVQTX5_MASK)) | ((u8MiuSel << REG_MIU_SEL_SVQTX5_SHIFT) … in HAL_TSO_SVQBuf_Set()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c1870 …Ctrl1->REG_TSO_MIU_SEL_1) & (~REG_MIU_SEL_SVQTX5_MASK)) | ((u8MiuSel << REG_MIU_SEL_SVQTX5_SHIFT) … in HAL_TSO_SVQBuf_Set()
H A DregTSO.h890 #define REG_MIU_SEL_SVQTX5_MASK 0x0300 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DregTSO.h895 #define REG_MIU_SEL_SVQTX5_MASK 0x0300 macro