Searched refs:REG_CLKGEN2_TSO5_IN (Results 1 – 5 of 5) sorted by relevance
161 #define REG_CLKGEN2_TSO5_IN 0x0a macro444 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()481 u16Reg = REG_CLKGEN2_TSO5_IN; in HAL_TSO_Set_InClk()2095 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2111 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
161 #define REG_CLKGEN2_TSO5_IN 0x0a macro444 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()484 u16Reg = REG_CLKGEN2_TSO5_IN; in HAL_TSO_Set_InClk()2160 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2176 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
161 #define REG_CLKGEN2_TSO5_IN 0x0a macro442 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()482 u16Reg = REG_CLKGEN2_TSO5_IN; in HAL_TSO_Set_InClk()2166 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2182 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()
162 #define REG_CLKGEN2_TSO5_IN 0x0a macro445 u16data = TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) & REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_GetInputTSIF_Status()485 u16Reg = REG_CLKGEN2_TSO5_IN; in HAL_TSO_Set_InClk()2158 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) &= ~REG_CLKGEN0_TSO_IN_MASK; in HAL_TSO_PowerCtrl()2174 TSO_CLKGEN2_REG(REG_CLKGEN2_TSO5_IN) |= REG_CLKGEN0_TSO_IN_DISABLE; in HAL_TSO_PowerCtrl()