Searched refs:REG_CLKGEN0_TS_SRC_DMD0 (Results 1 – 12 of 12) sorted by relevance
110 #define REG_CLKGEN0_TS_SRC_DMD0 0x000F macro
829 *pu32CLKSrc = REG_CLKGEN0_TS_SRC_DMD0; in _TSP_Hal_TSPAD2RelatedReg_Mapping()
119 #define REG_CLKGEN0_TS_SRC_DMD0 0x000F macro
1352 *pu32CLKSrc = REG_CLKGEN0_TS_SRC_DMD0; in _TSP_Hal_TSPAD2RelatedReg_Mapping()
116 #define REG_CLKGEN0_TS_SRC_DMD0 0x000F macro
116 #define REG_CLKGEN0_TS_SRC_DMD0 0x000E macro
1383 *pu32CLKSrc = REG_CLKGEN0_TS_SRC_DMD0; in _TSP_Hal_TSPAD2RelatedReg_Mapping()
979 clk_src = REG_CLKGEN0_TS_SRC_DMD0; in HAL_TSP_TSIF_SelPad()1286 *pu32CLKSrc = REG_CLKGEN0_TS_SRC_DMD0; in _TSP_Hal_TSPAD2RelatedReg_Mapping()