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Searched refs:REG_BACKEND (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3264 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3266 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3264 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3266 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3109 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3111 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3252 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3254 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3252 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3254 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3109 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3111 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBS.c135 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3109 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3111 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBS.c132 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3058 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3060 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBS.c132 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3239 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3241 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBS.c132 #define REG_BACKEND 0x1F00//_REG_BACKEND macro
3261 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2+1, &u8Data);// DVBSFEC_UNCRT_PKT_NUM_15_8… in INTERN_DVBS_GetPacketErr()
3263 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(REG_BACKEND+0x33*2, &u8Data); in INTERN_DVBS_GetPacketErr()