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Searched refs:PM_REG_READ (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/cec/
H A Dmhal_cec.c117 #define PM_REG_READ MDrv_ReadByte macro
184 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
215 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
216 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
261 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
311 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
313 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
335 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/cec/
H A Dmhal_cec.c123 #define PM_REG_READ MDrv_ReadByte macro
172 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
203 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
204 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
249 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
297 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
299 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
320 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
355 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
361 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/cec/
H A Dmhal_cec.c123 #define PM_REG_READ MDrv_ReadByte macro
172 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
203 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
204 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
249 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
297 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
299 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
320 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
355 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
361 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/cec/
H A Dmhal_cec.c116 #define PM_REG_READ MDrv_ReadByte macro
183 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
214 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
215 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
260 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
310 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
312 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
334 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/cec/
H A Dmhal_cec.c116 #define PM_REG_READ MDrv_ReadByte macro
183 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFrame()
214 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
215 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
260 if((PM_REG_READ(L_BK_CEC(0x05))== 1) && (PM_REG_READ(H_BK_CEC(0x05))== 0)) // CEC idle in mhal_CEC_SendFramex()
310 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
312 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
334 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
370 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
376 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/cec/
H A Dmhal_cec.c119 #define PM_REG_READ MDrv_ReadByte macro
196 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFrame()
197 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFrame()
282 } while((PM_REG_READ(H_BK_CEC(0x11))&0x0E)==0); in mhal_CEC_SendFramex()
284 res = (PM_REG_READ(H_BK_CEC(0x11))&0x0E); in mhal_CEC_SendFramex()
299 PM_REG_WRITE(L_BK_CEC(0x02), (PM_REG_READ(L_BK_CEC(0x02)) & 0x0F) |(mylogicaladdress<<4)); in mhal_CEC_SetMyAddress()
335 PM_REG_WRITE(H_BK_CEC(0x03),PM_REG_READ(H_BK_CEC(0x03))&(~ BIT(4))); // [4]: Standby mode; in mhal_CEC_Init()
341 PM_REG_WRITE(L_BK_CEC(0x30),PM_REG_READ(L_BK_CEC(0x30))|BIT(0)); // enable CEC multiple function in mhal_CEC_Init()
345 reg_val1 = PM_REG_READ(L_BK_CEC(0x03)); in mhal_CEC_Init()
355 return (PM_REG_READ(H_BK_CEC(0x11))& 0x01 ? TRUE : FALSE); in mhal_CEC_IsMessageReceived()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c140 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c140 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c141 #define PM_REG_READ(reg) PM_R1BYTE(reg, 7:0) macro

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