Searched refs:HW4_CFG39_FLUSH_PVR_DATA (Results 1 – 12 of 12) sorted by relevance
1860 #define HW4_CFG39_FLUSH_PVR_DATA 0x0001 macro
4250 REG16_SET(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()4251 REG16_CLR(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()
1898 #define HW4_CFG39_FLUSH_PVR_DATA 0x0001 macro
5610 REG16_SET(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()5611 REG16_CLR(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()
1900 #define HW4_CFG39_FLUSH_PVR_DATA 0x0001 macro
1980 #define HW4_CFG39_FLUSH_PVR_DATA 0x0001 macro
1952 #define HW4_CFG39_FLUSH_PVR_DATA 0x0001 macro
2029 #define HW4_CFG39_FLUSH_PVR_DATA 0x0001 macro
6125 REG16_SET(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()6126 REG16_CLR(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()
5754 REG16_SET(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()5755 REG16_CLR(&_RegCtrl3->CFG3_39,HW4_CFG39_FLUSH_PVR_DATA); in HAL_PVR_FlushData()