Searched refs:HW4_CFG38_CA_PVR2_SEL_MASK (Results 1 – 12 of 12) sorted by relevance
1853 #define HW4_CFG38_CA_PVR2_SEL_MASK 0x0C00 macro
5441 u16value &= ~(HW4_CFG38_CA_PVR2_SEL_MASK|HW4_CFG38_PKT192_SPS_EN2); in HAL_TSP_CAPVR_SPSEnable()
1891 #define HW4_CFG38_CA_PVR2_SEL_MASK 0x0C00 macro
6858 u16value &= ~(HW4_CFG38_CA_PVR2_SEL_MASK|HW4_CFG38_PKT192_SPS_EN2); in HAL_TSP_CAPVR_SPSEnable()
1893 #define HW4_CFG38_CA_PVR2_SEL_MASK 0x0C00 macro
1973 #define HW4_CFG38_CA_PVR2_SEL_MASK 0x0C00 macro
1945 #define HW4_CFG38_CA_PVR2_SEL_MASK 0x0C00 macro
2022 #define HW4_CFG38_CA_PVR2_SEL_MASK 0x0C00 macro
7405 u16value &= ~(HW4_CFG38_CA_PVR2_SEL_MASK|HW4_CFG38_PKT192_SPS_EN2); in HAL_TSP_CAPVR_SPSEnable()
7056 u16value &= ~(HW4_CFG38_CA_PVR2_SEL_MASK|HW4_CFG38_PKT192_SPS_EN2); in HAL_TSP_CAPVR_SPSEnable()