Searched refs:HW4_CFG38_CA_PVR1_SEL_MASK (Results 1 – 12 of 12) sorted by relevance
1851 #define HW4_CFG38_CA_PVR1_SEL_MASK 0x0300 macro
5438 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()
1889 #define HW4_CFG38_CA_PVR1_SEL_MASK 0x0300 macro
6855 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()
1891 #define HW4_CFG38_CA_PVR1_SEL_MASK 0x0300 macro
1971 #define HW4_CFG38_CA_PVR1_SEL_MASK 0x0300 macro
1943 #define HW4_CFG38_CA_PVR1_SEL_MASK 0x0300 macro
2020 #define HW4_CFG38_CA_PVR1_SEL_MASK 0x0300 macro
7402 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()
7053 u16value &= ~(HW4_CFG38_CA_PVR1_SEL_MASK|HW4_CFG38_PKT192_SPS_EN1); in HAL_TSP_CAPVR_SPSEnable()