Searched refs:HDCP_mode (Results 1 – 7 of 7) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/hdmi/drv/hdmitx/include/ |
| H A D | halHDMITx.h | 657 INTERFACEE void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode);
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/ |
| H A D | halHDMITx.c | 747 void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode) in MHal_HDMITX_SetHDCPConfig() argument
749 MHal_HDMITx_Mask_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MODE_01, 0x0E00, HDCP_mode << 8); in MHal_HDMITX_SetHDCPConfig()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/ |
| H A D | halHDMITx.c | 774 void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode) in MHal_HDMITX_SetHDCPConfig() argument
776 MHal_HDMITx_Mask_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MODE_01, 0x0E00, HDCP_mode << 8); in MHal_HDMITX_SetHDCPConfig()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/ |
| H A D | halHDMITx.c | 796 void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode) in MHal_HDMITX_SetHDCPConfig() argument
798 MHal_HDMITx_Mask_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MODE_01, 0x0E00, HDCP_mode << 8); in MHal_HDMITX_SetHDCPConfig()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/ |
| H A D | halHDMITx.c | 784 void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode) in MHal_HDMITX_SetHDCPConfig() argument
786 MHal_HDMITx_Mask_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MODE_01, 0x0E00, HDCP_mode << 8); in MHal_HDMITX_SetHDCPConfig()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/ |
| H A D | halHDMITx.c | 918 void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode) in MHal_HDMITX_SetHDCPConfig() argument
920 MHal_HDMITx_Mask_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MODE_01, 0x0E00, HDCP_mode << 8); in MHal_HDMITX_SetHDCPConfig()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/ |
| H A D | halHDMITx.c | 973 void MHal_HDMITX_SetHDCPConfig(MS_U8 HDCP_mode) in MHal_HDMITX_SetHDCPConfig() argument
975 MHal_HDMITx_Mask_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MODE_01, 0x0E00, HDCP_mode << 8); in MHal_HDMITX_SetHDCPConfig()
|