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Searched refs:HAL_MIU2_BASE (Results 1 – 25 of 112) sorted by relevance

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/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DhalCHIP.h129 #define HAL_MIU2_BASE 0xC0000000UL // macro
133 #define HAL_MIU2_BASE 0x100000000UL // macro
136 #define HAL_MIU2_BASE 0xC0000000UL // macro
155 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
158 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
165 {PhysAddr = Offset + HAL_MIU2_BASE;}
171 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
174 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
181 {PhysAddr = Offset + HAL_MIU2_BASE;}
187 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DhalCHIP.h126 #define HAL_MIU2_BASE 0xC0000000UL // macro
130 #define HAL_MIU2_BASE 0x100000000UL // macro
133 #define HAL_MIU2_BASE 0xC0000000UL // macro
151 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
154 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
161 {PhysAddr = Offset + HAL_MIU2_BASE;}
167 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
170 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
177 {PhysAddr = Offset + HAL_MIU2_BASE;}
183 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DhalCHIP.h129 #define HAL_MIU2_BASE 0xC0000000UL // macro
132 #define HAL_MIU2_BASE 0xC0000000UL // macro
143 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
146 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
153 {PhysAddr = Offset + HAL_MIU2_BASE;}
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DhalCHIP.h126 #define HAL_MIU2_BASE 0xC0000000UL // macro
129 #define HAL_MIU2_BASE 0xC0000000UL // macro
139 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
142 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
149 {PhysAddr = Offset + HAL_MIU2_BASE;}
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DhalCHIP.h126 #define HAL_MIU2_BASE 0xC0000000UL // macro
129 #define HAL_MIU2_BASE 0xC0000000UL // macro
139 … else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \
142 … {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;}
149 {PhysAddr = Offset + HAL_MIU2_BASE;}
/utopia/UTPA2-700.0.x/modules/msos/hal/mustang/msos/linux/
H A DhalMPool.c140 else if( (u32PhyAddr >= HAL_MIU1_BASE) && (u32PhyAddr < HAL_MIU2_BASE) ) // MIU1 in HAL_MsOS_MPool_PA2BA()
143 u32BusAddr = u32PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; // MIU2 in HAL_MsOS_MPool_PA2BA()
158 u32PhyAddr = u32BusAddr - HAL_MIU2_BUS_BASE + HAL_MIU2_BASE; // MIU2 in HAL_MsOS_MPool_BA2PA()
/utopia/UTPA2-700.0.x/modules/msos/hal/M7621/msos/linux/
H A DhalMPool.c156 else if((u64PhyAddr >= HAL_MIU1_BASE) && (u64PhyAddr < HAL_MIU2_BASE)) //MIU1 in HAL_MsOS_MPool_PA2BA()
159 u64BusAddr = u64PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; in HAL_MsOS_MPool_PA2BA()
173 u64PhyAddr = u64BusAddr - HAL_MIU2_BUS_BASE + HAL_MIU2_BASE; in HAL_MsOS_MPool_BA2PA()
/utopia/UTPA2-700.0.x/modules/msos/hal/maldives/msos/linux/
H A DhalMPool.c140 else if( (u32PhyAddr >= HAL_MIU1_BASE) && (u32PhyAddr < HAL_MIU2_BASE) ) // MIU1 in HAL_MsOS_MPool_PA2BA()
143 u32BusAddr = u32PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; // MIU2 in HAL_MsOS_MPool_PA2BA()
158 u32PhyAddr = u32BusAddr - HAL_MIU2_BUS_BASE + HAL_MIU2_BASE; // MIU2 in HAL_MsOS_MPool_BA2PA()
/utopia/UTPA2-700.0.x/modules/msos/hal/maxim/msos/linux/
H A DhalMPool.c156 else if((u64PhyAddr >= HAL_MIU1_BASE) && (u64PhyAddr < HAL_MIU2_BASE)) //MIU1 in HAL_MsOS_MPool_PA2BA()
159 u64BusAddr = u64PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; in HAL_MsOS_MPool_PA2BA()
173 u64PhyAddr = u64BusAddr - HAL_MIU2_BUS_BASE + HAL_MIU2_BASE; in HAL_MsOS_MPool_BA2PA()
/utopia/UTPA2-700.0.x/modules/msos/hal/M7821/msos/linux/
H A DhalMPool.c156 else if((u64PhyAddr >= HAL_MIU1_BASE) && (u64PhyAddr < HAL_MIU2_BASE)) //MIU1 in HAL_MsOS_MPool_PA2BA()
159 u64BusAddr = u64PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; in HAL_MsOS_MPool_PA2BA()
173 u64PhyAddr = u64BusAddr - HAL_MIU2_BUS_BASE + HAL_MIU2_BASE; in HAL_MsOS_MPool_BA2PA()
/utopia/UTPA2-700.0.x/modules/msos/hal/maserati/msos/linux/
H A DhalMPool.c156 else if((u64PhyAddr >= HAL_MIU1_BASE) && (u64PhyAddr < HAL_MIU2_BASE)) //MIU1 in HAL_MsOS_MPool_PA2BA()
159 u64BusAddr = u64PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; in HAL_MsOS_MPool_PA2BA()
173 u64PhyAddr = u64BusAddr - HAL_MIU2_BUS_BASE + HAL_MIU2_BASE; in HAL_MsOS_MPool_BA2PA()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/
H A DhalFQ.c141 #ifdef HAL_MIU2_BASE in _HAL_FQ_MIU_OFFSET()
142 if(Phyaddr >= (MS_PHY)HAL_MIU2_BASE) in _HAL_FQ_MIU_OFFSET()
143 return ((MS_PHY)HAL_MIU2_BASE & 0xFFFFFFFFUL); in _HAL_FQ_MIU_OFFSET()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/
H A DhalFQ.c141 #ifdef HAL_MIU2_BASE in _HAL_FQ_MIU_OFFSET()
142 if(Phyaddr >= (MS_PHY)HAL_MIU2_BASE) in _HAL_FQ_MIU_OFFSET()
143 return ((MS_PHY)HAL_MIU2_BASE & 0xFFFFFFFFUL); in _HAL_FQ_MIU_OFFSET()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/
H A DhalFQ.c142 #ifdef HAL_MIU2_BASE in _HAL_FQ_MIU_OFFSET()
143 if(Phyaddr >= (MS_PHY)HAL_MIU2_BASE) in _HAL_FQ_MIU_OFFSET()
144 return ((MS_PHY)HAL_MIU2_BASE & 0xFFFFFFFFUL); in _HAL_FQ_MIU_OFFSET()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/
H A DhalFQ.c142 #ifdef HAL_MIU2_BASE in _HAL_FQ_MIU_OFFSET()
143 if(Phyaddr >= (MS_PHY)HAL_MIU2_BASE) in _HAL_FQ_MIU_OFFSET()
144 return ((MS_PHY)HAL_MIU2_BASE & 0xFFFFFFFFUL); in _HAL_FQ_MIU_OFFSET()
/utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/ge/
H A DhalGE.c290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
333 return (HAL_MIU2_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1))); in _GFXAPI_PHYS_ADDR_2_API()
1822 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7821/ge/
H A DhalGE.c301 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
322 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
324 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
1730 if(PhyAddr>= HAL_MIU2_BASE) in GE_SetVCmdBuffer()
1916 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/maxim/ge/
H A DhalGE.c288 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
309 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
1652 if(PhyAddr>= HAL_MIU2_BASE) in GE_SetVCmdBuffer()
1838 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6/ge/
H A DhalGE.c290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
333 return (HAL_MIU2_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1))); in _GFXAPI_PHYS_ADDR_2_API()
1868 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/M7621/ge/
H A DhalGE.c288 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
309 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
311 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
1652 if(PhyAddr>= HAL_MIU2_BASE) in GE_SetVCmdBuffer()
1838 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/curry/ge/
H A DhalGE.c290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
333 return (HAL_MIU2_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1))); in _GFXAPI_PHYS_ADDR_2_API()
1822 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/kano/ge/
H A DhalGE.c290 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
311 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
313 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
333 return (HAL_MIU2_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1))); in _GFXAPI_PHYS_ADDR_2_API()
1829 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/k6lite/ge/
H A DhalGE.c287 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
308 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
310 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
330 return (HAL_MIU2_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1))); in _GFXAPI_PHYS_ADDR_2_API()
1865 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/graphic/hal/maserati/ge/
H A DhalGE.c301 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_MIU_ID()
322 if(ge_fbaddr>=HAL_MIU2_BASE) in _GFXAPI_PHYS_ADDR_IN_MIU()
324 return (ge_fbaddr -= HAL_MIU2_BASE); in _GFXAPI_PHYS_ADDR_IN_MIU()
1730 if(PhyAddr>= HAL_MIU2_BASE) in GE_SetVCmdBuffer()
1916 *value = HAL_MIU2_BASE; in GE_Get_MIU_INTERVAL()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/mmfi/
H A DhalMMFilein.c164 #ifdef HAL_MIU2_BASE in _HAL_MMFI_MIU_OFFSET()
165 if(Phyaddr >= (MS_PHY)HAL_MIU2_BASE) in _HAL_MMFI_MIU_OFFSET()
166 return (MS_PHY)HAL_MIU2_BASE; in _HAL_MMFI_MIU_OFFSET()

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