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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HAL_CHIP_H_ 96 #define _HAL_CHIP_H_ 97 98 99 100 #ifdef __cplusplus 101 extern "C" 102 { 103 #endif 104 105 //------------------------------------------------------------------------------------------------- 106 // Macro and Define 107 //------------------------------------------------------------------------------------------------- 108 109 typedef enum 110 { 111 E_CHIP_MIU_0 = 0, 112 E_CHIP_MIU_1, 113 E_CHIP_MIU_2, 114 E_CHIP_MIU_3, 115 E_CHIP_MIU_NUM, 116 } CHIP_MIU_ID; 117 118 #define ARM_CLOCK_FREQ 1008000000 119 #define MIPS_CLOCK_FREQ 900000000 120 #define AEON_CLOCK_FREQ 240000000 121 #define XTAL_CLOCK_FREQ 12000000 122 123 #define HAL_MIU0_BASE 0x00000000UL 124 #if defined(__AEONR2__) 125 #define HAL_MIU1_BASE 0x40000000UL // 1512MB 126 #define HAL_MIU2_BASE 0xC0000000UL // 127 #else 128 #define HAL_MIU1_BASE 0x80000000UL // 1512MB 129 #define HAL_MIU2_BASE 0xC0000000UL // 130 #endif 131 132 133 #define HAL_MIU0_BUS_BASE 0x20000000UL // MIU0 Low 256MB 134 #define HAL_MIU1_BUS_BASE 0xA0000000UL // MIU1 Low 256MB MUJI: 0xA0000000UL 135 #define HAL_MIU2_BUS_BASE 0x300000000UL // 64 bit mapping 136 137 #define _phy_to_miu_offset(MiuSel, Offset, PhysAddr) if (PhysAddr < HAL_MIU1_BASE) \ 138 {MiuSel = E_CHIP_MIU_0; Offset = PhysAddr;} \ 139 else if ((PhysAddr >= HAL_MIU1_BASE) && (PhysAddr < HAL_MIU2_BASE)) \ 140 {MiuSel = E_CHIP_MIU_1; Offset = PhysAddr - HAL_MIU1_BASE;} \ 141 else \ 142 {MiuSel = E_CHIP_MIU_2; Offset = PhysAddr - HAL_MIU2_BASE;} 143 144 #define _miu_offset_to_phy(MiuSel, Offset, PhysAddr) if (MiuSel == E_CHIP_MIU_0) \ 145 {PhysAddr = Offset;} \ 146 else if (MiuSel == E_CHIP_MIU_1) \ 147 {PhysAddr = Offset + HAL_MIU1_BASE;} \ 148 else \ 149 {PhysAddr = Offset + HAL_MIU2_BASE;} 150 151 #define SUPPORT TRUE 152 #define NONSUPPORT FALSE 153 154 #define CHIP_IP_MFE SUPPORT 155 #define CHIP_IP_VE SUPPORT 156 #define CHIP_IP_AVD SUPPORT 157 #define CHIP_IP_DEMOD SUPPORT 158 #define CHIP_IP_VBI SUPPORT 159 #define CHIP_IP_VIF SUPPORT 160 #define CHIP_IP_DMX SUPPORT 161 #define CHIP_IP_CEC SUPPORT 162 #define CHIP_IP_MBX SUPPORT 163 #define CHIP_IP_SWI2C SUPPORT 164 #define CHIP_IP_BDMA SUPPORT 165 #define CHIP_IP_CPU SUPPORT 166 #define CHIP_IP_GPIO SUPPORT 167 #define CHIP_IP_HWI2C SUPPORT 168 #define CHIP_IP_IR SUPPORT 169 #define CHIP_IP_MIU SUPPORT 170 #define CHIP_IP_MPIF NONSUPPORT 171 #define CHIP_IP_MSPI SUPPORT 172 #define CHIP_IP_PM SUPPORT 173 #define CHIP_IP_PWM SUPPORT 174 #define CHIP_IP_PWS SUPPORT 175 #define CHIP_IP_RTC SUPPORT 176 #define CHIP_IP_SAR SUPPORT 177 #define CHIP_IP_URDMA SUPPORT 178 #define CHIP_IP_WDT SUPPORT 179 #define CHIP_IP_AESDMA SUPPORT 180 #define CHIP_IP_CA NONSUPPORT 181 #define CHIP_IP_PCMCIA SUPPORT 182 #define CHIP_IP_SC SUPPORT 183 #define CHIP_IP_GPD SUPPORT 184 #define CHIP_IP_JPEG SUPPORT 185 #define CHIP_IP_VDEC SUPPORT 186 #define CHIP_IP_ACE SUPPORT 187 #define CHIP_IP_DAC NONSUPPORT 188 #define CHIP_IP_DDC2BI SUPPORT 189 #define CHIP_IP_DIP SUPPORT 190 #define CHIP_IP_DLC SUPPORT 191 #define CHIP_IP_GOP SUPPORT 192 #define CHIP_IP_HDMITX NONSUPPORT 193 #define CHIP_IP_MHL SUPPORT 194 #define CHIP_IP_MVOP SUPPORT 195 #define CHIP_IP_PNL SUPPORT 196 #define CHIP_IP_XC SUPPORT 197 #define CHIP_IP_GFX SUPPORT 198 #define CHIP_IP_AUDIO SUPPORT 199 #define CHIP_IP_SERFLASH SUPPORT 200 201 //------------------------------------------------------------------------------------------------- 202 // Type and Structure 203 //------------------------------------------------------------------------------------------------- 204 205 206 //------------------------------------------------------------------------------------------------- 207 // Function and Variable 208 //------------------------------------------------------------------------------------------------- 209 void CHIP_InitISR(void); 210 MS_BOOL CHIP_InISRContext(void); 211 MS_BOOL CHIP_AttachISR(InterruptNum eIntNum, InterruptCb pIntCb); 212 MS_BOOL CHIP_DetachISR(InterruptNum eIntNum); 213 MS_BOOL CHIP_EnableIRQ(InterruptNum eIntNum); 214 MS_BOOL CHIP_DisableIRQ(InterruptNum eIntNum); 215 MS_BOOL CHIP_EnableAllInterrupt(void); 216 MS_BOOL CHIP_DisableAllInterrupt(void); 217 MS_BOOL CHIP_DebugIRQ(InterruptNum eIntNum, IrqDebugOpt eIrqDebugOpt); 218 MS_BOOL CHIP_CompleteIRQ(InterruptNum eIntNum); 219 220 221 #ifdef __cplusplus 222 } 223 #endif 224 225 #endif // _HAL_CHIP_H_ 226 227