1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 // Software and any modification/derivatives thereof.
18 // No right, ownership, or interest to MStar Software and any
19 // modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 // supplied together with third party`s software and the use of MStar
23 // Software may require additional licenses from third parties.
24 // Therefore, you hereby agree it is your sole responsibility to separately
25 // obtain any and all third party right and license necessary for your use of
26 // such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 // MStar`s confidential information and you agree to keep MStar`s
30 // confidential information in strictest confidence and not disclose to any
31 // third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 // kind. Any warranties are hereby expressly disclaimed by MStar, including
35 // without limitation, any warranties of merchantability, non-infringement of
36 // intellectual property rights, fitness for a particular purpose, error free
37 // and in conformity with any international standard. You agree to waive any
38 // claim against MStar for any loss, damage, cost or expense that you may
39 // incur related to your use of MStar Software.
40 // In no event shall MStar be liable for any direct, indirect, incidental or
41 // consequential damages, including without limitation, lost of profit or
42 // revenues, lost or damage of data, and unauthorized system use.
43 // You agree that this Section 4 shall still apply without being affected
44 // even if MStar Software has been modified by MStar in accordance with your
45 // request or instruction for your use, except otherwise agreed by both
46 // parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 // services in relation with MStar Software to you for your use of
50 // MStar Software in conjunction with your or your customer`s product
51 // ("Services").
52 // You understand and agree that, except otherwise agreed by both parties in
53 // writing, Services are provided on an "AS IS" basis and the warranty
54 // disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 // or otherwise:
58 // (a) conferring any license or right to use MStar name, trademark, service
59 // mark, symbol or any other identification;
60 // (b) obligating MStar or any of its affiliates to furnish any person,
61 // including without limitation, you and your customers, any assistance
62 // of any kind whatsoever, or any information; or
63 // (c) conferring any license or right under any intellectual property right.
64 //
65 // 7. These terms shall be governed by and construed in accordance with the laws
66 // of Taiwan, R.O.C., excluding its conflict of law rules.
67 // Any and all dispute arising out hereof or related hereto shall be finally
68 // settled by arbitration referred to the Chinese Arbitration Association,
69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 // Rules of the Association by three (3) arbitrators appointed in accordance
71 // with the said Rules.
72 // The place of arbitration shall be in Taipei, Taiwan and the language shall
73 // be English.
74 // The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // ("MStar Confidential Information") by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
88 // copying, use, reproduction, sale, distribution, modification, disassembling,
89 // reverse engineering and compiling of the contents of MStar Confidential
90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 #include "MsCommon.h"
100 #ifndef MSOS_TYPE_LINUX_KERNEL
101 #include <string.h>
102 #endif
103 #include "regGE.h"
104 #include "drvGE.h"
105 #include "halGE.h"
106 #include "halCHIP.h"
107 #ifdef MSOS_TYPE_LINUX
108 #include "halMPool.h"
109 #endif
110 #ifdef CONFIG_MSTAR_CLKM
111 #include "drvCLKM.h"
112 #endif
113 //-------------------------------------------------------------------------------------------------
114 // Driver Compiler Options
115 //-------------------------------------------------------------------------------------------------
116 #define GE_DITHER_RAND_ENABLE 0UL //[TBD] Add new option for SetDither if rand is used in the future.
117 #define GE_PATCH_ENABLE 0UL
118
119 #define GE_LOG_ENABLE 0UL
120 #define MS_DEBUG 1UL
121
122 //-------------------------------------------------------------------------------------------------
123 // Local Defines
124 //-------------------------------------------------------------------------------------------------
125 #define GE_MIU_ADDR_MASK 0x7FFFFFFFUL
126
127 #define GE_CMDQ_FREECNT() ((GE_REG(REG_GE_STAT)&GE_STAT_CMDQ_MASK)>>GE_STAT_CMDQ_SHFT)
128 #define GE_VCMDQ_FREECNT() (GE_REG(REG_GE_VCMDQ_STAT) + ((GE_REG(REG_GE_BIST_STAT)&GE_VCMDQ_STAT_H_MASK) << 16))
129
130 #define GE_BUSY() (GE_REG(REG_GE_STAT) & GE_STAT_BUSY)
131
132 #define GE_CMDQ_ENABLE 1UL // Always Enable
133 #define GE_CMD_SIZE_MAX GE_STAT_CMDQ_MAX
134 #define GE_VCMD_SIZE_MAX GE_STAT_VCMDQ_MAX
135 #define GE_CMD_SIZE 1UL // 1 queue entry available for 2 commands, but we just check entry for convenience
136
137 #define GE_MAP_VCMD_SIZE_TO_HWDEF(x) ((x))
138
139 #define GE_YIELD() MsOS_YieldTask()
140
141 #ifdef MS_DEBUG
142 #define GE_DBG(_fmt, _args...) GE_H_DBUG(_fmt, ##_args)
143 #else
144 #define GE_DBG(_fmt, _args...) { }
145 #endif
146 #define GE_BURST_LEN 128UL
147
148 //-------------------------------------------------------------------------------------------------
149 // Local Structures
150 //-------------------------------------------------------------------------------------------------
151
152
153 //-------------------------------------------------------------------------------------------------
154 // Global Variables
155 //------------------------------------------------------------------------------------------------- // line pattern reset
156
157
158 const MS_U8 _GE_Reg_Backup[] = {
159 REG_GE_EN, REG_GE_CFG, REG_GE_TH, REG_GE_ROP2, REG_GE_BLEND, REG_GE_ALPHA, REG_GE_ALPHA_CONST,
160 REG_GE_SCK_HTH_L, REG_GE_SCK_HTH_H, REG_GE_SCK_LTH_L, REG_GE_SCK_LTH_H, REG_GE_DCK_HTH_L,
161 REG_GE_DCK_HTH_H, REG_GE_DCK_LTH_L, REG_GE_DCK_LTH_H, REG_GE_OP_MODE, REG_GE_ATEST_TH,
162 REG_GE_YUV_MODE, REG_GE_SRC_BASE_L, REG_GE_SRC_BASE_H, REG_GE_DST_BASE_L, REG_GE_DST_BASE_H,
163 REG_GE_SRC_PITCH, REG_GE_DST_PITCH, REG_GE_FMT,
164 0x0035, 0x0036, 0x0037, 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, // I0~I4
165 0x003f, 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, 0x0048, // I5-I9
166 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, 0x0050, 0x0051, 0x0052, // I10-I14
167 0x0053, 0x0054, // I15
168 REG_GE_CLIP_L, REG_GE_CLIP_R, REG_GE_CLIP_T, REG_GE_CLIP_B, REG_GE_ROT_MODE, REG_GE_BLT_SCK_MODE,
169 REG_GE_BLT_SCK_CONST_L, REG_GE_BLT_SCK_CONST_H, REG_GE_BLT_DST_X_OFST, REG_GE_BLT_DST_Y_OFST,
170 REG_GE_LINE_DELTA, REG_GE_LINE_STYLE, REG_GE_LINE_LENGTH, REG_GE_BLT_SRC_DX, REG_GE_BLT_SRC_DY,
171 REG_GE_ITALIC_OFFSET, REG_GE_ITALIC_DELTA, REG_GE_PRIM_V0_X, REG_GE_PRIM_V0_Y, REG_GE_PRIM_V1_X,
172 REG_GE_PRIM_V1_Y, REG_GE_PRIM_V2_X, REG_GE_PRIM_V2_Y, REG_GE_BLT_SRC_W, REG_GE_BLT_SRC_H,
173 REG_GE_PRIM_C_L, REG_GE_PRIM_C_H, REG_GE_PRIM_RDX_L, REG_GE_PRIM_RDX_H, REG_GE_PRIM_RDY_L,
174 REG_GE_PRIM_RDY_H, REG_GE_PRIM_GDX_L, REG_GE_PRIM_GDX_H, REG_GE_PRIM_GDY_L, REG_GE_PRIM_GDY_H,
175 REG_GE_PRIM_BDX_L, REG_GE_PRIM_BDX_H, REG_GE_PRIM_BDY_L, REG_GE_PRIM_BDY_H, REG_GE_PRIM_ADX,
176 REG_GE_PRIM_ADY, 0xFF
177 };
178
179 //-------------------------------------------------------------------------------------------------
180 // Debug Functions
181 //-------------------------------------------------------------------------------------------------
182
183
184 //------------------------------------------------------------------------------
185 // Local Var
186 //------------------------------------------------------------------------------
187 GE_CHIP_PROPERTY g_GeChipPro =
188 {
189 .WordUnit = GE_WordUnit,
190
191 .bSupportFourePixelMode = TRUE,
192 .bFourPixelModeStable = TRUE,
193
194 .bSupportMultiPixel = FALSE,
195 .bSupportSpiltMode = TRUE,
196 .bSupportTwoSourceBitbltMode = FALSE,
197 .bSupportTLBMode = FALSE,
198 .MIUSupportMaxNUM = GE_MAX_MIU,
199 .BltDownScaleCaps =
200 {
201 .u8RangeMax = 1,
202 .u8RangeMin = 32,
203 .u8ContinuousRangeMin = 1,
204 .bFullRangeSupport = TRUE,
205
206 .u8ShiftRangeMax = 0, /// 1 = 2^0 = 1<<0
207 .u8ShiftRangeMin = 5, /// 32 = 2^5 = 1<<5
208 .u8ShiftContinuousRangeMin = 0, /// 1 = 2^0 = 1<<0
209 }
210 };
211
212 //-------------------------------------------------------------------------------------------------
213 // Local Functions
214 //-------------------------------------------------------------------------------------------------
GE_Chip_Proprity_Init(GE_CTX_HAL_LOCAL * pGEHalLocal)215 void GE_Chip_Proprity_Init(GE_CTX_HAL_LOCAL *pGEHalLocal)
216 {
217 pGEHalLocal->pGeChipPro = &g_GeChipPro;
218 }
219
_GE_SetBltScaleRatio2HW(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_ScaleInfo * pScaleinfo)220 GE_Result _GE_SetBltScaleRatio2HW(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_ScaleInfo *pScaleinfo)
221 {
222 MS_U16 u16RegVal;
223
224 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SRC_DX, (MS_U16)(pScaleinfo->x&0xFFFF));
225 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SRC_DY, (MS_U16)(pScaleinfo->y&0xFFFF));
226 //Set Initial DeltaX, DeltaY:
227 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST, (MS_U16)(pScaleinfo->init_x&0xFFFF));
228 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST, (MS_U16)(pScaleinfo->init_y&0xFFFF));
229
230 //set MSBs of REG_GE_BLT_SRC_DY, REG_GE_BLT_SRC_DY:
231 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST) & ~(GE_STBB_DX_MSB);
232 u16RegVal |= (((pScaleinfo->x>>16)<<GE_STBB_DX_MSB_SHFT) & GE_STBB_DX_MSB);
233 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST, u16RegVal);
234
235 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST) & ~(GE_STBB_DY_MSB);
236 u16RegVal |= (((pScaleinfo->y>>16)<<GE_STBB_DY_MSB_SHFT) & GE_STBB_DY_MSB);
237 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST, u16RegVal);
238
239 return E_GE_OK;
240 }
241
GE_SetActiveCtrlMiu1(GE_CTX_HAL_LOCAL * pGEHalLocal)242 void GE_SetActiveCtrlMiu1(GE_CTX_HAL_LOCAL *pGEHalLocal)
243 {
244 MIU1_REG(MIU1_GEGROUP) = MIU1_REG(MIU1_GEGROUP)|MIU1_GE_CLIENT;
245 }
246
247 //-------------------------------------------------------------------------------------------------
248 // Global Functions
249 //-------------------------------------------------------------------------------------------------
GE_DumpReg(GE_CTX_HAL_LOCAL * pGEHalLocal)250 static void GE_DumpReg(GE_CTX_HAL_LOCAL *pGEHalLocal)
251 {
252 MS_U32 i;
253
254 GE_H_INFO("Dump GE register:\n");
255 for (i = 0; i < 0x80; i++)
256 {
257 if(i % 0x08 == 0) {
258 GE_H_INFO(" \n");
259 GE_H_INFO("h%02x ", (MS_U8)i );
260 }
261 GE_H_INFO("%04x ", GE_REG(i) );
262 }
263
264 GE_H_INFO(" \n");
265 }
_GET_MIU_MASK_SHIFT(void)266 static MS_U32 _GET_MIU_MASK_SHIFT(void)
267 {
268 if (HAL_MIU1_BASE==0x20000000)
269 return (29UL);
270 else if (HAL_MIU1_BASE==0x10000000)
271 return (28UL);
272 else if (HAL_MIU1_BASE==0x8000000)
273 return (27UL);
274 else if (HAL_MIU1_BASE==0x4000000)
275 return (26UL);
276 else if (HAL_MIU1_BASE==0x60000000)
277 return (29UL);
278 else
279 {
280 GE_H_ERR("\n[%s] !!!!!! get miu1 base error!!!!!!", __FUNCTION__);
281 return (27UL); //default return case
282 }
283 }
284
_GFXAPI_MIU_ID(MS_PHY ge_fbaddr)285 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr)
286 {
287 #if 1
288 if(ge_fbaddr>=HAL_MIU2_BASE)
289 {
290 return 2;
291 }
292 else if(ge_fbaddr>=HAL_MIU1_BASE)
293 {
294 return 1;
295 }
296 else
297 {
298 return 0;
299 }
300 #else
301 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1)));
302
303 #endif
304 }
305
_GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr)306 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr)
307 {
308 #if 1
309 if(ge_fbaddr>=HAL_MIU2_BASE)
310 {
311 return (ge_fbaddr -= HAL_MIU2_BASE);
312 }
313 else if(ge_fbaddr>=HAL_MIU1_BASE)
314 {
315 return (ge_fbaddr -= HAL_MIU1_BASE);
316 }
317 else
318 {
319 return (ge_fbaddr);
320 }
321 #else
322 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1));
323 #endif
324 }
325
_GFXAPI_PHYS_ADDR_2_API(MS_U8 u8MIUId,MS_PHY ge_addrInMIU)326 MS_PHY _GFXAPI_PHYS_ADDR_2_API(MS_U8 u8MIUId, MS_PHY ge_addrInMIU)
327 {
328 #if 1
329 if(u8MIUId == 1)
330 {
331 return (HAL_MIU1_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
332 }
333 else
334 {
335 return (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1));
336 }
337 #else
338
339 return (((((MS_U32)(u8MIUId))&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))<<_GET_MIU_MASK_SHIFT()) | \
340 (((MS_U32)(ge_addrInMIU))&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
341 #endif
342 }
343
GE_Reset(GE_CTX_HAL_LOCAL * pGEHalLocal)344 static void GE_Reset(GE_CTX_HAL_LOCAL *pGEHalLocal)
345 {
346 MS_U16 reg0, reg1;
347
348 reg0 = GE_REG(REG_GE_EN);
349 reg1 = GE_REG(REG_GE_CFG);
350
351 GE_REG(REG_GE_EN) = 0;
352 GE_REG(REG_GE_CFG) = 0;
353
354 GE_REG(REG_GE_EN) = reg0;
355 GE_REG(REG_GE_CFG) = reg1;
356
357 }
358
GE_MapVQ2Reg(GE_VcmqBufSize enBufSize)359 static MS_U8 GE_MapVQ2Reg(GE_VcmqBufSize enBufSize)
360 {
361 switch(enBufSize)
362 {
363 case E_GE_VCMD_4K:
364 return GE_VQ_8K;
365 case E_GE_VCMD_8K:
366 return GE_VQ_8K;
367 case E_GE_VCMD_16K:
368 return GE_VQ_16K;
369 case E_GE_VCMD_32K:
370 return GE_VQ_32K;
371 case E_GE_VCMD_64K:
372 return GE_VQ_64K;
373 case E_GE_VCMD_128K:
374 return GE_VQ_128K;
375 case E_GE_VCMD_256K:
376 return GE_VQ_256K;
377 case E_GE_VCMD_512K:
378 return GE_VQ_512K;
379 case E_GE_VCMD_1024K:
380 return GE_VQ_1024K;
381 default:
382 return 0;
383 }
384 }
385
GE_WaitCmdQAvail(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U32 u32Count)386 void GE_WaitCmdQAvail(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U32 u32Count)
387 {
388 #if GE_CMDQ_ENABLE
389
390 #ifdef MS_DEBUG
391 MS_U32 waitcount = 0;
392 #endif
393 MS_U16 tmp1 = 0;
394 MS_U32 u32CmdMax;
395
396 /// VCMQ enabled
397 if((GE_REG(REG_GE_CFG) & GE_CFG_VCMDQ) != 0)
398 {
399 // 16 Bytes one command in VCMDQ.
400 u32CmdMax = (512 << (GE_REG(REG_GE_VCMDQ_SIZE) & 0x7));
401 u32Count = MIN(u32CmdMax, u32Count);
402
403 while (GE_CMDQ_FREECNT() < u32Count)
404 {
405 #ifdef MS_DEBUG
406 if (waitcount >= 0x80000)
407 {
408 GE_H_INFO("[GE] V0 Wait command queue: %d : %tx, %tx\n", tmp1, (ptrdiff_t)GE_CMDQ_FREECNT(), (ptrdiff_t)u32Count);
409 waitcount = 0;
410 tmp1++;
411 if(tmp1 > 10)
412 {
413 GE_DumpReg(pGEHalLocal);
414 GE_Reset(pGEHalLocal);
415 }
416 }
417 waitcount++;
418 #endif
419 GE_YIELD();
420 }
421 tmp1 = 0;
422 waitcount = 0;
423
424
425 //If u32Count >= u32CmdMax, It will be dead loop. But since it won't happen, and if match
426 //Full VCMDQ, hw will hang, so keep the logic.
427 while ( (MS_U32)GE_VCMDQ_FREECNT() >= (MS_U32)(u32CmdMax- u32Count))
428 {
429 #ifdef MS_DEBUG
430 if (waitcount >= 0x80000)
431 {
432 GE_H_INFO("[GE] Wait VCMQ : %d : %tx, %tx\n", tmp1, (ptrdiff_t)GE_VCMDQ_FREECNT(), (ptrdiff_t)u32Count);
433 waitcount = 0;
434 tmp1++;
435 if(tmp1 > 10)
436 {
437 GE_DumpReg(pGEHalLocal);
438 GE_Reset(pGEHalLocal);
439 }
440 }
441 waitcount++;
442 #endif
443 GE_YIELD();
444 }
445 }
446 else
447 {
448 u32Count = MIN(GE_CMD_SIZE_MAX, u32Count);
449
450 while (GE_CMDQ_FREECNT() < u32Count)
451 {
452 #ifdef MS_DEBUG
453 if (waitcount >= 0x80000)
454 {
455 GE_H_INFO("[GE] Wait command queue: %d : %x, %tx\n", tmp1, GE_CMDQ_FREECNT(), (ptrdiff_t)u32Count);
456 waitcount = 0;
457 tmp1++;
458 if(tmp1 > 10)
459 {
460 GE_DumpReg(pGEHalLocal);
461 GE_Reset(pGEHalLocal);
462 }
463 }
464 waitcount++;
465 #endif
466 GE_YIELD();
467 }
468
469 }
470
471 #endif
472 }
473
GE_ConvertAPIAddr2HAL(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8MIUId,MS_PHY PhyGE_APIAddrInMIU)474 MS_PHY GE_ConvertAPIAddr2HAL(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8MIUId, MS_PHY PhyGE_APIAddrInMIU)
475 {
476 PhyGE_APIAddrInMIU &= (1UL<<MIU_SELETE_OFFSET)-1UL;
477 if(u8MIUId==1)
478 PhyGE_APIAddrInMIU |= 1UL<<MIU_SELETE_OFFSET;
479 return PhyGE_APIAddrInMIU;
480 }
GE_ConvertHALAddr2API(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8MIUId,MS_PHY PhyGE_HALAddr)481 MS_PHY GE_ConvertHALAddr2API(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8MIUId, MS_PHY PhyGE_HALAddr)
482 {
483 return _GFXAPI_PHYS_ADDR_2_API(u8MIUId, PhyGE_HALAddr&((1UL<<MIU_SELETE_OFFSET)-1));
484 }
485
GE_WaitIdle(GE_CTX_HAL_LOCAL * pGEHalLocal)486 void GE_WaitIdle(GE_CTX_HAL_LOCAL *pGEHalLocal)
487 {
488 #ifdef MS_DEBUG
489 MS_U32 waitcount = 0;
490 #endif
491 MS_U16 tmp1 = 0;
492
493 GE_WriteReg(pGEHalLocal, REG_GE_TAG, GE_GetNextTAGID(pGEHalLocal, FALSE)); // write dummy
494 // GE will pack 2 register commands before CMDQ
495 // We need to push fifo if there is one command in the fifo before
496 // CMDQ. Then the GE status register will be consistant after idle.
497 GE_WaitCmdQAvail(pGEHalLocal, GE_STAT_CMDQ_MAX); // Wait CMDQ empty
498
499 // Wait level-2 command queue flush
500 while (((GE_REG(REG_GE_STAT)&GE_STAT_CMDQ2_MASK)>>GE_STAT_CMDQ2_SHFT) != GE_STAT_CMDQ2_MAX)
501 {
502 #ifdef MS_DEBUG
503 if (waitcount >= 0x80000)
504 {
505 GE_H_INFO("[GE] Wait Idle: %u : %tx\n", tmp1, (ptrdiff_t)GE_CMDQ_FREECNT());
506 waitcount = 0;
507 tmp1++;
508 if(tmp1 > 10)
509 {
510 GE_DumpReg(pGEHalLocal);
511 GE_Reset(pGEHalLocal);
512 }
513 }
514 waitcount++;
515 #endif
516
517 GE_YIELD();
518 }
519
520 #ifdef MS_DEBUG
521 waitcount = 0;
522 tmp1 = 0;
523 #endif
524 // Wait GE idle
525 while (GE_REG(REG_GE_STAT) & GE_STAT_BUSY)
526 {
527 #ifdef MS_DEBUG
528 if (waitcount >= 0x80000)
529 {
530 GE_H_INFO("[GE] Wait Busy: %d : %tx\n", tmp1, (ptrdiff_t)GE_CMDQ_FREECNT());
531 waitcount = 0;
532 tmp1++;
533 if(tmp1 > 10)
534 {
535 GE_DumpReg(pGEHalLocal);
536 GE_Reset(pGEHalLocal);
537 }
538 }
539 waitcount++;
540 #endif
541
542 GE_YIELD();
543 }
544
545 }
546
GE_Map_Share_Reg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)547 GE_Result GE_Map_Share_Reg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
548 {
549 if(addr == REG_GE_CFG)
550 return E_GE_OK;
551 else
552 return E_GE_FAIL;
553 #if 0
554 switch(addr)
555 {
556 case REG_GE_CFG:
557 return E_GE_OK;
558 default:
559 return E_GE_FAIL;
560 }
561 #endif
562
563 }
564
GE_Map_Share_RegEX(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)565 GE_Result GE_Map_Share_RegEX(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
566 {
567 return E_GE_FAIL;
568 }
569
GE_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)570 MS_U16 GE_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
571 {
572 MS_U16 u16NoFIFOMask;
573
574 if(GE_TABLE_REGNUM <= addr)
575 {
576 GE_WaitIdle(pGEHalLocal);
577 return GE_REG(addr-GE_TABLE_REGNUM);
578 }
579 switch (addr)
580 {//for registers which do not go through command queue
581 case REG_GE_EN:
582 u16NoFIFOMask = GE_EN_GE;
583 break;
584 /*
585 case REG_GE_CFG:
586 //u16NoFIFOMask = ~(GE_CFG_BLT_STRETCH|GE_CFG_EN_CLIPCHK|GE_CFG_BLT_ITALIC|GE_CFG_SRC_TILE|GE_CFG_DST_TILE);
587 return pGEHalLocal->u16RegImage[addr];
588 break;
589 */
590 case REG_GE_DBG:
591 case REG_GE_TH:
592 case REG_GE_BIST_STAT:
593 case REG_GE_STAT:
594 case REG_GE_VCMDQ_STAT:
595 case REG_GE_MIU_PROT_LTH_L(0):
596 case REG_GE_MIU_PROT_LTH_H(0):
597 case REG_GE_MIU_PROT_HTH_L(0):
598 case REG_GE_MIU_PROT_HTH_H(0):
599 case REG_GE_MIU_PROT_LTH_L(1):
600 case REG_GE_MIU_PROT_LTH_H(1):
601 case REG_GE_MIU_PROT_HTH_L(1):
602 case REG_GE_MIU_PROT_HTH_H(1):
603 case REG_GE_TAG:
604 case REG_GE_VCMDQ_BASE_L:
605 case REG_GE_VCMDQ_BASE_H:
606 u16NoFIFOMask = 0xffff;
607 break;
608 case REG_GE_VCMDQ_SIZE:
609 u16NoFIFOMask = GE_VCMDQ_SIZE_MASK;
610 break;
611 default:
612 u16NoFIFOMask = 0;
613 break;
614 }
615
616 if(0 == u16NoFIFOMask)
617 {
618 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
619 return pGEHalLocal->pHALShared->u16ShareRegImage[addr];
620 else
621 {
622 return pGEHalLocal->u16RegGETable[addr];
623 }
624 }
625 return (GE_REG(addr)&u16NoFIFOMask)|(pGEHalLocal->u16RegGETable[addr]&~u16NoFIFOMask);
626 }
627
628
GE_WriteReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)629 void GE_WriteReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
630 {
631 // CMDQ special command
632 if(addr < GE_TABLE_REGNUM)
633 {
634 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
635 {
636 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= value;
637 }
638
639 pGEHalLocal->u16RegGETable[addr] = value;
640 }
641 else
642 {
643 GE_H_DBUG("[%s][%d] Reg Index [%d]is out of GE_TABLE_REGNUM [0x%lx]range!!!!\n",__FUNCTION__,__LINE__, addr, GE_TABLE_REGNUM);
644 }
645
646 if(pGEHalLocal->pHALShared->bGE_DirectToReg ==TRUE)
647 {
648 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
649 GE_REG(addr)= value;
650 return;
651 }
652 else
653 {
654 MS_U16 i=0;
655
656 switch (addr)
657 {
658 case REG_GE_EN:
659 case REG_GE_CFG:
660 case REG_GE_DBG:
661 case REG_GE_TH:
662 case REG_GE_BIST_STAT:
663 case REG_GE_STAT:
664 case REG_GE_VCMDQ_STAT:
665 case REG_GE_MIU_PROT_LTH_L(0):
666 case REG_GE_MIU_PROT_LTH_H(0):
667 case REG_GE_MIU_PROT_HTH_L(0):
668 case REG_GE_MIU_PROT_HTH_H(0):
669 case REG_GE_MIU_PROT_LTH_L(1):
670 case REG_GE_MIU_PROT_LTH_H(1):
671 case REG_GE_MIU_PROT_HTH_L(1):
672 case REG_GE_MIU_PROT_HTH_H(1):
673 case REG_GE_TAG:
674 case REG_GE_VCMDQ_BASE_L:
675 case REG_GE_VCMDQ_BASE_H:
676 case REG_GE_VCMDQ_SIZE:
677
678 //Palette
679 case REG_GE_CLUT_L:
680 case REG_GE_CLUT_H:
681 case REG_GE_CLUT_CTRL:
682 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
683 GE_REG(addr) = value;
684 break;
685
686 case REG_GE_CMD:
687 GE_WaitIdle(pGEHalLocal);
688
689 for(i=0; i<GE_TABLE_REGNUM; i++)
690 {
691 //CMQ/Palette
692 if(i==REG_GE_EN || i==REG_GE_CFG || i==REG_GE_DBG || i==REG_GE_TH || i==REG_GE_VCMDQ_STAT || i==REG_GE_BIST_STAT \
693 || i==REG_GE_MIU_PROT_LTH_L(0) || i==REG_GE_MIU_PROT_LTH_H(0) || i==REG_GE_MIU_PROT_HTH_L(0) || i==REG_GE_MIU_PROT_HTH_H(0)\
694 || i==REG_GE_MIU_PROT_LTH_L(1) || i==REG_GE_MIU_PROT_LTH_H(1) || i==REG_GE_MIU_PROT_HTH_L(1) || i==REG_GE_MIU_PROT_HTH_H(1)\
695 || i==REG_GE_VCMDQ_BASE_L || i==REG_GE_VCMDQ_BASE_H || i==REG_GE_VCMDQ_SIZE \
696 || i==REG_GE_CLUT_L || i==REG_GE_CLUT_H || i==REG_GE_CLUT_CTRL || i==REG_GE_TAG)
697 {
698 continue;
699 }
700
701 if(i == REG_GE_CMD )
702 {
703 continue;
704 }
705
706 if(i == (GE_TABLE_REGNUM-1))
707 {
708 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
709 GE_REG(REG_GE_CMD)= pGEHalLocal->u16RegGETable[REG_GE_CMD];
710 }
711 else
712 {
713 if (GE_WordUnit/*256bit*//4/*32bit*/*16*2 < (GE_TABLE_REGNUM-20))
714 {
715 if(i%64==0)
716 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
717 }
718 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
719 }
720 }
721 break;
722 default:
723 #if GE_LOG_ENABLE
724 GE_LOG(addr, value);
725 #endif
726 break;
727 }
728
729 }
730
731 }
732
GE2_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)733 MS_U16 GE2_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
734 {
735 return 0;
736 }
737
GE_RestoreReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)738 void GE_RestoreReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
739 {
740 // CMDQ special command
741 switch (addr)
742 {
743 case REG_GE_CMD:
744 break;
745 //[OBSOLETE]
746 default:
747 GE_WriteReg(pGEHalLocal, addr, value);
748 break;
749 }
750 }
751
752
GE_ResetState(GE_CTX_HAL_LOCAL * pGEHalLocal)753 void GE_ResetState(GE_CTX_HAL_LOCAL *pGEHalLocal)
754 {
755 GE_WaitIdle(pGEHalLocal);
756
757 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE);
758 #if GE_DITHER_RAND_ENABLE
759 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE | GE_EN_DITHER_RAND); //fixed random dither by default
760 #endif
761 GE_WriteReg(pGEHalLocal, REG_GE_TH, 0x0000); //0(<half) will be default to be half
762
763 GE_WriteReg(pGEHalLocal, REG_GE_LINE_STYLE, GE_LINEPAT_RST);
764 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SCK_MODE, GE_BLT_SCK_NEAREST);
765 GE_WriteReg(pGEHalLocal, REG_GE_BLEND, GE_ALPHA_ARGB1555); //force alpha constant of ARGB"1"555 to be 1.0 by default
766 }
767
768
GE_Init_RegImage(GE_CTX_HAL_LOCAL * pGEHalLocal)769 void GE_Init_RegImage(GE_CTX_HAL_LOCAL *pGEHalLocal)
770 {
771 MS_U8 addr;
772
773 for(addr = 0; addr<GE_TABLE_REGNUM; addr++)
774 {
775 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
776 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= GE_REG(addr);
777 pGEHalLocal->u16RegGETable[addr] = GE_REG(addr);
778 }
779
780 }
781
GE_Init(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Config * cfg)782 void GE_Init(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_Config *cfg)
783 {
784 MS_U16 u16temp =0;
785
786 GE_WaitIdle(pGEHalLocal);
787
788 GE_SetClock(pGEHalLocal,TRUE);
789
790 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
791
792 if ((u16temp & BIT(1)) != BIT(1)) //if VQ is Not Enabled
793 {
794 #if GE_CMDQ_ENABLE
795 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
796 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16temp | GE_CFG_CMDQ); // enable command queue
797 #endif
798
799 // Set default FMT for avoiding 1st set buffinfo error.
800 GE_WriteReg(pGEHalLocal, REG_GE_FMT, (GE_FMT_ARGB1555<<GE_SRC_FMT_SHFT)+(GE_FMT_ARGB1555<<GE_DST_FMT_SHFT));
801
802 if (cfg->u32VCmdQSize >= GE_VCMDQ_SIZE_MIN)
803 {
804 MS_PHY PhyVQAddr = cfg->PhyVCmdQAddr;
805 MS_U32 u32VcmdqBufSz = cfg->u32VCmdQSize;
806
807 GE_SetVCmdBuffer(pGEHalLocal, PhyVQAddr, u32VcmdqBufSz);
808
809 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
810 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16temp | GE_CFG_VCMDQ);
811 }
812
813 GE_ResetState(pGEHalLocal);
814 }
815 else
816 {
817 //No need to set command queue
818 GE_H_DBUG(" warning!!! Virtual Command queue has been activated!! \n");
819 }
820 //GE_Init_RegImage(pGEHalLocal);
821
822 GE_WriteReg(pGEHalLocal, REG_GE_TH, GE_THRESHOLD_SETTING);
823 //Mask Interrupt
824 GE_WriteReg(pGEHalLocal, REG_GE_SRCMASK_GB, 0x00C0);
825
826 //enable dynamic clock gating
827 GE_EnableDynaClkGate(pGEHalLocal,TRUE);
828 }
829
GE_SetRotate(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RotateAngle geRotAngle)830 GE_Result GE_SetRotate(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RotateAngle geRotAngle)
831 {
832 MS_U16 u16RegVal;
833
834 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_ROT_MODE) & ~REG_GE_ROT_MODE_MASK) | (geRotAngle<<REG_GE_ROT_MODE_SHFT);
835 GE_WriteReg(pGEHalLocal, REG_GE_ROT_MODE, u16RegVal);
836
837 return E_GE_OK;
838 }
839
GE_SetOnePixelMode(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)840 GE_Result GE_SetOnePixelMode(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
841 {
842
843 MS_U16 u16en;
844 //GE_DBG("%s\n", __FUNCTION__);
845
846 u16en = GE_ReadReg(pGEHalLocal, REG_GE_EN);
847 if (enable)
848 {
849 u16en |= GE_EN_ONE_PIXEL_MODE;
850 }
851 else
852 {
853 u16en &= (~GE_EN_ONE_PIXEL_MODE);
854 }
855 u16en |= GE_EN_BURST;
856 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en);
857
858 return E_GE_OK;
859 }
860
GE_SetBlend(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_BlendOp eBlendOp)861 GE_Result GE_SetBlend(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_BlendOp eBlendOp)
862 {
863 MS_U16 u16op;
864
865 switch (eBlendOp)
866 {
867 case E_GE_BLEND_ONE:
868 case E_GE_BLEND_CONST:
869 case E_GE_BLEND_ASRC:
870 case E_GE_BLEND_ADST:
871 case E_GE_BLEND_ROP8_ALPHA:
872 case E_GE_BLEND_ROP8_SRCOVER:
873 case E_GE_BLEND_ROP8_DSTOVER:
874 case E_GE_BLEND_ZERO:
875 case E_GE_BLEND_CONST_INV:
876 case E_GE_BLEND_ASRC_INV:
877 case E_GE_BLEND_ADST_INV:
878 case E_GE_BLEND_ALPHA_ADST:
879 case E_GE_BLEND_SRC_ATOP_DST:
880 case E_GE_BLEND_DST_ATOP_SRC:
881 case E_GE_BLEND_SRC_XOR_DST:
882 case E_GE_BLEND_INV_CONST:
883
884 u16op = eBlendOp;
885 break;
886 default:
887 return E_GE_FAIL_PARAM;
888 break;
889 }
890
891 u16op = (GE_ReadReg(pGEHalLocal, REG_GE_BLEND) & ~GE_BLEND_MASK) | u16op;
892 GE_WriteReg(pGEHalLocal, REG_GE_BLEND, u16op);
893
894 return E_GE_OK;
895 }
896
897
GE_SetAlpha(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_AlphaSrc eAlphaSrc)898 GE_Result GE_SetAlpha(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_AlphaSrc eAlphaSrc)
899 {
900 MS_U16 u16src;
901
902 switch (eAlphaSrc)
903 {
904 case E_GE_ALPHA_CONST:
905 case E_GE_ALPHA_ASRC:
906 case E_GE_ALPHA_ADST:
907 case E_GE_ALPHA_ROP8_SRC:
908 case E_GE_ALPHA_ROP8_IN:
909 case E_GE_ALPHA_ROP8_DSTOUT:
910 case E_GE_ALPHA_ROP8_SRCOUT:
911 case E_GE_ALPHA_ROP8_OVER:
912 case E_GE_ALPHA_ROP8_INV_CONST:
913 case E_GE_ALPHA_ROP8_INV_ASRC:
914 case E_GE_ALPHA_ROP8_INV_ADST:
915 case E_GE_ALPHA_ROP8_SRC_ATOP_DST:
916 case E_GE_ALPHA_ROP8_DST_ATOP_SRC:
917 case E_GE_ALPHA_ROP8_SRC_XOR_DST:
918 case E_GE_ALPHA_ROP8_INV_SRC_ATOP_DST:
919 case E_GE_ALPHA_ROP8_INV_DST_ATOP_SRC:
920
921 u16src = eAlphaSrc;
922 break;
923 default:
924 return E_GE_FAIL_PARAM;
925 break;
926 }
927
928 u16src = (GE_ReadReg(pGEHalLocal, REG_GE_ALPHA) & ~GE_ALPHA_MASK) | (u16src<<GE_ALPHA_SHFT);
929 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA, u16src);
930
931 return E_GE_OK;
932 }
933
GE_QueryDFBBldCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 * pU16SupportedBldFlags)934 GE_Result GE_QueryDFBBldCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 *pU16SupportedBldFlags)
935 {
936 if(NULL == pU16SupportedBldFlags)
937 {
938 return E_GE_FAIL_PARAM;
939 }
940
941 (*pU16SupportedBldFlags) = E_GE_DFB_BLD_FLAG_ALL;
942
943 return E_GE_OK;
944 }
945
GE_EnableDFBBld(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)946 GE_Result GE_EnableDFBBld(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
947 {
948 MS_U16 u16RegVal;
949
950 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_EN);
951
952 if (enable)
953 {
954 u16RegVal |= GE_EN_DFB_BLD;
955 }
956 else
957 {
958 u16RegVal &= ~GE_EN_DFB_BLD;
959 }
960
961 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16RegVal);
962
963 return E_GE_OK;
964 }
965
GE_SetDFBBldFlags(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 u16DFBBldFlags)966 GE_Result GE_SetDFBBldFlags(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 u16DFBBldFlags)
967 {
968 MS_U16 u16RegVal;
969
970 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_FLAGS) & ~GE_DFB_BLD_FLAGS_MASK);
971
972 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_COLORALPHA)
973 {
974 u16RegVal |= GE_DFB_BLD_FLAG_COLORALPHA;
975 }
976
977 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_ALPHACHANNEL)
978 {
979 u16RegVal |= GE_DFB_BLD_FLAG_ALPHACHANNEL;
980 }
981
982 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_COLORIZE)
983 {
984 u16RegVal |= GE_DFB_BLD_FLAG_COLORIZE;
985 }
986
987 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_SRCPREMUL)
988 {
989 u16RegVal |= GE_DFB_BLD_FLAG_SRCPREMUL;
990 }
991
992 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_SRCPREMULCOL)
993 {
994 u16RegVal |= GE_DFB_BLD_FLAG_SRCPREMULCOL;
995 }
996
997 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_DSTPREMUL)
998 {
999 u16RegVal |= GE_DFB_BLD_FLAG_DSTPREMUL;
1000 }
1001
1002 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_XOR)
1003 {
1004 u16RegVal |= GE_DFB_BLD_FLAG_XOR;
1005 }
1006
1007 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_DEMULTIPLY)
1008 {
1009 u16RegVal |= GE_DFB_BLD_FLAG_DEMULTIPLY;
1010 }
1011
1012 GE_WriteReg(pGEHalLocal, REG_GE_DFB_BLD_FLAGS, u16RegVal);
1013
1014
1015 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_OP) & ~GE_DFB_SRC_COLORMASK);
1016
1017 if(u16DFBBldFlags & (E_GE_DFB_BLD_FLAG_SRCCOLORMASK | E_GE_DFB_BLD_FLAG_SRCALPHAMASK))
1018 {
1019 u16RegVal |= (1 << GE_DFB_SRC_COLORMASK_SHIFT);
1020 }
1021
1022
1023
1024 return E_GE_OK;
1025 }
1026
GE_SetDFBBldOP(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_DFBBldOP geSrcBldOP,GE_DFBBldOP geDstBldOP)1027 GE_Result GE_SetDFBBldOP(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_DFBBldOP geSrcBldOP, GE_DFBBldOP geDstBldOP)
1028 {
1029 MS_U16 u16RegVal;
1030
1031 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_OP) & ~(GE_DFB_SRCBLD_OP_MASK|GE_DFB_DSTBLD_OP_MASK));
1032 u16RegVal |= ((geSrcBldOP<<GE_DFB_SRCBLD_OP_SHFT) | (geDstBldOP<<GE_DFB_DSTBLD_OP_SHFT));
1033
1034 GE_WriteReg(pGEHalLocal, REG_GE_DFB_BLD_OP, u16RegVal);
1035
1036 return E_GE_OK;
1037 }
1038
GE_SetDFBBldConstColor(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RgbColor geRgbColor)1039 GE_Result GE_SetDFBBldConstColor(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RgbColor geRgbColor)
1040 {
1041 MS_U16 u16RegVal;
1042
1043 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_ALPHA_CONST) & ~GE_ALPHA_CONST_MASK) | (geRgbColor.a & 0xFF));
1044 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA_CONST, u16RegVal);
1045
1046 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_R_CONST) & ~GE_R_CONST_MASK) | ((geRgbColor.r<<GE_R_CONST_SHIFT) & GE_R_CONST_MASK));
1047 GE_WriteReg(pGEHalLocal, REG_GE_R_CONST, u16RegVal);
1048
1049 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_G_CONST) & ~GE_G_CONST_MASK) | ((geRgbColor.g<<GE_G_CONST_SHIFT) & GE_G_CONST_MASK));
1050 GE_WriteReg(pGEHalLocal, REG_GE_G_CONST, u16RegVal);
1051
1052 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_B_CONST) & ~GE_B_CONST_MASK) | ((geRgbColor.b<<GE_B_CONST_SHIFT) & GE_B_CONST_MASK));
1053 GE_WriteReg(pGEHalLocal, REG_GE_B_CONST, u16RegVal);
1054
1055 return E_GE_OK;
1056 }
1057
GE_SetDFBBldSrcColorMask(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RgbColor geRgbColor)1058 GE_Result GE_SetDFBBldSrcColorMask(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RgbColor geRgbColor)
1059 {
1060 //no more hw function
1061 /*
1062 MS_U16 u16RegVal;
1063
1064 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_ALPHA_CONST) & ~GE_ALPHA_SRCMASK_MASK) | (geRgbColor.a & 0xFF));
1065 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA_CONST, u16RegVal);
1066
1067 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_OP_MODE) & ~GE_SRCCOLOR_MASK_R) | ((geRgbColor.r<<GE_SRCCOLOR_MASK_R_SHIFT) & GE_SRCCOLOR_MASK_R));
1068 GE_WriteReg(pGEHalLocal, REG_GE_OP_MODE, u16RegVal);
1069
1070 u16RegVal = (geRgbColor.g<<GE_SRCCOLOR_MASK_G_SHIFT) | (geRgbColor.b<<GE_SRCCOLOR_MASK_B_SHIFT);
1071 GE_WriteReg(pGEHalLocal, REG_GE_SRCMASK_GB, u16RegVal);
1072 */
1073 return E_GE_OK;
1074 }
1075
1076
GE_WriteProtect(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 miu,MS_PHY addr_low,MS_PHY addr_high,GE_WPType eWPType)1077 GE_Result GE_WriteProtect(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 miu, MS_PHY addr_low, MS_PHY addr_high, GE_WPType eWPType)
1078 {
1079 MS_U16 u16cfg;
1080
1081 if (miu > 1)
1082 {
1083 return E_GE_FAIL;
1084 }
1085
1086 if ( (eWPType == E_GE_WP_IN_RANGE) || (eWPType == E_GE_WP_OUT_RANGE) )
1087 {
1088 // range setting
1089 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_LTH_L(miu), addr_low & (GE_MIU_ADDR_MASK&0xFFFF));
1090 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_LTH_H(miu), ((addr_low>>16) & (GE_MIU_ADDR_MASK>>16)) | (eWPType<<GE_MIU_PROT_MODE_SHFT));
1091 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_HTH_L(miu), addr_high & (GE_MIU_ADDR_MASK&0xFFFF));
1092 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_HTH_H(miu), (addr_high>>16) & (GE_MIU_ADDR_MASK>>16));
1093 // enable setting
1094 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_CFG) | (GE_CFG_MIU0_PROT << miu);
1095 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16cfg);
1096 }
1097 else if (eWPType == E_GE_WP_DISABLE)
1098 {
1099 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_CFG) & ~(GE_CFG_MIU0_PROT<<miu);
1100 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16cfg);
1101 }
1102 else
1103 {
1104 return E_GE_FAIL;
1105 }
1106
1107 return E_GE_OK;
1108 }
1109
1110
GE_SetSrcTile(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL tile)1111 GE_Result GE_SetSrcTile(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL tile)
1112 {
1113 //GE_DBG("%s\n", __FUNCTION__);
1114
1115 return E_GE_NOT_SUPPORT;
1116
1117 }
1118
1119
GE_SetDstTile(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL tile)1120 GE_Result GE_SetDstTile(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL tile)
1121 {
1122 //GE_DBG("%s\n", __FUNCTION__);
1123
1124 return E_GE_NOT_SUPPORT;
1125
1126 }
GE_SetASCK(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1127 GE_Result GE_SetASCK(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1128 {
1129 MS_U16 u16cfg;
1130
1131 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1132 if (enable)
1133 {
1134 u16cfg |= GE_EN_ASCK;
1135 }
1136 else
1137 {
1138 u16cfg &= ~GE_EN_ASCK;
1139 }
1140 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16cfg);
1141
1142 return E_GE_OK;
1143 }
GE_SetADCK(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1144 GE_Result GE_SetADCK(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1145 {
1146 MS_U16 u16cfg;
1147
1148 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1149 if (enable)
1150 {
1151 u16cfg |= GE_EN_DSCK;
1152 }
1153 else
1154 {
1155 u16cfg &= ~GE_EN_DSCK;
1156 }
1157 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16cfg);
1158
1159 return E_GE_OK;
1160 }
1161
1162
GE_GetFmtCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_BufFmt fmt,GE_BufType type,GE_FmtCaps * caps)1163 GE_Result GE_GetFmtCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_BufFmt fmt, GE_BufType type, GE_FmtCaps *caps)
1164 {
1165 static const MS_U8 _u8GETileWidth[] = {8, 4, 2, 0, 1};
1166
1167 caps->fmt = fmt;
1168 if (type == E_GE_BUF_SRC)
1169 {
1170 switch (fmt)
1171 {
1172 case E_GE_FMT_I1:
1173 case E_GE_FMT_I2:
1174 case E_GE_FMT_I4:
1175 case E_GE_FMT_I8:
1176 caps->u8BaseAlign = 1;
1177 caps->u8PitchAlign = 1;
1178 caps->u8Non1pAlign = 0;
1179 caps->u8HeightAlign = 1;
1180 caps->u8StretchAlign = 1;
1181 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1182 caps->u8TileWidthAlign = _u8GETileWidth[fmt];
1183 caps->u8TileHeightAlign = 16;
1184 break;
1185 case E_GE_FMT_RGB565:
1186 case E_GE_FMT_RGBA5551:
1187 case E_GE_FMT_RGBA4444:
1188 case E_GE_FMT_ARGB1555:
1189 case E_GE_FMT_1ABFgBg12355:
1190 case E_GE_FMT_ARGB4444:
1191 case E_GE_FMT_YUV422:
1192 case E_GE_FMT_FaBaFgBg2266:
1193 caps->u8BaseAlign = 2;
1194 caps->u8PitchAlign = 2;
1195 caps->u8Non1pAlign = 0;
1196 caps->u8HeightAlign = 1;
1197 caps->u8StretchAlign = 2;
1198 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1199 caps->u8TileWidthAlign = 16;
1200 caps->u8TileHeightAlign = 16;
1201 break;
1202 case E_GE_FMT_ABGR8888:
1203 case E_GE_FMT_ARGB8888:
1204 caps->u8BaseAlign = 4;
1205 caps->u8PitchAlign = 4;
1206 caps->u8Non1pAlign = 0;
1207 caps->u8HeightAlign = 1;
1208 caps->u8StretchAlign = 4;
1209 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1210 caps->u8TileWidthAlign = 8;
1211 caps->u8TileHeightAlign = 16;
1212 break;
1213 // Not Support
1214 default:
1215 caps->fmt = E_GE_FMT_GENERIC;
1216 caps->u8BaseAlign = 4;
1217 caps->u8PitchAlign = 4;
1218 caps->u8Non1pAlign = 0;
1219 caps->u8HeightAlign = 1;
1220 caps->u8StretchAlign = 4;
1221 caps->u8TileBaseAlign = 0;
1222 caps->u8TileWidthAlign = 0;
1223 caps->u8TileHeightAlign = 0;
1224 return E_GE_FAIL_FORMAT;
1225 }
1226 }
1227 else
1228 {
1229 switch (fmt)
1230 {
1231 case E_GE_FMT_I8:
1232 caps->u8BaseAlign = 1;
1233 caps->u8PitchAlign = 1;
1234 caps->u8Non1pAlign = 0;
1235 caps->u8HeightAlign = 1;
1236 caps->u8StretchAlign = 1;
1237 caps->u8TileBaseAlign = 8;
1238 caps->u8TileWidthAlign = _u8GETileWidth[fmt];
1239 caps->u8TileHeightAlign = 16;
1240 break;
1241 case E_GE_FMT_RGB565:
1242 case E_GE_FMT_ARGB1555:
1243 case E_GE_FMT_RGBA5551:
1244 case E_GE_FMT_RGBA4444:
1245 case E_GE_FMT_1ABFgBg12355:
1246 case E_GE_FMT_ARGB4444:
1247 case E_GE_FMT_YUV422:
1248 case E_GE_FMT_FaBaFgBg2266:
1249 case E_GE_FMT_ARGB1555_DST:
1250 caps->u8BaseAlign = 2;
1251 caps->u8PitchAlign = 2;
1252 caps->u8Non1pAlign = 0;
1253 caps->u8HeightAlign = 1;
1254 caps->u8StretchAlign = 2;
1255 caps->u8TileBaseAlign = 8;
1256 caps->u8TileWidthAlign = 16;
1257 caps->u8TileHeightAlign = 16;
1258 break;
1259 case E_GE_FMT_ABGR8888:
1260 case E_GE_FMT_ARGB8888:
1261 caps->u8BaseAlign = 4;
1262 caps->u8PitchAlign = 4;
1263 caps->u8Non1pAlign = 0;
1264 caps->u8HeightAlign = 1;
1265 caps->u8StretchAlign = 4;
1266 caps->u8TileBaseAlign = 8;
1267 caps->u8TileWidthAlign = 8;
1268 caps->u8TileHeightAlign = 16;
1269 break;
1270 // Not Support
1271 case E_GE_FMT_I1:
1272 case E_GE_FMT_I2:
1273 case E_GE_FMT_I4:
1274 default:
1275 caps->fmt = E_GE_FMT_GENERIC;
1276 caps->u8BaseAlign = 4;
1277 caps->u8PitchAlign = 4;
1278 caps->u8Non1pAlign = 0;
1279 caps->u8HeightAlign = 1;
1280 caps->u8StretchAlign = 4;
1281 caps->u8TileBaseAlign = 0;
1282 caps->u8TileWidthAlign = 0;
1283 caps->u8TileHeightAlign = 0;
1284 return E_GE_FAIL_FORMAT;
1285 }
1286 }
1287
1288 return E_GE_OK;
1289 }
1290
1291
GE_Set_IOMap_Base(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_VIRT addr)1292 GE_Result GE_Set_IOMap_Base(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_VIRT addr)
1293 {
1294 pGEHalLocal->va_mmio_base = addr;
1295 return E_GE_OK;
1296 }
1297
1298
direct_serial_diff(MS_U16 tagID1,MS_U16 tagID2)1299 static MS_S32 direct_serial_diff( MS_U16 tagID1, MS_U16 tagID2)
1300 {
1301 if(tagID1 < tagID2)
1302 {
1303 if((tagID2-tagID1)>0x7FFF)
1304 {
1305 return (MS_S32)(0xFFFFUL-tagID2+tagID1+1);
1306 }
1307 else
1308 return -(MS_S32)(tagID2-tagID1);
1309 }
1310 else
1311 {
1312 if((tagID1-tagID2)>0x7FFF)
1313 {
1314 return -(MS_S32)(0xFFFF-tagID1+tagID2+1);
1315 }
1316 else
1317 return (MS_S32)(tagID1-tagID2);
1318 }
1319 }
1320
1321 //-------------------------------------------------------------------------------------------------
1322 /// Wait GE TagID back
1323 /// @param tagID \b IN: tag id number for wating
1324 /// @return @ref GE_Result
1325 //-------------------------------------------------------------------------------------------------
GE_WaitTAGID(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 tagID)1326 GE_Result GE_WaitTAGID(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 tagID)
1327 {
1328 MS_U16 tagID_HW;
1329 MS_U32 u32Temp;
1330
1331
1332 while(1)
1333 {
1334
1335 tagID_HW = GE_ReadReg(pGEHalLocal, REG_GE_TAG);
1336 if(direct_serial_diff(tagID_HW, tagID) >= 0)
1337 {
1338 //printf("tagIDHW = %04x %04x\n", tagID_HW, tagID);
1339 break;
1340 }
1341
1342 u32Temp = GE_ReadReg(pGEHalLocal, REG_GE_STAT);
1343 if((u32Temp&GE_STAT_CMDQ_MASK) < (16UL<<11))
1344 continue;
1345 if((u32Temp&GE_STAT_CMDQ2_MASK) < (16UL<<3))
1346 continue;
1347 if(GE_ReadReg(pGEHalLocal, REG_GE_CFG) & GE_CFG_VCMDQ)
1348 {
1349 u32Temp = GE_ReadReg(pGEHalLocal, REG_GE_VCMDQ_STAT);
1350 u32Temp |= (GE_ReadReg(pGEHalLocal, REG_GE_BIST_STAT)&1)<<16;
1351 if(u32Temp)
1352 continue;
1353
1354 }
1355
1356 if(GE_ReadReg(pGEHalLocal, REG_GE_STAT) & GE_STAT_BUSY)
1357 continue;
1358
1359 break;
1360 GE_YIELD();
1361
1362 }
1363
1364 return E_GE_OK;
1365
1366 }
1367 //-------------------------------------------------------------------------------------------------
1368 /// MDrv_GE_SAVE_CHIP_IMAGE
1369 //-------------------------------------------------------------------------------------------------
GE_Restore_HAL_Context(GE_CTX_HAL_LOCAL * pGEHalLocal)1370 GE_Result GE_Restore_HAL_Context(GE_CTX_HAL_LOCAL *pGEHalLocal)
1371 {
1372 MS_U16 i = 0;
1373 MS_U16 u16RegVal;
1374
1375 //GE_WaitIdle(pGEHalLocal);
1376
1377 while( (_GE_Reg_Backup[i] != 0xFF) )
1378 {
1379 if(_GE_Reg_Backup[i]>= 0x80)
1380 {
1381 break;
1382 }
1383
1384 u16RegVal = GE_ReadReg(pGEHalLocal, _GE_Reg_Backup[i]);
1385 GE_RestoreReg(pGEHalLocal, _GE_Reg_Backup[i], u16RegVal);
1386 i++;
1387 }
1388
1389 //GE_DBG(printf("GE_Restore_HAL_Context finished \n\n"));
1390
1391 return E_GE_OK;
1392 }
1393
1394 //-------------------------------------------------------------------------------------------------
1395 /// Calculate Blit Scale Ratio:
1396 //-------------------------------------------------------------------------------------------------
GE_CalcBltScaleRatio(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 u16SrcWidth,MS_U16 u16SrcHeight,MS_U16 u16DstWidth,MS_U16 u16DstHeight,GE_ScaleInfo * pScaleinfo)1397 GE_Result GE_CalcBltScaleRatio(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 u16SrcWidth, MS_U16 u16SrcHeight, MS_U16 u16DstWidth, MS_U16 u16DstHeight, GE_ScaleInfo *pScaleinfo)
1398 {
1399 if(NULL == pScaleinfo)
1400 {
1401 return E_GE_FAIL_PARAM;
1402 }
1403
1404 if(u16SrcWidth >= (u16DstWidth<< g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1405 {
1406 pScaleinfo->x = 0xFFFFFFFF;
1407 }
1408 else
1409 {
1410 pScaleinfo->x = GE_Divide2Fixed(u16SrcWidth, u16DstWidth, g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin, 12);
1411 }
1412
1413 if(u16SrcHeight >= (u16DstHeight<< g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1414 {
1415 pScaleinfo->y = 0xFFFFFFFF;
1416 }
1417 else
1418 {
1419 pScaleinfo->y = GE_Divide2Fixed(u16SrcHeight, u16DstHeight, g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin, 12);
1420 }
1421
1422 /* HW use format S0.12 which means Bit(12) should be Sign bit
1423 // If overflow, S bit maybe wrong, handle it as actually value we hoped*/
1424 pScaleinfo->init_x = GE_Divide2Fixed(u16SrcWidth-u16DstWidth, 2 * u16DstWidth, 0, 12);
1425 if((u16SrcWidth/2) > u16DstWidth)
1426 {
1427 pScaleinfo->init_x = 0;
1428 }
1429 else if(u16SrcWidth >= u16DstWidth)
1430 {
1431 pScaleinfo->init_x &= (~(1<<12));
1432 }
1433 else
1434 {
1435 pScaleinfo->init_x |= (1<<12);
1436 }
1437
1438 pScaleinfo->init_y = GE_Divide2Fixed(u16SrcHeight-u16DstHeight, 2 * u16DstHeight, 0, 12);
1439 if((u16SrcHeight/2) > u16DstHeight)
1440 {
1441 pScaleinfo->init_y = 0;
1442 }
1443 else if(u16SrcHeight >= u16DstHeight)
1444 {
1445 pScaleinfo->init_y &= (~(1<<12));
1446 }
1447 else
1448 {
1449 pScaleinfo->init_y |= (1<<12);
1450 }
1451
1452 if (pGEHalLocal->bYScalingPatch)
1453 {
1454 if (u16SrcHeight<=5)
1455 pScaleinfo->init_y = (1<<12);
1456 }
1457 return E_GE_OK;
1458 }
1459
1460 //-------------------------------------------------------------------------------------------------
1461 /// Set GE scale register
1462 /// @param GE_Rect *src \b IN: src coordinate setting
1463 /// @param GE_DstBitBltType *dst \b IN: dst coordinate setting
1464 /// @return @ref GE_Result
1465 //-------------------------------------------------------------------------------------------------
GE_SetBltScaleRatio(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Rect * src,GE_DstBitBltType * dst,GE_Flag flags,GE_ScaleInfo * scaleinfo)1466 GE_Result GE_SetBltScaleRatio(GE_CTX_HAL_LOCAL *pGEHalLocal,GE_Rect *src, GE_DstBitBltType *dst, GE_Flag flags, GE_ScaleInfo* scaleinfo)
1467 {
1468 GE_ScaleInfo geScaleinfo, *pGeScaleInfo = scaleinfo;
1469
1470 if(flags & E_GE_FLAG_BYPASS_STBCOEF)
1471 {
1472 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1473 }
1474 else if (flags & E_GE_FLAG_BLT_STRETCH)
1475 {
1476 /* Safe Guard. Prevent set scaling ratio < 1/32. Also prevent 0 h/w */
1477 if ((src->width-1) >= (dst->dstblk.width << g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1478 {
1479 if(pGEHalLocal->bIsComp == FALSE)
1480 {
1481 return E_GE_FAIL_PARAM;
1482 }
1483
1484 dst->dstblk.width = ((src->width-1) >> g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin) + 1;
1485 }
1486 if ((src->height-1) >= (dst->dstblk.height << g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1487 {
1488 if(pGEHalLocal->bIsComp == FALSE)
1489 {
1490 return E_GE_FAIL_PARAM;
1491 }
1492
1493 dst->dstblk.height = ((src->height-1) >> g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin) + 1;
1494 }
1495
1496 pGeScaleInfo = &geScaleinfo;
1497 GE_CalcBltScaleRatio(pGEHalLocal, src->width, src->height, dst->dstblk.width, dst->dstblk.height, pGeScaleInfo);
1498 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1499 }
1500 else
1501 {
1502 pGeScaleInfo = &geScaleinfo;
1503
1504 pGeScaleInfo->x = (1<<12);
1505 pGeScaleInfo->y = (1<<12);
1506 pGeScaleInfo->init_x = 0;
1507 pGeScaleInfo->init_y = 0;
1508
1509 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1510 }
1511
1512 return E_GE_OK;
1513 }
1514
GE_BitBltEX_Trape(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Rect * pSrcRect,GE_Normalized_Trapezoid * pGENormTrapezoid,MS_U32 u32Flags,GE_ScaleInfo * pScaleinfo)1515 GE_Result GE_BitBltEX_Trape(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_Rect *pSrcRect, GE_Normalized_Trapezoid *pGENormTrapezoid, MS_U32 u32Flags, GE_ScaleInfo* pScaleinfo)
1516 {
1517 return E_GE_NOT_SUPPORT;
1518 }
1519
1520 //-------------------------------------------------------------------------------------------------
1521 /// GE Primitive Drawing - TRAPEZOID
1522 /// @param pGENormTrapezoid \b IN: pointer to position of TRAPEZOID
1523 /// @param u32ColorS \b IN: start color of TRAPEZOID when gradient
1524 /// @param u32ColorE \b IN: end color of TRAPEZOID when gradient
1525 /// @param pColorDeltaX \b IN: x gradient color
1526 /// @param pColorDeltaY \b IN: y gradient color
1527 /// @return @ref GE_Result
1528 //-------------------------------------------------------------------------------------------------
GE_FillTrapezoid(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bYTrapezoid,GE_Normalized_Trapezoid * pGENormTrapezoid,MS_U32 u32Color,GE_ColorDelta * pColorDeltaX,GE_ColorDelta * pColorDeltaY)1529 GE_Result GE_FillTrapezoid(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bYTrapezoid, GE_Normalized_Trapezoid *pGENormTrapezoid, MS_U32 u32Color, GE_ColorDelta *pColorDeltaX, GE_ColorDelta *pColorDeltaY)
1530 {
1531 return E_GE_NOT_SUPPORT;
1532 }
1533
1534 //-------------------------------------------------------------------------------------------------
1535 /// Set GE DISABLE MIU ACCESS
1536 /// @param enable \b IN: enable and update setting
1537 /// @return @ref GE_Result
1538 //-------------------------------------------------------------------------------------------------
GE_SetDisaMIUAccess(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1539 GE_Result GE_SetDisaMIUAccess(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1540 {
1541 MS_U16 u16en;
1542
1543 GE_DBG("%s\n", __FUNCTION__);
1544
1545 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1546 if (enable)
1547 {
1548 u16en |= GE_CFG_DISABLE_MIU_ACS;
1549 }
1550 else
1551 {
1552 u16en &= ~GE_CFG_DISABLE_MIU_ACS;
1553 }
1554 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1555
1556 return E_GE_OK;
1557 }
1558 //-------------------------------------------------------------------------------------------------
1559 /// Set GE Clear Invalid MIU Flag
1560 /// @param enable \b IN: enable and update setting
1561 /// @return @ref GE_Result
1562 //-------------------------------------------------------------------------------------------------
GE_ClrInvalMIUFlg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1563 GE_Result GE_ClrInvalMIUFlg(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1564 {
1565 MS_U16 u16en;
1566
1567 GE_DBG("%s\n", __FUNCTION__);
1568
1569 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1570 if (enable)
1571 {
1572 u16en |= GE_CFG_CLR_MIU_FLG;
1573 }
1574 else
1575 {
1576 u16en &= ~GE_CFG_CLR_MIU_FLG;
1577 }
1578 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1579
1580 return E_GE_OK;
1581 }
1582
1583 //-------------------------------------------------------------------------------------------------
1584 /// Set Enable Dynamic Clock Gating
1585 /// @param enable \b IN: enable and update setting
1586 /// @return @ref GE_Result
1587 //-------------------------------------------------------------------------------------------------
GE_EnableDynaClkGate(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1588 GE_Result GE_EnableDynaClkGate(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1589 {
1590 MS_U16 u16en;
1591
1592 GE_DBG("%s\n", __FUNCTION__);
1593
1594 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1595 if (enable)
1596 {
1597 u16en |= GE_CFG_EN_DNY_CLK_GATE;
1598 }
1599 else
1600 {
1601 u16en &= ~GE_CFG_EN_DNY_CLK_GATE;
1602 }
1603 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1604
1605 return E_GE_OK;
1606 }
1607
GE_EnableTrapezoidAA(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1608 GE_Result GE_EnableTrapezoidAA(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1609 {
1610 //GE_DBG("%s\n", __FUNCTION__);
1611
1612 return E_GE_NOT_SUPPORT;
1613
1614 }
1615
GE_EnableTrapSubPixCorr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1616 GE_Result GE_EnableTrapSubPixCorr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1617 {
1618 //GE_DBG("%s\n", __FUNCTION__);
1619
1620 return E_GE_NOT_SUPPORT;
1621
1622 }
1623
GE_GetNextTAGID(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bStepTagBefore)1624 MS_U16 GE_GetNextTAGID(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bStepTagBefore)
1625 {
1626 MS_U16 tagID;
1627 if(bStepTagBefore)
1628 {
1629 if(0 == ++pGEHalLocal->pHALShared->global_tagID)
1630 ++pGEHalLocal->pHALShared->global_tagID;
1631 }
1632 tagID =pGEHalLocal->pHALShared->global_tagID;
1633
1634 return tagID;
1635 }
1636
GE_SetVCmdBuffer(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY PhyAddr,GE_VcmqBufSize enBufSize)1637 GE_Result GE_SetVCmdBuffer(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY PhyAddr, GE_VcmqBufSize enBufSize)
1638 {
1639 MS_U16 u16RegVal=0;
1640 MS_U16 u16temp2=0;
1641 #if GE_VQADDR_LOCK_PATCH
1642 MS_U16 i=0;
1643 #endif
1644
1645 if(enBufSize >= E_GE_VCMD_1024K)
1646 {
1647 return E_GE_NOT_SUPPORT;
1648 }
1649
1650 GE_SetVQBufMIUId(pGEHalLocal, _GFXAPI_MIU_ID(PhyAddr));
1651 u16temp2 = GE_ReadReg(pGEHalLocal, REG_GE_YUV_MODE);
1652 if(PhyAddr>= HAL_MIU2_BASE)
1653 GE_WriteReg(pGEHalLocal, REG_GE_YUV_MODE, u16temp2|GE_VCMQ_MIU_SEL_H);
1654 else
1655 GE_WriteReg(pGEHalLocal, REG_GE_YUV_MODE, u16temp2&(~GE_VCMQ_MIU_SEL_H));
1656 PhyAddr = GE_ConvertAPIAddr2HAL(pGEHalLocal, _GFXAPI_MIU_ID(PhyAddr), _GFXAPI_PHYS_ADDR_IN_MIU(PhyAddr));
1657
1658 #ifdef GE_VQ_MIU_HANG_PATCH
1659 pGEHalLocal->pHALShared->u8VCmdQMiu = _GFXAPI_MIU_ID(PhyAddr);
1660 #endif
1661
1662 #if GE_VQADDR_LOCK_PATCH
1663 for (i=0; i<GE_VQADDR_ENHANCE_LOCK_TIMES; i++)
1664 {
1665 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_H, PhyAddr >> 16); // Address
1666 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_L, PhyAddr & 0xffff); // Address
1667 }
1668 #else
1669 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_L, PhyAddr & 0xffff); // Address
1670 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_H, PhyAddr >> 16); // Address
1671 #endif
1672
1673 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_VCMDQ_SIZE) & ~GE_VCMDQ_SIZE_MASK) | ((GE_MapVQ2Reg(enBufSize) & GE_VCMDQ_SIZE_MASK));
1674 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_SIZE, u16RegVal);
1675
1676 return E_GE_OK;
1677 }
1678
GE_InitCtxHalPalette(GE_CTX_HAL_LOCAL * pGEHalLocal)1679 GE_Result GE_InitCtxHalPalette(GE_CTX_HAL_LOCAL *pGEHalLocal)
1680 {
1681 MS_U32 u32Idx;
1682
1683 for(u32Idx=0; u32Idx<GE_PALETTE_NUM; u32Idx++)
1684 {
1685 GE_WriteReg(pGEHalLocal, REG_GE_CLUT_CTRL, ((u32Idx) & GE_CLUT_CTRL_IDX_MASK) | GE_CLUT_CTRL_RD);
1686 GE_WaitIdle(pGEHalLocal);
1687 pGEHalLocal->u32Palette[u32Idx] = ByteSwap32(((GE_ReadReg(pGEHalLocal, REG_GE_CLUT_H)<<16) | GE_ReadReg(pGEHalLocal, REG_GE_CLUT_L)));
1688 }
1689
1690 pGEHalLocal->bPaletteDirty = FALSE;
1691
1692 return (E_GE_OK);
1693 }
1694
GE_Init_HAL_Context(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_CTX_HAL_SHARED * pHALShared,MS_BOOL bNeedInitShared)1695 void GE_Init_HAL_Context(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared)
1696 {
1697 memset(pGEHalLocal, 0, sizeof(*pGEHalLocal));
1698
1699 if(bNeedInitShared)
1700 {
1701 memset(pHALShared, 0, sizeof(*pHALShared));
1702 pHALShared->global_tagID = 1;
1703 }
1704 pGEHalLocal->pHALShared = pHALShared;
1705 pGEHalLocal->bYScalingPatch = FALSE;
1706 }
1707
GE_Set_IOMap_Base2(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_VIRT addr)1708 GE_Result GE_Set_IOMap_Base2(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_VIRT addr)
1709 {
1710 pGEHalLocal->va_mmio_base2 = addr;
1711 return E_GE_OK;
1712 }
1713
GE_SetClock(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bOnOff)1714 GE_Result GE_SetClock(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bOnOff)
1715 {
1716 #ifdef CONFIG_MSTAR_CLKM
1717 MS_S32 handle;
1718
1719 handle = Drv_Clkm_Get_Handle("g_clk_ge");
1720 Drv_Clkm_Set_Clk_Source(handle,"CLK_FASTEST");
1721 #else
1722 MS_U16 u16tmp = 0;
1723
1724 u16tmp = CLK_REG(CHIP_GE_CLK);
1725
1726 if (bOnOff)
1727 {
1728 u16tmp &= ~ BIT(0);
1729 }
1730 else
1731 {
1732 u16tmp |= BIT(0);
1733 }
1734 CLK_REG(CHIP_GE_CLK) = u16tmp;
1735 #endif
1736 return E_GE_OK;
1737 }
1738
GE_NonOnePixelModeCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,PatchBitBltInfo * patchInfo)1739 MS_BOOL GE_NonOnePixelModeCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, PatchBitBltInfo* patchInfo)
1740 {
1741 GE_ScaleInfo geScaleinfo;
1742 GE_Result ret;
1743
1744 patchInfo->scaleinfo =&geScaleinfo;
1745 ret = GE_CalcBltScaleRatio(pGEHalLocal, patchInfo->src.width , patchInfo->src.height ,patchInfo->dst.dstblk.width , patchInfo->dst.dstblk.height, patchInfo->scaleinfo);
1746
1747 if(ret == E_GE_FAIL_PARAM)
1748 {
1749 return pGEHalLocal->pGeChipPro->bFourPixelModeStable;
1750 }
1751 else if ((patchInfo->scaleinfo->init_x>0xFFF)||(patchInfo->scaleinfo->init_y>0xFFF))
1752 {
1753 return FALSE;
1754 }
1755 else
1756 {
1757 return pGEHalLocal->pGeChipPro->bFourPixelModeStable;
1758 }
1759 }
1760
HAL_GE_EnableCalcSrc_WidthHeight(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1761 GE_Result HAL_GE_EnableCalcSrc_WidthHeight(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1762 {
1763 MS_U16 u16en;
1764
1765 u16en = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1766
1767 if(bEnable)
1768 {
1769 if(u16en & GE_EN_BURST)
1770 {
1771 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en | GE_EN_CALC_SRC_WH);
1772 }
1773 }
1774 else
1775 {
1776 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en & (~GE_EN_CALC_SRC_WH));
1777 }
1778
1779 return E_GE_OK;
1780 }
1781
GEWD_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 * value)1782 GE_Result GEWD_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16* value)
1783 {
1784 //For two source buffer read register
1785 return E_GE_NOT_SUPPORT;
1786 }
1787
GEWD_WriteReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)1788 GE_Result GEWD_WriteReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
1789 {
1790 //For two source buffer write register
1791 return E_GE_NOT_SUPPORT;
1792 }
1793
GE_SetTLBMode(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_TLB_Mode tlb_type)1794 GE_Result GE_SetTLBMode(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_TLB_Mode tlb_type)
1795 {
1796 return E_GE_NOT_SUPPORT;
1797 }
1798
GE_GetTLBSRCADDR(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY * addr)1799 GE_Result GE_GetTLBSRCADDR(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY* addr)
1800 {
1801 return E_GE_NOT_SUPPORT;
1802 }
1803
GE_GetTLBDSTADDR(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY * addr)1804 GE_Result GE_GetTLBDSTADDR(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY* addr)
1805 {
1806 return E_GE_NOT_SUPPORT;
1807 }
1808
GE_SetTLBSrcBaseAddr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY addr)1809 GE_Result GE_SetTLBSrcBaseAddr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY addr)
1810 {
1811 return E_GE_NOT_SUPPORT;
1812 }
1813
GE_SetTLBDstBaseAddr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY addr)1814 GE_Result GE_SetTLBDstBaseAddr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY addr)
1815 {
1816 return E_GE_NOT_SUPPORT;
1817 }
1818
GE_FlushTLBTable(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1819 GE_Result GE_FlushTLBTable(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1820 {
1821 return E_GE_NOT_SUPPORT;
1822 }
1823
GE_SetTLBTag(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 tag)1824 GE_Result GE_SetTLBTag(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 tag)
1825 {
1826 return E_GE_NOT_SUPPORT;
1827 }
1828
GE_StopFlushTLB(GE_CTX_HAL_LOCAL * pGEHalLocal)1829 GE_Result GE_StopFlushTLB(GE_CTX_HAL_LOCAL *pGEHalLocal)
1830 {
1831 return E_GE_NOT_SUPPORT;
1832 }
1833
GE_Get_MIU_INTERVAL(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 miu,MS_PHY * value)1834 GE_Result GE_Get_MIU_INTERVAL(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 miu, MS_PHY* value)
1835 {
1836 if(miu==2)
1837 {
1838 *value = HAL_MIU2_BASE;
1839 }
1840 else if(miu==1)
1841 {
1842 *value = HAL_MIU1_BASE;
1843 }
1844 else if(miu==0)
1845 {
1846 *value = 0;
1847 }
1848 else
1849 {
1850 *value = 0;
1851 return E_GE_FAIL;
1852 }
1853
1854 return E_GE_OK;
1855 }
1856
HAL_GE_AdjustDstWin(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bDstXInv)1857 GE_Result HAL_GE_AdjustDstWin( GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bDstXInv )
1858 {
1859 MS_U16 u16ClipL=0,u16ClipR=0;
1860 MS_U16 u16DstX=0;
1861
1862 u16DstX = GE_ReadReg(pGEHalLocal, REG_GE_PRIM_V1_X);
1863 if( bDstXInv==FALSE )
1864 {
1865 u16ClipR = GE_ReadReg(pGEHalLocal, REG_GE_CLIP_R);
1866 if( u16ClipR < u16DstX )
1867 {
1868 GE_WriteReg(pGEHalLocal, REG_GE_PRIM_V1_X, u16ClipR);
1869 }
1870 }
1871 else
1872 {
1873 u16ClipL = GE_ReadReg(pGEHalLocal, REG_GE_CLIP_L);
1874 if( u16ClipL > u16DstX )
1875 {
1876 GE_WriteReg(pGEHalLocal, REG_GE_PRIM_V1_X, u16ClipL);
1877 }
1878 }
1879
1880 return E_GE_OK;
1881 }
1882
HAL_GE_AdjustRotateDstWin(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8Rotate)1883 GE_Result HAL_GE_AdjustRotateDstWin( GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8Rotate )
1884 {
1885 return E_GE_OK;
1886 }
1887
HAL_GE_SetBurstMiuLen(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable,MS_U32 u32BurstLen)1888 GE_Result HAL_GE_SetBurstMiuLen(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL bEnable,MS_U32 u32BurstLen)
1889 {
1890 MS_U16 u16Reg = 0;
1891
1892 u16Reg = GE_ReadReg(pGEHalLocal, REG_GE_DBG);
1893 u16Reg &= ( ~GE_DBG_MIU_MAX_LEG );
1894 u16Reg |= ( ((u32BurstLen - 1)<<8) & GE_DBG_MIU_MAX_LEG );
1895 GE_WriteReg(pGEHalLocal, REG_GE_DBG, u16Reg);
1896
1897 u16Reg = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
1898 if(bEnable)
1899 u16Reg |= GE_CFG_LENGTH_LIMIT;
1900 else
1901 u16Reg &= (~GE_CFG_LENGTH_LIMIT);
1902 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16Reg);
1903
1904 return E_GE_OK;
1905 }
1906