1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
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10 // permission has been granted by MStar.
11 //
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15 //
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20 //
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22 // supplied together with third party`s software and the use of MStar
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // ("MStar Confidential Information") by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
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89 // reverse engineering and compiling of the contents of MStar Confidential
90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 #include "MsCommon.h"
100 #ifndef MSOS_TYPE_LINUX_KERNEL
101 #include <string.h>
102 #endif
103 #include "regGE.h"
104 #include "drvGE.h"
105 #include "halGE.h"
106 #include "halCHIP.h"
107 #ifdef MSOS_TYPE_LINUX
108 #include "halMPool.h"
109 #endif
110 #ifdef CONFIG_MSTAR_CLKM
111 #include "drvCLKM.h"
112 #endif
113 //-------------------------------------------------------------------------------------------------
114 // Driver Compiler Options
115 //-------------------------------------------------------------------------------------------------
116 #define GE_DITHER_RAND_ENABLE 0UL //[TBD] Add new option for SetDither if rand is used in the future.
117 #define GE_PATCH_ENABLE 0UL
118
119 #define GE_LOG_ENABLE 0UL
120 #define MS_DEBUG 1UL
121
122 //-------------------------------------------------------------------------------------------------
123 // Local Defines
124 //-------------------------------------------------------------------------------------------------
125 #define GE_MIU_ADDR_MASK 0x7FFFFFFFUL
126
127 #define GE_CMDQ_FREECNT() ((GE_REG(REG_GE_STAT)&GE_STAT_CMDQ_MASK)>>GE_STAT_CMDQ_SHFT)
128 #define GE_VCMDQ_FREECNT() (GE_REG(REG_GE_VCMDQ_STAT) + ((GE_REG(REG_GE_BIST_STAT)&GE_VCMDQ_STAT_H_MASK) << 16))
129
130 #define GE_BUSY() (GE_REG(REG_GE_STAT) & GE_STAT_BUSY)
131
132 #define GE_CMDQ_ENABLE 1UL // Always Enable
133 #define GE_CMD_SIZE_MAX GE_STAT_CMDQ_MAX
134 #define GE_VCMD_SIZE_MAX GE_STAT_VCMDQ_MAX
135 #define GE_CMD_SIZE 1UL // 1 queue entry available for 2 commands, but we just check entry for convenience
136
137 #define GE_MAP_VCMD_SIZE_TO_HWDEF(x) ((x))
138
139 #define GE_YIELD() MsOS_YieldTask()
140
141 #ifdef MS_DEBUG
142 #define GE_DBG(_fmt, _args...) GE_H_DBUG(_fmt, ##_args)
143 #else
144 #define GE_DBG(_fmt, _args...) { }
145 #endif
146 #define GE_BURST_LEN 128UL
147
148 //-------------------------------------------------------------------------------------------------
149 // Local Structures
150 //-------------------------------------------------------------------------------------------------
151
152
153 //-------------------------------------------------------------------------------------------------
154 // Global Variables
155 //------------------------------------------------------------------------------------------------- // line pattern reset
156
157
158 const MS_U8 _GE_Reg_Backup[] = {
159 REG_GE_EN, REG_GE_CFG, REG_GE_TH, REG_GE_ROP2, REG_GE_BLEND, REG_GE_ALPHA, REG_GE_ALPHA_CONST,
160 REG_GE_SCK_HTH_L, REG_GE_SCK_HTH_H, REG_GE_SCK_LTH_L, REG_GE_SCK_LTH_H, REG_GE_DCK_HTH_L,
161 REG_GE_DCK_HTH_H, REG_GE_DCK_LTH_L, REG_GE_DCK_LTH_H, REG_GE_OP_MODE, REG_GE_ATEST_TH,
162 REG_GE_YUV_MODE, REG_GE_SRC_BASE_L, REG_GE_SRC_BASE_H, REG_GE_DST_BASE_L, REG_GE_DST_BASE_H,
163 REG_GE_SRC_PITCH, REG_GE_DST_PITCH, REG_GE_FMT,
164 0x0035, 0x0036, 0x0037, 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, // I0~I4
165 0x003f, 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, 0x0048, // I5-I9
166 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, 0x0050, 0x0051, 0x0052, // I10-I14
167 0x0053, 0x0054, // I15
168 REG_GE_CLIP_L, REG_GE_CLIP_R, REG_GE_CLIP_T, REG_GE_CLIP_B, REG_GE_ROT_MODE, REG_GE_BLT_SCK_MODE,
169 REG_GE_BLT_SCK_CONST_L, REG_GE_BLT_SCK_CONST_H, REG_GE_BLT_DST_X_OFST, REG_GE_BLT_DST_Y_OFST,
170 REG_GE_LINE_DELTA, REG_GE_LINE_STYLE, REG_GE_LINE_LENGTH, REG_GE_BLT_SRC_DX, REG_GE_BLT_SRC_DY,
171 REG_GE_ITALIC_OFFSET, REG_GE_ITALIC_DELTA, REG_GE_PRIM_V0_X, REG_GE_PRIM_V0_Y, REG_GE_PRIM_V1_X,
172 REG_GE_PRIM_V1_Y, REG_GE_PRIM_V2_X, REG_GE_PRIM_V2_Y, REG_GE_BLT_SRC_W, REG_GE_BLT_SRC_H,
173 REG_GE_PRIM_C_L, REG_GE_PRIM_C_H, REG_GE_PRIM_RDX_L, REG_GE_PRIM_RDX_H, REG_GE_PRIM_RDY_L,
174 REG_GE_PRIM_RDY_H, REG_GE_PRIM_GDX_L, REG_GE_PRIM_GDX_H, REG_GE_PRIM_GDY_L, REG_GE_PRIM_GDY_H,
175 REG_GE_PRIM_BDX_L, REG_GE_PRIM_BDX_H, REG_GE_PRIM_BDY_L, REG_GE_PRIM_BDY_H, REG_GE_PRIM_ADX,
176 REG_GE_PRIM_ADY, 0xFF
177 };
178
179 //-------------------------------------------------------------------------------------------------
180 // Debug Functions
181 //-------------------------------------------------------------------------------------------------
182
183
184 //------------------------------------------------------------------------------
185 // Local Var
186 //------------------------------------------------------------------------------
187 GE_CHIP_PROPERTY g_GeChipPro =
188 {
189 .WordUnit = GE_WordUnit,
190
191 .bSupportFourePixelMode = TRUE,
192 .bFourPixelModeStable = TRUE,
193
194 .bSupportMultiPixel = FALSE,
195 .bSupportSpiltMode = TRUE,
196 .bSupportTwoSourceBitbltMode = FALSE,
197 .bSupportTLBMode = FALSE,
198 .MIUSupportMaxNUM = GE_MAX_MIU,
199 .BltDownScaleCaps =
200 {
201 .u8RangeMax = 1,
202 .u8RangeMin = 32,
203 .u8ContinuousRangeMin = 1,
204 .bFullRangeSupport = TRUE,
205
206 .u8ShiftRangeMax = 0, /// 1 = 2^0 = 1<<0
207 .u8ShiftRangeMin = 5, /// 32 = 2^5 = 1<<5
208 .u8ShiftContinuousRangeMin = 0, /// 1 = 2^0 = 1<<0
209 }
210 };
211
212 //-------------------------------------------------------------------------------------------------
213 // Local Functions
214 //-------------------------------------------------------------------------------------------------
GE_Chip_Proprity_Init(GE_CTX_HAL_LOCAL * pGEHalLocal)215 void GE_Chip_Proprity_Init(GE_CTX_HAL_LOCAL *pGEHalLocal)
216 {
217 pGEHalLocal->pGeChipPro = &g_GeChipPro;
218 }
219
_GE_SetBltScaleRatio2HW(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_ScaleInfo * pScaleinfo)220 GE_Result _GE_SetBltScaleRatio2HW(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_ScaleInfo *pScaleinfo)
221 {
222 MS_U16 u16RegVal;
223
224 //check parameters
225 if(pScaleinfo == NULL)
226 {
227 return E_GE_FAIL_PARAM;
228 }
229 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SRC_DX, (MS_U16)(pScaleinfo->x&0xFFFF));
230 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SRC_DY, (MS_U16)(pScaleinfo->y&0xFFFF));
231 //Set Initial DeltaX, DeltaY:
232 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST, (MS_U16)(pScaleinfo->init_x&0xFFFF));
233 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST, (MS_U16)(pScaleinfo->init_y&0xFFFF));
234
235 //set MSBs of REG_GE_BLT_SRC_DY, REG_GE_BLT_SRC_DY:
236 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST) & ~(GE_STBB_DX_MSB);
237 u16RegVal |= (((pScaleinfo->x>>16)<<GE_STBB_DX_MSB_SHFT) & GE_STBB_DX_MSB);
238 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST, u16RegVal);
239
240 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST) & ~(GE_STBB_DY_MSB);
241 u16RegVal |= (((pScaleinfo->y>>16)<<GE_STBB_DY_MSB_SHFT) & GE_STBB_DY_MSB);
242 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST, u16RegVal);
243
244 return E_GE_OK;
245 }
246
GE_SetActiveCtrlMiu1(GE_CTX_HAL_LOCAL * pGEHalLocal)247 void GE_SetActiveCtrlMiu1(GE_CTX_HAL_LOCAL *pGEHalLocal)
248 {
249 MIU1_REG(MIU1_GEGROUP) = MIU1_REG(MIU1_GEGROUP)|MIU1_GE_CLIENT;
250 }
251
252 //-------------------------------------------------------------------------------------------------
253 // Global Functions
254 //-------------------------------------------------------------------------------------------------
GE_DumpReg(GE_CTX_HAL_LOCAL * pGEHalLocal)255 static void GE_DumpReg(GE_CTX_HAL_LOCAL *pGEHalLocal)
256 {
257 MS_U32 i;
258
259 GE_H_INFO("Dump GE register:\n");
260 for (i = 0; i < 0x80; i++)
261 {
262 if(i % 0x08 == 0) {
263 GE_H_INFO(" \n");
264 GE_H_INFO("h%02x ", (MS_U8)i );
265 }
266 #ifdef GE_USE_HW_SEM
267 #ifdef MSOS_TYPE_OPTEE //R2
268 GE_H_INFO("%04x ", GE1_REG(i) );
269 #else
270 GE_H_INFO("%04x ", GE_REG(i) );
271 #endif
272 #else
273 GE_H_INFO("%04x ", GE_REG(i) );
274 #endif
275 }
276
277 GE_H_INFO(" \n");
278 }
_GET_MIU_MASK_SHIFT(void)279 static MS_U32 _GET_MIU_MASK_SHIFT(void)
280 {
281 if (HAL_MIU1_BASE==0x20000000)
282 return (29UL);
283 else if (HAL_MIU1_BASE==0x10000000)
284 return (28UL);
285 else if (HAL_MIU1_BASE==0x8000000)
286 return (27UL);
287 else if (HAL_MIU1_BASE==0x4000000)
288 return (26UL);
289 else if (HAL_MIU1_BASE==0x60000000)
290 return (29UL);
291 else
292 {
293 GE_H_ERR("\n[%s] !!!!!! get miu1 base error!!!!!!", __FUNCTION__);
294 return (27UL); //default return case
295 }
296 }
297
_GFXAPI_MIU_ID(MS_PHY ge_fbaddr)298 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr)
299 {
300 #if 1
301 if(ge_fbaddr>=HAL_MIU2_BASE)
302 {
303 return 2;
304 }
305 else if(ge_fbaddr>=HAL_MIU1_BASE)
306 {
307 return 1;
308 }
309 else
310 {
311 return 0;
312 }
313 #else
314 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1)));
315
316 #endif
317 }
318
_GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr)319 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr)
320 {
321 #if 1
322 if(ge_fbaddr>=HAL_MIU2_BASE)
323 {
324 return (ge_fbaddr -= HAL_MIU2_BASE);
325 }
326 else if(ge_fbaddr>=HAL_MIU1_BASE)
327 {
328 return (ge_fbaddr -= HAL_MIU1_BASE);
329 }
330 else
331 {
332 return (ge_fbaddr);
333 }
334 #else
335 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1));
336 #endif
337 }
338
_GFXAPI_PHYS_ADDR_2_API(MS_U8 u8MIUId,MS_PHY ge_addrInMIU)339 MS_PHY _GFXAPI_PHYS_ADDR_2_API(MS_U8 u8MIUId, MS_PHY ge_addrInMIU)
340 {
341 #if 1
342 if(u8MIUId == 1)
343 {
344 return (HAL_MIU1_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
345 }
346 else
347 {
348 return (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1));
349 }
350 #else
351
352 return (((((MS_U32)(u8MIUId))&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))<<_GET_MIU_MASK_SHIFT()) | \
353 (((MS_U32)(ge_addrInMIU))&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
354 #endif
355 }
356
GE_Reset(GE_CTX_HAL_LOCAL * pGEHalLocal)357 static void GE_Reset(GE_CTX_HAL_LOCAL *pGEHalLocal)
358 {
359 MS_U16 reg0, reg1;
360
361 reg0 = GE_REG(REG_GE_EN);
362 reg1 = GE_REG(REG_GE_CFG);
363
364 GE_REG(REG_GE_EN) = 0;
365 GE_REG(REG_GE_CFG) = 0;
366
367 GE_REG(REG_GE_EN) = reg0;
368 GE_REG(REG_GE_CFG) = reg1;
369
370 }
371
GE_MapVQ2Reg(GE_VcmqBufSize enBufSize)372 static MS_U8 GE_MapVQ2Reg(GE_VcmqBufSize enBufSize)
373 {
374 switch(enBufSize)
375 {
376 case E_GE_VCMD_4K:
377 return GE_VQ_8K;
378 case E_GE_VCMD_8K:
379 return GE_VQ_8K;
380 case E_GE_VCMD_16K:
381 return GE_VQ_16K;
382 case E_GE_VCMD_32K:
383 return GE_VQ_32K;
384 case E_GE_VCMD_64K:
385 return GE_VQ_64K;
386 case E_GE_VCMD_128K:
387 return GE_VQ_128K;
388 case E_GE_VCMD_256K:
389 return GE_VQ_256K;
390 case E_GE_VCMD_512K:
391 return GE_VQ_512K;
392 case E_GE_VCMD_1024K:
393 return GE_VQ_1024K;
394 default:
395 return 0;
396 }
397 }
398
GE_WaitCmdQAvail(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U32 u32Count)399 void GE_WaitCmdQAvail(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U32 u32Count)
400 {
401 #if GE_CMDQ_ENABLE
402
403 #ifdef MS_DEBUG
404 MS_U32 waitcount = 0;
405 #endif
406 MS_U16 tmp1 = 0;
407 MS_U32 u32CmdMax;
408
409 /// VCMQ enabled
410 if((GE_REG(REG_GE_CFG) & GE_CFG_VCMDQ) != 0)
411 {
412 // 16 Bytes one command in VCMDQ.
413 u32CmdMax = (512 << (GE_REG(REG_GE_VCMDQ_SIZE) & 0x7));
414 u32Count = MIN(u32CmdMax, u32Count);
415
416 while (GE_CMDQ_FREECNT() < u32Count)
417 {
418 #ifdef MS_DEBUG
419 if (waitcount >= 0x80000)
420 {
421 GE_H_INFO("[GE] V0 Wait command queue: %d : %tx, %tx\n", tmp1, (ptrdiff_t)GE_CMDQ_FREECNT(), (ptrdiff_t)u32Count);
422 waitcount = 0;
423 tmp1++;
424 if(tmp1 > 10)
425 {
426 GE_DumpReg(pGEHalLocal);
427 GE_Reset(pGEHalLocal);
428 }
429 }
430 waitcount++;
431 #endif
432 GE_YIELD();
433 }
434 tmp1 = 0;
435 waitcount = 0;
436
437
438 //If u32Count >= u32CmdMax, It will be dead loop. But since it won't happen, and if match
439 //Full VCMDQ, hw will hang, so keep the logic.
440 while ( (MS_U32)GE_VCMDQ_FREECNT() >= (MS_U32)(u32CmdMax- u32Count))
441 {
442 #ifdef MS_DEBUG
443 if (waitcount >= 0x80000)
444 {
445 GE_H_INFO("[GE] Wait VCMQ : %d : %tx, %tx\n", tmp1, (ptrdiff_t)GE_VCMDQ_FREECNT(), (ptrdiff_t)u32Count);
446 waitcount = 0;
447 tmp1++;
448 if(tmp1 > 10)
449 {
450 GE_DumpReg(pGEHalLocal);
451 GE_Reset(pGEHalLocal);
452 }
453 }
454 waitcount++;
455 #endif
456 GE_YIELD();
457 }
458 }
459 else
460 {
461 u32Count = MIN(GE_CMD_SIZE_MAX, u32Count);
462
463 while (GE_CMDQ_FREECNT() < u32Count)
464 {
465 #ifdef MS_DEBUG
466 if (waitcount >= 0x80000)
467 {
468 GE_H_INFO("[GE] Wait command queue: %d : %x, %tx\n", tmp1, GE_CMDQ_FREECNT(), (ptrdiff_t)u32Count);
469 waitcount = 0;
470 tmp1++;
471 if(tmp1 > 10)
472 {
473 GE_DumpReg(pGEHalLocal);
474 GE_Reset(pGEHalLocal);
475 }
476 }
477 waitcount++;
478 #endif
479 GE_YIELD();
480 }
481
482 }
483
484 #endif
485 }
486
GE_ConvertAPIAddr2HAL(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8MIUId,MS_PHY PhyGE_APIAddrInMIU)487 MS_PHY GE_ConvertAPIAddr2HAL(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8MIUId, MS_PHY PhyGE_APIAddrInMIU)
488 {
489 PhyGE_APIAddrInMIU &= (1UL<<MIU_SELETE_OFFSET)-1UL;
490 if(u8MIUId==1)
491 PhyGE_APIAddrInMIU |= 1UL<<MIU_SELETE_OFFSET;
492 return PhyGE_APIAddrInMIU;
493 }
GE_ConvertHALAddr2API(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8MIUId,MS_PHY PhyGE_HALAddr)494 MS_PHY GE_ConvertHALAddr2API(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8MIUId, MS_PHY PhyGE_HALAddr)
495 {
496 return _GFXAPI_PHYS_ADDR_2_API(u8MIUId, PhyGE_HALAddr&((1UL<<MIU_SELETE_OFFSET)-1));
497 }
498
GE_WaitIdle(GE_CTX_HAL_LOCAL * pGEHalLocal)499 void GE_WaitIdle(GE_CTX_HAL_LOCAL *pGEHalLocal)
500 {
501 #ifdef MS_DEBUG
502 MS_U32 waitcount = 0;
503 #endif
504 MS_U16 tmp1 = 0;
505
506 GE_WriteReg(pGEHalLocal, REG_GE_TAG, GE_GetNextTAGID(pGEHalLocal, FALSE)); // write dummy
507 // GE will pack 2 register commands before CMDQ
508 // We need to push fifo if there is one command in the fifo before
509 // CMDQ. Then the GE status register will be consistant after idle.
510 GE_WaitCmdQAvail(pGEHalLocal, GE_STAT_CMDQ_MAX); // Wait CMDQ empty
511
512 // Wait level-2 command queue flush
513 while (((GE_REG(REG_GE_STAT)&GE_STAT_CMDQ2_MASK)>>GE_STAT_CMDQ2_SHFT) != GE_STAT_CMDQ2_MAX)
514 {
515 #ifdef MS_DEBUG
516 if (waitcount >= 0x80000)
517 {
518 GE_H_INFO("[GE] Wait Idle: %u : %tx\n", tmp1, (ptrdiff_t)GE_CMDQ_FREECNT());
519 waitcount = 0;
520 tmp1++;
521 if(tmp1 > 10)
522 {
523 GE_DumpReg(pGEHalLocal);
524 GE_Reset(pGEHalLocal);
525 }
526 }
527 waitcount++;
528 #endif
529
530 GE_YIELD();
531 }
532
533 #ifdef MS_DEBUG
534 waitcount = 0;
535 tmp1 = 0;
536 #endif
537 // Wait GE idle
538 while (GE_REG(REG_GE_STAT) & GE_STAT_BUSY)
539 {
540 #ifdef MS_DEBUG
541 if (waitcount >= 0x80000)
542 {
543 GE_H_INFO("[GE] Wait Busy: %d : %tx\n", tmp1, (ptrdiff_t)GE_CMDQ_FREECNT());
544 waitcount = 0;
545 tmp1++;
546 if(tmp1 > 10)
547 {
548 GE_DumpReg(pGEHalLocal);
549 GE_Reset(pGEHalLocal);
550 }
551 }
552 waitcount++;
553 #endif
554
555 GE_YIELD();
556 }
557
558 }
559
GE_Map_Share_Reg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)560 GE_Result GE_Map_Share_Reg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
561 {
562 if(addr == REG_GE_CFG)
563 return E_GE_OK;
564 else
565 return E_GE_FAIL;
566 #if 0
567 switch(addr)
568 {
569 case REG_GE_CFG:
570 return E_GE_OK;
571 default:
572 return E_GE_FAIL;
573 }
574 #endif
575
576 }
577
GE_Map_Share_RegEX(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)578 GE_Result GE_Map_Share_RegEX(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
579 {
580 return E_GE_FAIL;
581 }
582
GE_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)583 MS_U16 GE_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
584 {
585 MS_U16 u16NoFIFOMask;
586
587 if(GE_TABLE_REGNUM <= addr)
588 {
589 GE_WaitIdle(pGEHalLocal);
590 #ifdef GE_USE_HW_SEM
591 #ifdef MSOS_TYPE_OPTEE //R2
592 return GE1_REG(addr-GE_TABLE_REGNUM);
593 #else
594 return GE_REG(addr-GE_TABLE_REGNUM);
595 #endif
596 #else
597 return GE_REG(addr-GE_TABLE_REGNUM);
598 #endif
599 }
600 switch (addr)
601 {//for registers which do not go through command queue
602 case REG_GE_EN:
603 u16NoFIFOMask = GE_EN_GE;
604 break;
605 /*
606 case REG_GE_CFG:
607 //u16NoFIFOMask = ~(GE_CFG_BLT_STRETCH|GE_CFG_EN_CLIPCHK|GE_CFG_BLT_ITALIC|GE_CFG_SRC_TILE|GE_CFG_DST_TILE);
608 return pGEHalLocal->u16RegImage[addr];
609 break;
610 */
611 case REG_GE_DBG:
612 case REG_GE_TH:
613 case REG_GE_BIST_STAT:
614 case REG_GE_STAT:
615 case REG_GE_VCMDQ_STAT:
616 case REG_GE_MIU_PROT_LTH_L(0):
617 case REG_GE_MIU_PROT_LTH_H(0):
618 case REG_GE_MIU_PROT_HTH_L(0):
619 case REG_GE_MIU_PROT_HTH_H(0):
620 case REG_GE_MIU_PROT_LTH_L(1):
621 case REG_GE_MIU_PROT_LTH_H(1):
622 case REG_GE_MIU_PROT_HTH_L(1):
623 case REG_GE_MIU_PROT_HTH_H(1):
624 case REG_GE_TAG:
625 case REG_GE_VCMDQ_BASE_L:
626 case REG_GE_VCMDQ_BASE_H:
627 u16NoFIFOMask = 0xffff;
628 break;
629 case REG_GE_VCMDQ_SIZE:
630 u16NoFIFOMask = GE_VCMDQ_SIZE_MASK;
631 break;
632 default:
633 u16NoFIFOMask = 0;
634 break;
635 }
636
637 if(0 == u16NoFIFOMask)
638 {
639 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
640 return pGEHalLocal->pHALShared->u16ShareRegImage[addr];
641 else
642 {
643 return pGEHalLocal->u16RegGETable[addr];
644 }
645 }
646 #ifdef GE_USE_HW_SEM
647 #ifdef MSOS_TYPE_OPTEE //R2
648 return (GE1_REG(addr)&u16NoFIFOMask)|(pGEHalLocal->u16RegGETable[addr]&~u16NoFIFOMask);
649 #else
650 return (GE_REG(addr)&u16NoFIFOMask)|(pGEHalLocal->u16RegGETable[addr]&~u16NoFIFOMask);
651 #endif
652 #else
653 return (GE_REG(addr)&u16NoFIFOMask)|(pGEHalLocal->u16RegGETable[addr]&~u16NoFIFOMask);
654 #endif
655 }
656
657
GE_WriteReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)658 void GE_WriteReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
659 {
660 // CMDQ special command
661 if(addr < GE_TABLE_REGNUM)
662 {
663 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
664 {
665 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= value;
666 }
667
668 pGEHalLocal->u16RegGETable[addr] = value;
669 }
670 else
671 {
672 GE_H_DBUG("[%s][%d] Reg Index [%d]is out of GE_TABLE_REGNUM [0x%lx]range!!!!\n",__FUNCTION__,__LINE__, addr, GE_TABLE_REGNUM);
673 }
674
675 if(pGEHalLocal->pHALShared->bGE_DirectToReg ==TRUE)
676 {
677 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
678 #ifdef GE_USE_HW_SEM
679 #ifdef MSOS_TYPE_OPTEE //R2
680 GE1_REG(addr) = value;
681 #else
682 GE_REG(addr)= value;
683 #endif
684 #else
685 GE_REG(addr)= value;
686 #endif
687
688 return;
689 }
690 else
691 {
692 MS_U16 i=0;
693
694 switch (addr)
695 {
696 case REG_GE_EN:
697 case REG_GE_CFG:
698 case REG_GE_DBG:
699 case REG_GE_TH:
700 case REG_GE_BIST_STAT:
701 case REG_GE_STAT:
702 case REG_GE_VCMDQ_STAT:
703 case REG_GE_MIU_PROT_LTH_L(0):
704 case REG_GE_MIU_PROT_LTH_H(0):
705 case REG_GE_MIU_PROT_HTH_L(0):
706 case REG_GE_MIU_PROT_HTH_H(0):
707 case REG_GE_MIU_PROT_LTH_L(1):
708 case REG_GE_MIU_PROT_LTH_H(1):
709 case REG_GE_MIU_PROT_HTH_L(1):
710 case REG_GE_MIU_PROT_HTH_H(1):
711 case REG_GE_TAG:
712 case REG_GE_VCMDQ_BASE_L:
713 case REG_GE_VCMDQ_BASE_H:
714 case REG_GE_VCMDQ_SIZE:
715
716 //Palette
717 case REG_GE_CLUT_L:
718 case REG_GE_CLUT_H:
719 case REG_GE_CLUT_CTRL:
720 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
721 #ifdef GE_USE_HW_SEM
722 #ifdef MSOS_TYPE_OPTEE //R2
723 GE1_REG(addr) = value;
724 #else
725 GE_REG(addr) = value;
726 #endif
727 #else
728 GE_REG(addr) = value;
729 #endif
730
731 break;
732
733 case REG_GE_CMD:
734 GE_WaitIdle(pGEHalLocal);
735
736 for(i=0; i<GE_TABLE_REGNUM; i++)
737 {
738 //CMQ/Palette
739 if(i==REG_GE_EN || i==REG_GE_CFG || i==REG_GE_DBG || i==REG_GE_TH || i==REG_GE_VCMDQ_STAT || i==REG_GE_BIST_STAT \
740 || i==REG_GE_MIU_PROT_LTH_L(0) || i==REG_GE_MIU_PROT_LTH_H(0) || i==REG_GE_MIU_PROT_HTH_L(0) || i==REG_GE_MIU_PROT_HTH_H(0)\
741 || i==REG_GE_MIU_PROT_LTH_L(1) || i==REG_GE_MIU_PROT_LTH_H(1) || i==REG_GE_MIU_PROT_HTH_L(1) || i==REG_GE_MIU_PROT_HTH_H(1)\
742 || i==REG_GE_VCMDQ_BASE_L || i==REG_GE_VCMDQ_BASE_H || i==REG_GE_VCMDQ_SIZE \
743 || i==REG_GE_CLUT_L || i==REG_GE_CLUT_H || i==REG_GE_CLUT_CTRL || i==REG_GE_TAG)
744 {
745 continue;
746 }
747
748 if(i == REG_GE_CMD )
749 {
750 continue;
751 }
752
753 if(i == (GE_TABLE_REGNUM-1))
754 {
755 #ifdef GE_USE_HW_SEM
756 #ifdef MSOS_TYPE_OPTEE //R2
757 GE1_REG(i)= pGEHalLocal->u16RegGETable[i];
758 GE1_REG(REG_GE_CMD)= pGEHalLocal->u16RegGETable[REG_GE_CMD];
759 #else
760 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
761 GE_REG(REG_GE_CMD)= pGEHalLocal->u16RegGETable[REG_GE_CMD];
762 #endif
763 #else
764 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
765 GE_REG(REG_GE_CMD)= pGEHalLocal->u16RegGETable[REG_GE_CMD];
766 #endif
767 }
768 else
769 {
770 if (GE_WordUnit/*256bit*//4/*32bit*/*16*2 < (GE_TABLE_REGNUM-20))
771 {
772 if(i%64==0)
773 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
774 }
775 #ifdef GE_USE_HW_SEM
776 #ifdef MSOS_TYPE_OPTEE //R2
777 GE1_REG(i)= pGEHalLocal->u16RegGETable[i];
778 #else
779 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
780 #endif
781 #else
782 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
783 #endif
784 }
785 }
786 break;
787 default:
788 #if GE_LOG_ENABLE
789 GE_LOG(addr, value);
790 #endif
791 break;
792 }
793
794 }
795
796 }
797
GE2_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)798 MS_U16 GE2_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
799 {
800 return 0;
801 }
802
GE_RestoreReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)803 void GE_RestoreReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
804 {
805 // CMDQ special command
806 switch (addr)
807 {
808 case REG_GE_CMD:
809 break;
810 //[OBSOLETE]
811 default:
812 GE_WriteReg(pGEHalLocal, addr, value);
813 break;
814 }
815 }
816
817
GE_ResetState(GE_CTX_HAL_LOCAL * pGEHalLocal)818 void GE_ResetState(GE_CTX_HAL_LOCAL *pGEHalLocal)
819 {
820 GE_WaitIdle(pGEHalLocal);
821
822 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE);
823 #if GE_DITHER_RAND_ENABLE
824 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE | GE_EN_DITHER_RAND); //fixed random dither by default
825 #endif
826 GE_WriteReg(pGEHalLocal, REG_GE_TH, 0x0000); //0(<half) will be default to be half
827
828 GE_WriteReg(pGEHalLocal, REG_GE_LINE_STYLE, GE_LINEPAT_RST);
829 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SCK_MODE, GE_BLT_SCK_NEAREST);
830 GE_WriteReg(pGEHalLocal, REG_GE_BLEND, GE_ALPHA_ARGB1555); //force alpha constant of ARGB"1"555 to be 1.0 by default
831 }
832
833
GE_Init_RegImage(GE_CTX_HAL_LOCAL * pGEHalLocal)834 void GE_Init_RegImage(GE_CTX_HAL_LOCAL *pGEHalLocal)
835 {
836 MS_U8 addr;
837
838 for(addr = 0; addr<GE_TABLE_REGNUM; addr++)
839 {
840 #ifdef GE_USE_HW_SEM
841 #ifdef MSOS_TYPE_OPTEE //R2
842 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
843 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= GE1_REG(addr);
844 pGEHalLocal->u16RegGETable[addr] = GE1_REG(addr);
845 #else
846 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
847 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= GE_REG(addr);
848 pGEHalLocal->u16RegGETable[addr] = GE_REG(addr);
849 #endif
850 #else
851 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
852 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= GE_REG(addr);
853 pGEHalLocal->u16RegGETable[addr] = GE_REG(addr);
854 #endif
855
856 }
857
858 }
859
GE_Init(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Config * cfg)860 void GE_Init(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_Config *cfg)
861 {
862 MS_U16 u16temp =0;
863
864 GE_WaitIdle(pGEHalLocal);
865
866 GE_SetClock(pGEHalLocal,TRUE);
867
868 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
869
870 if ((u16temp & BIT(1)) != BIT(1)) //if VQ is Not Enabled
871 {
872 #if GE_CMDQ_ENABLE
873 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
874 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16temp | GE_CFG_CMDQ); // enable command queue
875 #endif
876
877 // Set default FMT for avoiding 1st set buffinfo error.
878 GE_WriteReg(pGEHalLocal, REG_GE_FMT, (GE_FMT_ARGB1555<<GE_SRC_FMT_SHFT)+(GE_FMT_ARGB1555<<GE_DST_FMT_SHFT));
879
880 if (cfg->u32VCmdQSize >= GE_VCMDQ_SIZE_MIN)
881 {
882 MS_PHY PhyVQAddr = cfg->PhyVCmdQAddr;
883 MS_U32 u32VcmdqBufSz = cfg->u32VCmdQSize;
884
885 GE_SetVCmdBuffer(pGEHalLocal, PhyVQAddr, u32VcmdqBufSz);
886
887 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
888 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16temp | GE_CFG_VCMDQ);
889 }
890
891 GE_ResetState(pGEHalLocal);
892 }
893 else
894 {
895 //No need to set command queue
896 GE_H_DBUG(" warning!!! Virtual Command queue has been activated!! \n");
897 }
898 //GE_Init_RegImage(pGEHalLocal);
899
900 GE_WriteReg(pGEHalLocal, REG_GE_TH, GE_THRESHOLD_SETTING);
901 //Mask Interrupt
902 GE_WriteReg(pGEHalLocal, REG_GE_SRCMASK_GB, 0x00C0);
903
904 //enable dynamic clock gating
905 GE_EnableDynaClkGate(pGEHalLocal,TRUE);
906 }
907
GE_SetRotate(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RotateAngle geRotAngle)908 GE_Result GE_SetRotate(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RotateAngle geRotAngle)
909 {
910 MS_U16 u16RegVal;
911
912 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_ROT_MODE) & ~REG_GE_ROT_MODE_MASK) | (geRotAngle<<REG_GE_ROT_MODE_SHFT);
913 GE_WriteReg(pGEHalLocal, REG_GE_ROT_MODE, u16RegVal);
914
915 return E_GE_OK;
916 }
917
GE_SetOnePixelMode(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)918 GE_Result GE_SetOnePixelMode(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
919 {
920
921 MS_U16 u16en;
922 //GE_DBG("%s\n", __FUNCTION__);
923
924 u16en = GE_ReadReg(pGEHalLocal, REG_GE_EN);
925 if (enable)
926 {
927 u16en |= GE_EN_ONE_PIXEL_MODE;
928 }
929 else
930 {
931 u16en &= (~GE_EN_ONE_PIXEL_MODE);
932 }
933 u16en |= GE_EN_BURST;
934 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en);
935
936 return E_GE_OK;
937 }
938
GE_SetBlend(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_BlendOp eBlendOp)939 GE_Result GE_SetBlend(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_BlendOp eBlendOp)
940 {
941 MS_U16 u16op;
942
943 switch (eBlendOp)
944 {
945 case E_GE_BLEND_ONE:
946 case E_GE_BLEND_CONST:
947 case E_GE_BLEND_ASRC:
948 case E_GE_BLEND_ADST:
949 case E_GE_BLEND_ROP8_ALPHA:
950 case E_GE_BLEND_ROP8_SRCOVER:
951 case E_GE_BLEND_ROP8_DSTOVER:
952 case E_GE_BLEND_ZERO:
953 case E_GE_BLEND_CONST_INV:
954 case E_GE_BLEND_ASRC_INV:
955 case E_GE_BLEND_ADST_INV:
956 case E_GE_BLEND_ALPHA_ADST:
957 case E_GE_BLEND_SRC_ATOP_DST:
958 case E_GE_BLEND_DST_ATOP_SRC:
959 case E_GE_BLEND_SRC_XOR_DST:
960 case E_GE_BLEND_INV_CONST:
961
962 u16op = eBlendOp;
963 break;
964 default:
965 return E_GE_FAIL_PARAM;
966 break;
967 }
968
969 u16op = (GE_ReadReg(pGEHalLocal, REG_GE_BLEND) & ~GE_BLEND_MASK) | u16op;
970 GE_WriteReg(pGEHalLocal, REG_GE_BLEND, u16op);
971
972 return E_GE_OK;
973 }
974
975
GE_SetAlpha(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_AlphaSrc eAlphaSrc)976 GE_Result GE_SetAlpha(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_AlphaSrc eAlphaSrc)
977 {
978 MS_U16 u16src;
979
980 switch (eAlphaSrc)
981 {
982 case E_GE_ALPHA_CONST:
983 case E_GE_ALPHA_ASRC:
984 case E_GE_ALPHA_ADST:
985 case E_GE_ALPHA_ROP8_SRC:
986 case E_GE_ALPHA_ROP8_IN:
987 case E_GE_ALPHA_ROP8_DSTOUT:
988 case E_GE_ALPHA_ROP8_SRCOUT:
989 case E_GE_ALPHA_ROP8_OVER:
990 case E_GE_ALPHA_ROP8_INV_CONST:
991 case E_GE_ALPHA_ROP8_INV_ASRC:
992 case E_GE_ALPHA_ROP8_INV_ADST:
993 case E_GE_ALPHA_ROP8_SRC_ATOP_DST:
994 case E_GE_ALPHA_ROP8_DST_ATOP_SRC:
995 case E_GE_ALPHA_ROP8_SRC_XOR_DST:
996 case E_GE_ALPHA_ROP8_INV_SRC_ATOP_DST:
997 case E_GE_ALPHA_ROP8_INV_DST_ATOP_SRC:
998
999 u16src = eAlphaSrc;
1000 break;
1001 default:
1002 return E_GE_FAIL_PARAM;
1003 break;
1004 }
1005
1006 u16src = (GE_ReadReg(pGEHalLocal, REG_GE_ALPHA) & ~GE_ALPHA_MASK) | (u16src<<GE_ALPHA_SHFT);
1007 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA, u16src);
1008
1009 return E_GE_OK;
1010 }
1011
GE_QueryDFBBldCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 * pU16SupportedBldFlags)1012 GE_Result GE_QueryDFBBldCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 *pU16SupportedBldFlags)
1013 {
1014 if(NULL == pU16SupportedBldFlags)
1015 {
1016 return E_GE_FAIL_PARAM;
1017 }
1018
1019 (*pU16SupportedBldFlags) = E_GE_DFB_BLD_FLAG_ALL;
1020
1021 return E_GE_OK;
1022 }
1023
GE_EnableDFBBld(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1024 GE_Result GE_EnableDFBBld(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1025 {
1026 MS_U16 u16RegVal;
1027
1028 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1029
1030 if (enable)
1031 {
1032 u16RegVal |= GE_EN_DFB_BLD;
1033 }
1034 else
1035 {
1036 u16RegVal &= ~GE_EN_DFB_BLD;
1037 }
1038
1039 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16RegVal);
1040
1041 return E_GE_OK;
1042 }
1043
GE_SetDFBBldFlags(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 u16DFBBldFlags)1044 GE_Result GE_SetDFBBldFlags(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 u16DFBBldFlags)
1045 {
1046 MS_U16 u16RegVal;
1047
1048 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_FLAGS) & ~GE_DFB_BLD_FLAGS_MASK);
1049
1050 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_COLORALPHA)
1051 {
1052 u16RegVal |= GE_DFB_BLD_FLAG_COLORALPHA;
1053 }
1054
1055 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_ALPHACHANNEL)
1056 {
1057 u16RegVal |= GE_DFB_BLD_FLAG_ALPHACHANNEL;
1058 }
1059
1060 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_COLORIZE)
1061 {
1062 u16RegVal |= GE_DFB_BLD_FLAG_COLORIZE;
1063 }
1064
1065 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_SRCPREMUL)
1066 {
1067 u16RegVal |= GE_DFB_BLD_FLAG_SRCPREMUL;
1068 }
1069
1070 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_SRCPREMULCOL)
1071 {
1072 u16RegVal |= GE_DFB_BLD_FLAG_SRCPREMULCOL;
1073 }
1074
1075 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_DSTPREMUL)
1076 {
1077 u16RegVal |= GE_DFB_BLD_FLAG_DSTPREMUL;
1078 }
1079
1080 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_XOR)
1081 {
1082 u16RegVal |= GE_DFB_BLD_FLAG_XOR;
1083 }
1084
1085 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_DEMULTIPLY)
1086 {
1087 u16RegVal |= GE_DFB_BLD_FLAG_DEMULTIPLY;
1088 }
1089
1090 GE_WriteReg(pGEHalLocal, REG_GE_DFB_BLD_FLAGS, u16RegVal);
1091
1092
1093 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_OP) & ~GE_DFB_SRC_COLORMASK);
1094
1095 if(u16DFBBldFlags & (E_GE_DFB_BLD_FLAG_SRCCOLORMASK | E_GE_DFB_BLD_FLAG_SRCALPHAMASK))
1096 {
1097 u16RegVal |= (1 << GE_DFB_SRC_COLORMASK_SHIFT);
1098 }
1099
1100
1101
1102 return E_GE_OK;
1103 }
1104
GE_SetDFBBldOP(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_DFBBldOP geSrcBldOP,GE_DFBBldOP geDstBldOP)1105 GE_Result GE_SetDFBBldOP(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_DFBBldOP geSrcBldOP, GE_DFBBldOP geDstBldOP)
1106 {
1107 MS_U16 u16RegVal;
1108
1109 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_OP) & ~(GE_DFB_SRCBLD_OP_MASK|GE_DFB_DSTBLD_OP_MASK));
1110 u16RegVal |= ((geSrcBldOP<<GE_DFB_SRCBLD_OP_SHFT) | (geDstBldOP<<GE_DFB_DSTBLD_OP_SHFT));
1111
1112 GE_WriteReg(pGEHalLocal, REG_GE_DFB_BLD_OP, u16RegVal);
1113
1114 return E_GE_OK;
1115 }
1116
GE_SetDFBBldConstColor(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RgbColor geRgbColor)1117 GE_Result GE_SetDFBBldConstColor(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RgbColor geRgbColor)
1118 {
1119 MS_U16 u16RegVal;
1120
1121 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_ALPHA_CONST) & ~GE_ALPHA_CONST_MASK) | (geRgbColor.a & 0xFF));
1122 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA_CONST, u16RegVal);
1123
1124 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_R_CONST) & ~GE_R_CONST_MASK) | ((geRgbColor.r<<GE_R_CONST_SHIFT) & GE_R_CONST_MASK));
1125 GE_WriteReg(pGEHalLocal, REG_GE_R_CONST, u16RegVal);
1126
1127 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_G_CONST) & ~GE_G_CONST_MASK) | ((geRgbColor.g<<GE_G_CONST_SHIFT) & GE_G_CONST_MASK));
1128 GE_WriteReg(pGEHalLocal, REG_GE_G_CONST, u16RegVal);
1129
1130 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_B_CONST) & ~GE_B_CONST_MASK) | ((geRgbColor.b<<GE_B_CONST_SHIFT) & GE_B_CONST_MASK));
1131 GE_WriteReg(pGEHalLocal, REG_GE_B_CONST, u16RegVal);
1132
1133 return E_GE_OK;
1134 }
1135
GE_SetDFBBldSrcColorMask(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RgbColor geRgbColor)1136 GE_Result GE_SetDFBBldSrcColorMask(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RgbColor geRgbColor)
1137 {
1138 //no more hw function
1139 /*
1140 MS_U16 u16RegVal;
1141
1142 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_ALPHA_CONST) & ~GE_ALPHA_SRCMASK_MASK) | (geRgbColor.a & 0xFF));
1143 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA_CONST, u16RegVal);
1144
1145 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_OP_MODE) & ~GE_SRCCOLOR_MASK_R) | ((geRgbColor.r<<GE_SRCCOLOR_MASK_R_SHIFT) & GE_SRCCOLOR_MASK_R));
1146 GE_WriteReg(pGEHalLocal, REG_GE_OP_MODE, u16RegVal);
1147
1148 u16RegVal = (geRgbColor.g<<GE_SRCCOLOR_MASK_G_SHIFT) | (geRgbColor.b<<GE_SRCCOLOR_MASK_B_SHIFT);
1149 GE_WriteReg(pGEHalLocal, REG_GE_SRCMASK_GB, u16RegVal);
1150 */
1151 return E_GE_OK;
1152 }
1153
1154
GE_WriteProtect(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 miu,MS_PHY addr_low,MS_PHY addr_high,GE_WPType eWPType)1155 GE_Result GE_WriteProtect(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 miu, MS_PHY addr_low, MS_PHY addr_high, GE_WPType eWPType)
1156 {
1157 MS_U16 u16cfg;
1158
1159 if (miu > 1)
1160 {
1161 return E_GE_FAIL;
1162 }
1163
1164 if ( (eWPType == E_GE_WP_IN_RANGE) || (eWPType == E_GE_WP_OUT_RANGE) )
1165 {
1166 // range setting
1167 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_LTH_L(miu), addr_low & (GE_MIU_ADDR_MASK&0xFFFF));
1168 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_LTH_H(miu), ((addr_low>>16) & (GE_MIU_ADDR_MASK>>16)) | (eWPType<<GE_MIU_PROT_MODE_SHFT));
1169 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_HTH_L(miu), addr_high & (GE_MIU_ADDR_MASK&0xFFFF));
1170 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_HTH_H(miu), (addr_high>>16) & (GE_MIU_ADDR_MASK>>16));
1171 // enable setting
1172 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_CFG) | (GE_CFG_MIU0_PROT << miu);
1173 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16cfg);
1174 }
1175 else if (eWPType == E_GE_WP_DISABLE)
1176 {
1177 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_CFG) & ~(GE_CFG_MIU0_PROT<<miu);
1178 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16cfg);
1179 }
1180 else
1181 {
1182 return E_GE_FAIL;
1183 }
1184
1185 return E_GE_OK;
1186 }
1187
1188
GE_SetSrcTile(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL tile)1189 GE_Result GE_SetSrcTile(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL tile)
1190 {
1191 //GE_DBG("%s\n", __FUNCTION__);
1192
1193 return E_GE_NOT_SUPPORT;
1194
1195 }
1196
1197
GE_SetDstTile(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL tile)1198 GE_Result GE_SetDstTile(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL tile)
1199 {
1200 //GE_DBG("%s\n", __FUNCTION__);
1201
1202 return E_GE_NOT_SUPPORT;
1203
1204 }
GE_SetASCK(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1205 GE_Result GE_SetASCK(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1206 {
1207 MS_U16 u16cfg;
1208
1209 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1210 if (enable)
1211 {
1212 u16cfg |= GE_EN_ASCK;
1213 }
1214 else
1215 {
1216 u16cfg &= ~GE_EN_ASCK;
1217 }
1218 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16cfg);
1219
1220 return E_GE_OK;
1221 }
GE_SetADCK(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1222 GE_Result GE_SetADCK(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1223 {
1224 MS_U16 u16cfg;
1225
1226 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1227 if (enable)
1228 {
1229 u16cfg |= GE_EN_DSCK;
1230 }
1231 else
1232 {
1233 u16cfg &= ~GE_EN_DSCK;
1234 }
1235 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16cfg);
1236
1237 return E_GE_OK;
1238 }
1239
1240
GE_GetFmtCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_BufFmt fmt,GE_BufType type,GE_FmtCaps * caps)1241 GE_Result GE_GetFmtCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_BufFmt fmt, GE_BufType type, GE_FmtCaps *caps)
1242 {
1243 static const MS_U8 _u8GETileWidth[] = {8, 4, 2, 0, 1};
1244
1245 caps->fmt = fmt;
1246 if (type == E_GE_BUF_SRC)
1247 {
1248 switch (fmt)
1249 {
1250 case E_GE_FMT_I1:
1251 case E_GE_FMT_I2:
1252 case E_GE_FMT_I4:
1253 case E_GE_FMT_I8:
1254 caps->u8BaseAlign = 1;
1255 caps->u8PitchAlign = 1;
1256 caps->u8Non1pAlign = 0;
1257 caps->u8HeightAlign = 1;
1258 caps->u8StretchAlign = 1;
1259 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1260 caps->u8TileWidthAlign = _u8GETileWidth[fmt];
1261 caps->u8TileHeightAlign = 16;
1262 break;
1263 case E_GE_FMT_RGB565:
1264 case E_GE_FMT_RGBA5551:
1265 case E_GE_FMT_RGBA4444:
1266 case E_GE_FMT_ARGB1555:
1267 case E_GE_FMT_1ABFgBg12355:
1268 case E_GE_FMT_ARGB4444:
1269 case E_GE_FMT_YUV422:
1270 case E_GE_FMT_FaBaFgBg2266:
1271 caps->u8BaseAlign = 2;
1272 caps->u8PitchAlign = 2;
1273 caps->u8Non1pAlign = 0;
1274 caps->u8HeightAlign = 1;
1275 caps->u8StretchAlign = 2;
1276 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1277 caps->u8TileWidthAlign = 16;
1278 caps->u8TileHeightAlign = 16;
1279 break;
1280 case E_GE_FMT_ABGR8888:
1281 case E_GE_FMT_ARGB8888:
1282 caps->u8BaseAlign = 4;
1283 caps->u8PitchAlign = 4;
1284 caps->u8Non1pAlign = 0;
1285 caps->u8HeightAlign = 1;
1286 caps->u8StretchAlign = 4;
1287 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1288 caps->u8TileWidthAlign = 8;
1289 caps->u8TileHeightAlign = 16;
1290 break;
1291 // Not Support
1292 default:
1293 caps->fmt = E_GE_FMT_GENERIC;
1294 caps->u8BaseAlign = 4;
1295 caps->u8PitchAlign = 4;
1296 caps->u8Non1pAlign = 0;
1297 caps->u8HeightAlign = 1;
1298 caps->u8StretchAlign = 4;
1299 caps->u8TileBaseAlign = 0;
1300 caps->u8TileWidthAlign = 0;
1301 caps->u8TileHeightAlign = 0;
1302 return E_GE_FAIL_FORMAT;
1303 }
1304 }
1305 else
1306 {
1307 switch (fmt)
1308 {
1309 case E_GE_FMT_I8:
1310 caps->u8BaseAlign = 1;
1311 caps->u8PitchAlign = 1;
1312 caps->u8Non1pAlign = 0;
1313 caps->u8HeightAlign = 1;
1314 caps->u8StretchAlign = 1;
1315 caps->u8TileBaseAlign = 8;
1316 caps->u8TileWidthAlign = _u8GETileWidth[fmt];
1317 caps->u8TileHeightAlign = 16;
1318 break;
1319 case E_GE_FMT_RGB565:
1320 case E_GE_FMT_ARGB1555:
1321 case E_GE_FMT_RGBA5551:
1322 case E_GE_FMT_RGBA4444:
1323 case E_GE_FMT_1ABFgBg12355:
1324 case E_GE_FMT_ARGB4444:
1325 case E_GE_FMT_YUV422:
1326 case E_GE_FMT_FaBaFgBg2266:
1327 case E_GE_FMT_ARGB1555_DST:
1328 caps->u8BaseAlign = 2;
1329 caps->u8PitchAlign = 2;
1330 caps->u8Non1pAlign = 0;
1331 caps->u8HeightAlign = 1;
1332 caps->u8StretchAlign = 2;
1333 caps->u8TileBaseAlign = 8;
1334 caps->u8TileWidthAlign = 16;
1335 caps->u8TileHeightAlign = 16;
1336 break;
1337 case E_GE_FMT_ABGR8888:
1338 case E_GE_FMT_ARGB8888:
1339 caps->u8BaseAlign = 4;
1340 caps->u8PitchAlign = 4;
1341 caps->u8Non1pAlign = 0;
1342 caps->u8HeightAlign = 1;
1343 caps->u8StretchAlign = 4;
1344 caps->u8TileBaseAlign = 8;
1345 caps->u8TileWidthAlign = 8;
1346 caps->u8TileHeightAlign = 16;
1347 break;
1348 // Not Support
1349 case E_GE_FMT_I1:
1350 case E_GE_FMT_I2:
1351 case E_GE_FMT_I4:
1352 default:
1353 caps->fmt = E_GE_FMT_GENERIC;
1354 caps->u8BaseAlign = 4;
1355 caps->u8PitchAlign = 4;
1356 caps->u8Non1pAlign = 0;
1357 caps->u8HeightAlign = 1;
1358 caps->u8StretchAlign = 4;
1359 caps->u8TileBaseAlign = 0;
1360 caps->u8TileWidthAlign = 0;
1361 caps->u8TileHeightAlign = 0;
1362 return E_GE_FAIL_FORMAT;
1363 }
1364 }
1365
1366 return E_GE_OK;
1367 }
1368
1369
GE_Set_IOMap_Base(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_VIRT addr)1370 GE_Result GE_Set_IOMap_Base(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_VIRT addr)
1371 {
1372 pGEHalLocal->va_mmio_base = addr;
1373 return E_GE_OK;
1374 }
1375
1376
direct_serial_diff(MS_U16 tagID1,MS_U16 tagID2)1377 static MS_S32 direct_serial_diff( MS_U16 tagID1, MS_U16 tagID2)
1378 {
1379 if(tagID1 < tagID2)
1380 {
1381 if((tagID2-tagID1)>0x7FFF)
1382 {
1383 return (MS_S32)(0xFFFFUL-tagID2+tagID1+1);
1384 }
1385 else
1386 return -(MS_S32)(tagID2-tagID1);
1387 }
1388 else
1389 {
1390 if((tagID1-tagID2)>0x7FFF)
1391 {
1392 return -(MS_S32)(0xFFFF-tagID1+tagID2+1);
1393 }
1394 else
1395 return (MS_S32)(tagID1-tagID2);
1396 }
1397 }
1398
1399 //-------------------------------------------------------------------------------------------------
1400 /// Wait GE TagID back
1401 /// @param tagID \b IN: tag id number for wating
1402 /// @return @ref GE_Result
1403 //-------------------------------------------------------------------------------------------------
GE_WaitTAGID(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 tagID)1404 GE_Result GE_WaitTAGID(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 tagID)
1405 {
1406 MS_U16 tagID_HW;
1407 MS_U32 u32Temp;
1408
1409
1410 while(1)
1411 {
1412
1413 tagID_HW = GE_ReadReg(pGEHalLocal, REG_GE_TAG);
1414 if(direct_serial_diff(tagID_HW, tagID) >= 0)
1415 {
1416 //printf("tagIDHW = %04x %04x\n", tagID_HW, tagID);
1417 break;
1418 }
1419
1420 u32Temp = GE_ReadReg(pGEHalLocal, REG_GE_STAT);
1421 if((u32Temp&GE_STAT_CMDQ_MASK) < (16UL<<11))
1422 continue;
1423 if((u32Temp&GE_STAT_CMDQ2_MASK) < (16UL<<3))
1424 continue;
1425 if(GE_ReadReg(pGEHalLocal, REG_GE_CFG) & GE_CFG_VCMDQ)
1426 {
1427 u32Temp = GE_ReadReg(pGEHalLocal, REG_GE_VCMDQ_STAT);
1428 u32Temp |= (GE_ReadReg(pGEHalLocal, REG_GE_BIST_STAT)&1)<<16;
1429 if(u32Temp)
1430 continue;
1431
1432 }
1433
1434 if(GE_ReadReg(pGEHalLocal, REG_GE_STAT) & GE_STAT_BUSY)
1435 continue;
1436
1437 break;
1438 GE_YIELD();
1439
1440 }
1441
1442 return E_GE_OK;
1443
1444 }
1445 //-------------------------------------------------------------------------------------------------
1446 /// MDrv_GE_SAVE_CHIP_IMAGE
1447 //-------------------------------------------------------------------------------------------------
GE_Restore_HAL_Context(GE_CTX_HAL_LOCAL * pGEHalLocal)1448 GE_Result GE_Restore_HAL_Context(GE_CTX_HAL_LOCAL *pGEHalLocal)
1449 {
1450 MS_U16 i = 0;
1451 MS_U16 u16RegVal;
1452
1453 //GE_WaitIdle(pGEHalLocal);
1454
1455 while( (_GE_Reg_Backup[i] != 0xFF) )
1456 {
1457 if(_GE_Reg_Backup[i]>= 0x80)
1458 {
1459 break;
1460 }
1461
1462 u16RegVal = GE_ReadReg(pGEHalLocal, _GE_Reg_Backup[i]);
1463 GE_RestoreReg(pGEHalLocal, _GE_Reg_Backup[i], u16RegVal);
1464 i++;
1465 }
1466
1467 //GE_DBG(printf("GE_Restore_HAL_Context finished \n\n"));
1468
1469 return E_GE_OK;
1470 }
1471
1472 //-------------------------------------------------------------------------------------------------
1473 /// Calculate Blit Scale Ratio:
1474 //-------------------------------------------------------------------------------------------------
GE_CalcBltScaleRatio(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 u16SrcWidth,MS_U16 u16SrcHeight,MS_U16 u16DstWidth,MS_U16 u16DstHeight,GE_ScaleInfo * pScaleinfo)1475 GE_Result GE_CalcBltScaleRatio(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 u16SrcWidth, MS_U16 u16SrcHeight, MS_U16 u16DstWidth, MS_U16 u16DstHeight, GE_ScaleInfo *pScaleinfo)
1476 {
1477 if(NULL == pScaleinfo)
1478 {
1479 return E_GE_FAIL_PARAM;
1480 }
1481
1482 if(u16SrcWidth >= (u16DstWidth<< g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1483 {
1484 pScaleinfo->x = 0xFFFFFFFF;
1485 }
1486 else
1487 {
1488 pScaleinfo->x = GE_Divide2Fixed(u16SrcWidth, u16DstWidth, g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin, 12);
1489 }
1490
1491 if(u16SrcHeight >= (u16DstHeight<< g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1492 {
1493 pScaleinfo->y = 0xFFFFFFFF;
1494 }
1495 else
1496 {
1497 pScaleinfo->y = GE_Divide2Fixed(u16SrcHeight, u16DstHeight, g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin, 12);
1498 }
1499
1500 /* HW use format S0.12 which means Bit(12) should be Sign bit
1501 // If overflow, S bit maybe wrong, handle it as actually value we hoped*/
1502 pScaleinfo->init_x = GE_Divide2Fixed(u16SrcWidth-u16DstWidth, 2 * u16DstWidth, 0, 12);
1503 if((u16SrcWidth/2) > u16DstWidth)
1504 {
1505 pScaleinfo->init_x = 0;
1506 }
1507 else if(u16SrcWidth >= u16DstWidth)
1508 {
1509 pScaleinfo->init_x &= (~(1<<12));
1510 }
1511 else
1512 {
1513 pScaleinfo->init_x |= (1<<12);
1514 }
1515
1516 pScaleinfo->init_y = GE_Divide2Fixed(u16SrcHeight-u16DstHeight, 2 * u16DstHeight, 0, 12);
1517 if((u16SrcHeight/2) > u16DstHeight)
1518 {
1519 pScaleinfo->init_y = 0;
1520 }
1521 else if(u16SrcHeight >= u16DstHeight)
1522 {
1523 pScaleinfo->init_y &= (~(1<<12));
1524 }
1525 else
1526 {
1527 pScaleinfo->init_y |= (1<<12);
1528 }
1529
1530 if (pGEHalLocal->bYScalingPatch)
1531 {
1532 if (u16SrcHeight<=5)
1533 pScaleinfo->init_y = (1<<12);
1534 }
1535 return E_GE_OK;
1536 }
1537
1538 //-------------------------------------------------------------------------------------------------
1539 /// Set GE scale register
1540 /// @param GE_Rect *src \b IN: src coordinate setting
1541 /// @param GE_DstBitBltType *dst \b IN: dst coordinate setting
1542 /// @return @ref GE_Result
1543 //-------------------------------------------------------------------------------------------------
GE_SetBltScaleRatio(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Rect * src,GE_DstBitBltType * dst,GE_Flag flags,GE_ScaleInfo * scaleinfo)1544 GE_Result GE_SetBltScaleRatio(GE_CTX_HAL_LOCAL *pGEHalLocal,GE_Rect *src, GE_DstBitBltType *dst, GE_Flag flags, GE_ScaleInfo* scaleinfo)
1545 {
1546 GE_ScaleInfo geScaleinfo, *pGeScaleInfo = scaleinfo;
1547
1548 if(flags & E_GE_FLAG_BYPASS_STBCOEF)
1549 {
1550 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1551 }
1552 else if (flags & E_GE_FLAG_BLT_STRETCH)
1553 {
1554 /* Safe Guard. Prevent set scaling ratio < 1/32. Also prevent 0 h/w */
1555 if ((src->width-1) >= (dst->dstblk.width << g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1556 {
1557 if(pGEHalLocal->bIsComp == FALSE)
1558 {
1559 return E_GE_FAIL_PARAM;
1560 }
1561
1562 dst->dstblk.width = ((src->width-1) >> g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin) + 1;
1563 }
1564 if ((src->height-1) >= (dst->dstblk.height << g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1565 {
1566 if(pGEHalLocal->bIsComp == FALSE)
1567 {
1568 return E_GE_FAIL_PARAM;
1569 }
1570
1571 dst->dstblk.height = ((src->height-1) >> g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin) + 1;
1572 }
1573
1574 pGeScaleInfo = &geScaleinfo;
1575 GE_CalcBltScaleRatio(pGEHalLocal, src->width, src->height, dst->dstblk.width, dst->dstblk.height, pGeScaleInfo);
1576 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1577 }
1578 else
1579 {
1580 pGeScaleInfo = &geScaleinfo;
1581
1582 pGeScaleInfo->x = (1<<12);
1583 pGeScaleInfo->y = (1<<12);
1584 pGeScaleInfo->init_x = 0;
1585 pGeScaleInfo->init_y = 0;
1586
1587 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1588 }
1589
1590 return E_GE_OK;
1591 }
1592
GE_BitBltEX_Trape(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Rect * pSrcRect,GE_Normalized_Trapezoid * pGENormTrapezoid,MS_U32 u32Flags,GE_ScaleInfo * pScaleinfo)1593 GE_Result GE_BitBltEX_Trape(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_Rect *pSrcRect, GE_Normalized_Trapezoid *pGENormTrapezoid, MS_U32 u32Flags, GE_ScaleInfo* pScaleinfo)
1594 {
1595 return E_GE_NOT_SUPPORT;
1596 }
1597
1598 //-------------------------------------------------------------------------------------------------
1599 /// GE Primitive Drawing - TRAPEZOID
1600 /// @param pGENormTrapezoid \b IN: pointer to position of TRAPEZOID
1601 /// @param u32ColorS \b IN: start color of TRAPEZOID when gradient
1602 /// @param u32ColorE \b IN: end color of TRAPEZOID when gradient
1603 /// @param pColorDeltaX \b IN: x gradient color
1604 /// @param pColorDeltaY \b IN: y gradient color
1605 /// @return @ref GE_Result
1606 //-------------------------------------------------------------------------------------------------
GE_FillTrapezoid(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bYTrapezoid,GE_Normalized_Trapezoid * pGENormTrapezoid,MS_U32 u32Color,GE_ColorDelta * pColorDeltaX,GE_ColorDelta * pColorDeltaY)1607 GE_Result GE_FillTrapezoid(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bYTrapezoid, GE_Normalized_Trapezoid *pGENormTrapezoid, MS_U32 u32Color, GE_ColorDelta *pColorDeltaX, GE_ColorDelta *pColorDeltaY)
1608 {
1609 return E_GE_NOT_SUPPORT;
1610 }
1611
1612 //-------------------------------------------------------------------------------------------------
1613 /// Set GE DISABLE MIU ACCESS
1614 /// @param enable \b IN: enable and update setting
1615 /// @return @ref GE_Result
1616 //-------------------------------------------------------------------------------------------------
GE_SetDisaMIUAccess(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1617 GE_Result GE_SetDisaMIUAccess(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1618 {
1619 MS_U16 u16en;
1620
1621 GE_DBG("%s\n", __FUNCTION__);
1622
1623 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1624 if (enable)
1625 {
1626 u16en |= GE_CFG_DISABLE_MIU_ACS;
1627 }
1628 else
1629 {
1630 u16en &= ~GE_CFG_DISABLE_MIU_ACS;
1631 }
1632 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1633
1634 return E_GE_OK;
1635 }
1636 //-------------------------------------------------------------------------------------------------
1637 /// Set GE Clear Invalid MIU Flag
1638 /// @param enable \b IN: enable and update setting
1639 /// @return @ref GE_Result
1640 //-------------------------------------------------------------------------------------------------
GE_ClrInvalMIUFlg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1641 GE_Result GE_ClrInvalMIUFlg(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1642 {
1643 MS_U16 u16en;
1644
1645 GE_DBG("%s\n", __FUNCTION__);
1646
1647 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1648 if (enable)
1649 {
1650 u16en |= GE_CFG_CLR_MIU_FLG;
1651 }
1652 else
1653 {
1654 u16en &= ~GE_CFG_CLR_MIU_FLG;
1655 }
1656 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1657
1658 return E_GE_OK;
1659 }
1660
1661 //-------------------------------------------------------------------------------------------------
1662 /// Set Enable Dynamic Clock Gating
1663 /// @param enable \b IN: enable and update setting
1664 /// @return @ref GE_Result
1665 //-------------------------------------------------------------------------------------------------
GE_EnableDynaClkGate(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1666 GE_Result GE_EnableDynaClkGate(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1667 {
1668 MS_U16 u16en;
1669
1670 GE_DBG("%s\n", __FUNCTION__);
1671
1672 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1673 if (enable)
1674 {
1675 u16en |= GE_CFG_EN_DNY_CLK_GATE;
1676 }
1677 else
1678 {
1679 u16en &= ~GE_CFG_EN_DNY_CLK_GATE;
1680 }
1681 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1682
1683 return E_GE_OK;
1684 }
1685
GE_EnableTrapezoidAA(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1686 GE_Result GE_EnableTrapezoidAA(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1687 {
1688 //GE_DBG("%s\n", __FUNCTION__);
1689
1690 return E_GE_NOT_SUPPORT;
1691
1692 }
1693
GE_EnableTrapSubPixCorr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1694 GE_Result GE_EnableTrapSubPixCorr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1695 {
1696 //GE_DBG("%s\n", __FUNCTION__);
1697
1698 return E_GE_NOT_SUPPORT;
1699
1700 }
1701
GE_GetNextTAGID(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bStepTagBefore)1702 MS_U16 GE_GetNextTAGID(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bStepTagBefore)
1703 {
1704 MS_U16 tagID;
1705 if(bStepTagBefore)
1706 {
1707 if(0 == ++pGEHalLocal->pHALShared->global_tagID)
1708 ++pGEHalLocal->pHALShared->global_tagID;
1709 }
1710 tagID =pGEHalLocal->pHALShared->global_tagID;
1711
1712 return tagID;
1713 }
1714
GE_SetVCmdBuffer(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY PhyAddr,GE_VcmqBufSize enBufSize)1715 GE_Result GE_SetVCmdBuffer(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY PhyAddr, GE_VcmqBufSize enBufSize)
1716 {
1717 MS_U16 u16RegVal=0;
1718 MS_U16 u16temp2=0;
1719 #if GE_VQADDR_LOCK_PATCH
1720 MS_U16 i=0;
1721 #endif
1722
1723 if(enBufSize >= E_GE_VCMD_1024K)
1724 {
1725 return E_GE_NOT_SUPPORT;
1726 }
1727
1728 GE_SetVQBufMIUId(pGEHalLocal, _GFXAPI_MIU_ID(PhyAddr));
1729 u16temp2 = GE_ReadReg(pGEHalLocal, REG_GE_YUV_MODE);
1730 if(PhyAddr>= HAL_MIU2_BASE)
1731 GE_WriteReg(pGEHalLocal, REG_GE_YUV_MODE, u16temp2|GE_VCMQ_MIU_SEL_H);
1732 else
1733 GE_WriteReg(pGEHalLocal, REG_GE_YUV_MODE, u16temp2&(~GE_VCMQ_MIU_SEL_H));
1734 PhyAddr = GE_ConvertAPIAddr2HAL(pGEHalLocal, _GFXAPI_MIU_ID(PhyAddr), _GFXAPI_PHYS_ADDR_IN_MIU(PhyAddr));
1735
1736 #ifdef GE_VQ_MIU_HANG_PATCH
1737 pGEHalLocal->pHALShared->u8VCmdQMiu = _GFXAPI_MIU_ID(PhyAddr);
1738 #endif
1739
1740 #if GE_VQADDR_LOCK_PATCH
1741 for (i=0; i<GE_VQADDR_ENHANCE_LOCK_TIMES; i++)
1742 {
1743 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_H, PhyAddr >> 16); // Address
1744 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_L, PhyAddr & 0xffff); // Address
1745 }
1746 #else
1747 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_L, PhyAddr & 0xffff); // Address
1748 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_H, PhyAddr >> 16); // Address
1749 #endif
1750
1751 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_VCMDQ_SIZE) & ~GE_VCMDQ_SIZE_MASK) | ((GE_MapVQ2Reg(enBufSize) & GE_VCMDQ_SIZE_MASK));
1752 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_SIZE, u16RegVal);
1753
1754 return E_GE_OK;
1755 }
1756
GE_InitCtxHalPalette(GE_CTX_HAL_LOCAL * pGEHalLocal)1757 GE_Result GE_InitCtxHalPalette(GE_CTX_HAL_LOCAL *pGEHalLocal)
1758 {
1759 MS_U32 u32Idx;
1760
1761 for(u32Idx=0; u32Idx<GE_PALETTE_NUM; u32Idx++)
1762 {
1763 GE_WriteReg(pGEHalLocal, REG_GE_CLUT_CTRL, ((u32Idx) & GE_CLUT_CTRL_IDX_MASK) | GE_CLUT_CTRL_RD);
1764 GE_WaitIdle(pGEHalLocal);
1765 pGEHalLocal->u32Palette[u32Idx] = ByteSwap32(((GE_ReadReg(pGEHalLocal, REG_GE_CLUT_H)<<16) | GE_ReadReg(pGEHalLocal, REG_GE_CLUT_L)));
1766 }
1767
1768 pGEHalLocal->bPaletteDirty = FALSE;
1769
1770 return (E_GE_OK);
1771 }
1772
GE_Init_HAL_Context(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_CTX_HAL_SHARED * pHALShared,MS_BOOL bNeedInitShared)1773 void GE_Init_HAL_Context(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared)
1774 {
1775 memset(pGEHalLocal, 0, sizeof(*pGEHalLocal));
1776
1777 if(bNeedInitShared)
1778 {
1779 memset(pHALShared, 0, sizeof(*pHALShared));
1780 pHALShared->global_tagID = 1;
1781 }
1782 pGEHalLocal->pHALShared = pHALShared;
1783 pGEHalLocal->bYScalingPatch = FALSE;
1784 }
1785
GE_Set_IOMap_Base2(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_VIRT addr)1786 GE_Result GE_Set_IOMap_Base2(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_VIRT addr)
1787 {
1788 pGEHalLocal->va_mmio_base2 = addr;
1789 return E_GE_OK;
1790 }
1791
GE_SetClock(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bOnOff)1792 GE_Result GE_SetClock(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bOnOff)
1793 {
1794 #ifdef CONFIG_MSTAR_CLKM
1795 MS_S32 handle;
1796
1797 handle = Drv_Clkm_Get_Handle("g_clk_ge");
1798 Drv_Clkm_Set_Clk_Source(handle,"CLK_FASTEST");
1799 #else
1800 MS_U16 u16tmp = 0;
1801
1802 u16tmp = CLK_REG(CHIP_GE_CLK);
1803
1804 if (bOnOff)
1805 {
1806 u16tmp &= ~ BIT(0);
1807 }
1808 else
1809 {
1810 u16tmp |= BIT(0);
1811 }
1812 CLK_REG(CHIP_GE_CLK) = u16tmp;
1813 #endif
1814 return E_GE_OK;
1815 }
1816
GE_NonOnePixelModeCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,PatchBitBltInfo * patchInfo)1817 MS_BOOL GE_NonOnePixelModeCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, PatchBitBltInfo* patchInfo)
1818 {
1819 GE_ScaleInfo geScaleinfo;
1820 GE_Result ret;
1821
1822 patchInfo->scaleinfo =&geScaleinfo;
1823 ret = GE_CalcBltScaleRatio(pGEHalLocal, patchInfo->src.width , patchInfo->src.height ,patchInfo->dst.dstblk.width , patchInfo->dst.dstblk.height, patchInfo->scaleinfo);
1824
1825 if(ret == E_GE_FAIL_PARAM)
1826 {
1827 return pGEHalLocal->pGeChipPro->bFourPixelModeStable;
1828 }
1829 else if ((patchInfo->scaleinfo->init_x>0xFFF)||(patchInfo->scaleinfo->init_y>0xFFF))
1830 {
1831 return FALSE;
1832 }
1833 else
1834 {
1835 return pGEHalLocal->pGeChipPro->bFourPixelModeStable;
1836 }
1837 }
1838
HAL_GE_EnableCalcSrc_WidthHeight(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1839 GE_Result HAL_GE_EnableCalcSrc_WidthHeight(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1840 {
1841 MS_U16 u16en;
1842
1843 u16en = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1844
1845 if(bEnable)
1846 {
1847 if(u16en & GE_EN_BURST)
1848 {
1849 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en | GE_EN_CALC_SRC_WH);
1850 }
1851 }
1852 else
1853 {
1854 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en & (~GE_EN_CALC_SRC_WH));
1855 }
1856
1857 return E_GE_OK;
1858 }
1859
GEWD_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 * value)1860 GE_Result GEWD_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16* value)
1861 {
1862 //For two source buffer read register
1863 return E_GE_NOT_SUPPORT;
1864 }
1865
GEWD_WriteReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)1866 GE_Result GEWD_WriteReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
1867 {
1868 //For two source buffer write register
1869 return E_GE_NOT_SUPPORT;
1870 }
1871
GE_SetTLBMode(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_TLB_Mode tlb_type)1872 GE_Result GE_SetTLBMode(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_TLB_Mode tlb_type)
1873 {
1874 return E_GE_NOT_SUPPORT;
1875 }
1876
GE_GetTLBSRCADDR(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY * addr)1877 GE_Result GE_GetTLBSRCADDR(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY* addr)
1878 {
1879 return E_GE_NOT_SUPPORT;
1880 }
1881
GE_GetTLBDSTADDR(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY * addr)1882 GE_Result GE_GetTLBDSTADDR(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY* addr)
1883 {
1884 return E_GE_NOT_SUPPORT;
1885 }
1886
GE_SetTLBSrcBaseAddr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY addr)1887 GE_Result GE_SetTLBSrcBaseAddr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY addr)
1888 {
1889 return E_GE_NOT_SUPPORT;
1890 }
1891
GE_SetTLBDstBaseAddr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY addr)1892 GE_Result GE_SetTLBDstBaseAddr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY addr)
1893 {
1894 return E_GE_NOT_SUPPORT;
1895 }
1896
GE_FlushTLBTable(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1897 GE_Result GE_FlushTLBTable(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1898 {
1899 return E_GE_NOT_SUPPORT;
1900 }
1901
GE_SetTLBTag(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 tag)1902 GE_Result GE_SetTLBTag(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 tag)
1903 {
1904 return E_GE_NOT_SUPPORT;
1905 }
1906
GE_StopFlushTLB(GE_CTX_HAL_LOCAL * pGEHalLocal)1907 GE_Result GE_StopFlushTLB(GE_CTX_HAL_LOCAL *pGEHalLocal)
1908 {
1909 return E_GE_NOT_SUPPORT;
1910 }
1911
GE_Get_MIU_INTERVAL(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 miu,MS_PHY * value)1912 GE_Result GE_Get_MIU_INTERVAL(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 miu, MS_PHY* value)
1913 {
1914 if(miu==2)
1915 {
1916 *value = HAL_MIU2_BASE;
1917 }
1918 else if(miu==1)
1919 {
1920 *value = HAL_MIU1_BASE;
1921 }
1922 else if(miu==0)
1923 {
1924 *value = 0;
1925 }
1926 else
1927 {
1928 *value = 0;
1929 return E_GE_FAIL;
1930 }
1931
1932 return E_GE_OK;
1933 }
1934
HAL_GE_AdjustDstWin(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bDstXInv)1935 GE_Result HAL_GE_AdjustDstWin( GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bDstXInv )
1936 {
1937 MS_U16 u16ClipL=0,u16ClipR=0;
1938 MS_U16 u16DstX=0;
1939
1940 u16DstX = GE_ReadReg(pGEHalLocal, REG_GE_PRIM_V1_X);
1941 if( bDstXInv==FALSE )
1942 {
1943 u16ClipR = GE_ReadReg(pGEHalLocal, REG_GE_CLIP_R);
1944 if( u16ClipR < u16DstX )
1945 {
1946 GE_WriteReg(pGEHalLocal, REG_GE_PRIM_V1_X, u16ClipR);
1947 }
1948 }
1949 else
1950 {
1951 u16ClipL = GE_ReadReg(pGEHalLocal, REG_GE_CLIP_L);
1952 if( u16ClipL > u16DstX )
1953 {
1954 GE_WriteReg(pGEHalLocal, REG_GE_PRIM_V1_X, u16ClipL);
1955 }
1956 }
1957
1958 return E_GE_OK;
1959 }
1960
HAL_GE_AdjustRotateDstWin(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8Rotate)1961 GE_Result HAL_GE_AdjustRotateDstWin( GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8Rotate )
1962 {
1963 return E_GE_OK;
1964 }
1965
HAL_GE_SetBurstMiuLen(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable,MS_U32 u32BurstLen)1966 GE_Result HAL_GE_SetBurstMiuLen(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL bEnable,MS_U32 u32BurstLen)
1967 {
1968 MS_U16 u16Reg = 0;
1969
1970 u16Reg = GE_ReadReg(pGEHalLocal, REG_GE_DBG);
1971 u16Reg &= ( ~GE_DBG_MIU_MAX_LEG );
1972 u16Reg |= ( ((u32BurstLen - 1)<<8) & GE_DBG_MIU_MAX_LEG );
1973 GE_WriteReg(pGEHalLocal, REG_GE_DBG, u16Reg);
1974
1975 u16Reg = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
1976 if(bEnable)
1977 u16Reg |= GE_CFG_LENGTH_LIMIT;
1978 else
1979 u16Reg &= (~GE_CFG_LENGTH_LIMIT);
1980 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16Reg);
1981
1982 return E_GE_OK;
1983 }
1984
1985