| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_common.c | 398 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
699 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
703 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
718 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
723 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
739 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
743 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
768 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
774 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
778 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_ATSC.c | 486 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
488 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
544 HAL_DMD_RIU_WriteByteMask(0x101e9e, 0x00, 0xCF); // Set IF&RF AGC PAD and PWM AGC mode in _HAL_INTERN_ATSC_InitClk()
547 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
549 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
551 HAL_DMD_RIU_WriteByteMask(0x101ea1, 0x00, 0x80); // Set all pads (except SPI) as output in _HAL_INTERN_ATSC_InitClk()
553 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x01); in _HAL_INTERN_ATSC_InitClk()
554 HAL_DMD_RIU_WriteByteMask(0x112003, 0x20, 0x20); // Release Ana misc resest in _HAL_INTERN_ATSC_InitClk()
555 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x01, 0x01); in _HAL_INTERN_ATSC_InitClk()
660 HAL_DMD_RIU_WriteByteMask(0x101eaf, 0x10, 0x18); // Set TS PAD in _HAL_INTERN_ATSC_InitClk()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/ |
| H A D | halDMD_INTERN_common.c | 398 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
699 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
703 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
718 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
723 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
739 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
743 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
768 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
774 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
778 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_ATSC.c | 457 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
459 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
515 HAL_DMD_RIU_WriteByteMask(0x101e9e, 0x00, 0xCF); // Set IF&RF AGC PAD and PWM AGC mode in _HAL_INTERN_ATSC_InitClk()
518 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
520 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
522 HAL_DMD_RIU_WriteByteMask(0x101ea1, 0x00, 0x80); // Set all pads (except SPI) as output in _HAL_INTERN_ATSC_InitClk()
524 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x01); in _HAL_INTERN_ATSC_InitClk()
525 HAL_DMD_RIU_WriteByteMask(0x112003, 0x20, 0x20); // Release Ana misc resest in _HAL_INTERN_ATSC_InitClk()
526 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x01, 0x01); in _HAL_INTERN_ATSC_InitClk()
631 HAL_DMD_RIU_WriteByteMask(0x101eaf, 0x10, 0x18); // Set TS PAD in _HAL_INTERN_ATSC_InitClk()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/ |
| H A D | halDMD_INTERN_common.c | 398 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
699 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
703 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
718 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
723 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
739 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
743 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
768 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
774 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
778 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_ATSC.c | 457 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
459 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
515 HAL_DMD_RIU_WriteByteMask(0x101e9e, 0x00, 0xCF); // Set IF&RF AGC PAD and PWM AGC mode in _HAL_INTERN_ATSC_InitClk()
518 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
520 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
522 HAL_DMD_RIU_WriteByteMask(0x101ea1, 0x00, 0x80); // Set all pads (except SPI) as output in _HAL_INTERN_ATSC_InitClk()
524 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x01); in _HAL_INTERN_ATSC_InitClk()
525 HAL_DMD_RIU_WriteByteMask(0x112003, 0x20, 0x20); // Release Ana misc resest in _HAL_INTERN_ATSC_InitClk()
526 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x01, 0x01); in _HAL_INTERN_ATSC_InitClk()
631 HAL_DMD_RIU_WriteByteMask(0x101eaf, 0x10, 0x18); // Set TS PAD in _HAL_INTERN_ATSC_InitClk()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_common.c | 398 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
699 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
703 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
718 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
723 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
739 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
743 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
768 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
774 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
778 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_common.c | 398 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
699 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
703 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
718 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
723 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
739 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
743 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
768 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
774 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
778 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/ |
| H A D | halDMD_INTERN_common.c | 398 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
699 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
703 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
718 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
723 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
739 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
743 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
768 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
774 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
778 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_ATSC.c | 457 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
459 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
515 HAL_DMD_RIU_WriteByteMask(0x101e9e, 0x00, 0xCF); // Set IF&RF AGC PAD and PWM AGC mode in _HAL_INTERN_ATSC_InitClk()
518 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x20, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
520 HAL_DMD_RIU_WriteByteMask(0x101e05, 0x00, 0x30); // Set IF&RF AGC output mode in _HAL_INTERN_ATSC_InitClk()
522 HAL_DMD_RIU_WriteByteMask(0x101ea1, 0x00, 0x80); // Set all pads (except SPI) as output in _HAL_INTERN_ATSC_InitClk()
524 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x01); in _HAL_INTERN_ATSC_InitClk()
525 HAL_DMD_RIU_WriteByteMask(0x112003, 0x20, 0x20); // Release Ana misc resest in _HAL_INTERN_ATSC_InitClk()
526 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x01, 0x01); in _HAL_INTERN_ATSC_InitClk()
631 HAL_DMD_RIU_WriteByteMask(0x101eaf, 0x10, 0x18); // Set TS PAD in _HAL_INTERN_ATSC_InitClk()
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| H A D | halDMD_INTERN_ISDBT.c | 312 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x03); in _HAL_INTERN_ISDBT_InitClk()
347 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x03, 0x03); in _HAL_INTERN_ISDBT_InitClk()
356 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x03); in _HAL_INTERN_ISDBT_InitClk()
397 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x03, 0x03); in _HAL_INTERN_ISDBT_InitClk()
404 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x03); in _HAL_INTERN_ISDBT_InitClk()
439 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x03, 0x03); in _HAL_INTERN_ISDBT_InitClk()
448 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x03); in _HAL_INTERN_ISDBT_InitClk()
490 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x03, 0x03); in _HAL_INTERN_ISDBT_InitClk()
499 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x00, 0x03); in _HAL_INTERN_ISDBT_InitClk()
541 HAL_DMD_RIU_WriteByteMask(0x101e39, 0x03, 0x03); in _HAL_INTERN_ISDBT_InitClk()
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| H A D | halDMD_INTERN_common.h | 142 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask);
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_common.c | 400 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
760 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
764 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
779 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
784 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
800 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
804 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
830 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
836 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
840 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_common.c | 402 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
762 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
766 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
781 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
786 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
802 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
806 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
832 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
838 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
842 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_common.h | 155 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask);
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_common.h | 154 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask);
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_common.h | 154 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask);
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_common.c | 401 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask) in HAL_DMD_RIU_WriteByteMask() function
761 HAL_DMD_RIU_WriteByteMask(0x101EAF, 0, BMASK(5:3)); in HAL_DMD_TS1_Tristate()
765 HAL_DMD_RIU_WriteByteMask(0x101EAF, (BIT_(5))|(BIT_(4))|(BIT_(3)), BMASK(5:3)); in HAL_DMD_TS1_Tristate()
780 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
785 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(0)), (BIT_(0))); in HAL_DMD_RFAGC_Tristate()
801 HAL_DMD_RIU_WriteByteMask(0x11286C, 0, (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
805 HAL_DMD_RIU_WriteByteMask(0x11286C, (BIT_(4)), (BIT_(4))); in HAL_DMD_IFAGC_Tristate()
831 HAL_DMD_RIU_WriteByteMask(0x112802, 4<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
837 HAL_DMD_RIU_WriteByteMask(0x112802, 1<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
841 HAL_DMD_RIU_WriteByteMask(0x112802, 2<<4, BMASK(6:4)); in HAL_DMD_ADC_IMUX_Sel()
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| H A D | halDMD_INTERN_common.h | 154 void HAL_DMD_RIU_WriteByteMask(MS_U32 u32Addr, MS_U8 u8Value, MS_U8 u8Mask);
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